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7617331 |
System and method of double address detection
A plurality of detectors can be evaluated to determine if more than one has been assigned the same address. Responsive thereto, such detectors could be identified for follow-up maintenance, or...
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7610410 |
Method and a system for establishing a connection with identification and group information
A method for establishing a wireless connection between a first wireless device provided in a computer and a second wireless device, wherein group information that identifies the first wireless...
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7606945 |
Method and apparatus for dynamically configuring hardware resources by a generic CPU management interface
A programmable network component for use in a plurality of network devices with a shared architecture, where the programmable network component includes an interface with an external processing...
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7603544 |
Dynamic allocation of a buffer across multiple clients in multi-threaded processor without performing a complete flush of data associated with allocation
A method may include distributing ranges of addresses in a memory among a first set of functions in a first pipeline. The first set of the functions in the first pipeline may operate on data using...
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7603501 |
Communication circuit of serial peripheral interface devices
A communication circuit of a serial peripheral interface (SPI) device includes a master device and a plurality of slave devices. One of the slave devices includes a plurality of general purpose...
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7587535 |
Data transfer control device including endian conversion circuit with data realignment
When data is transferred to an access destination in a different endian format, a transfer start address is aligned based on a transfer bus width, and a transfer size is adjusted according to the...
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7581026 |
Communicating transaction types between agents in a computer system using packet headers including format and type fields
A transmitting device and a receiving device are coupled via a high-speed serial interface within a computer system. The transmitting device transmits a packet that includes a format field to...
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7577707 |
Method, system, and program for executing data transfer requests
Provided are a method, system, and program for transferring data between an initiator node and target node. A request is received conforming to a first data transfer protocol at the initiator node...
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7571260 |
CPU address decoding with multiple target resources
A microcomputer includes a CPU, multiple resources, and an output circuit having an address decoder. The CPU outputs an address signal to the address decoder. The address decoder decodes the...
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7568053 |
USB composite device, USB communication system, and USB communication method
A USB composite device including devices of different USB subclasses and enable communications between the devices and a host without increasing the number of logic interfaces, comprising a first...
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7567471 |
High speed fanned out system architecture and input/output circuits for non-volatile memory
In various embodiments, a plurality of non-volatile memory devices, such as NAND flash memory device, may be connected to a host controller device in a fanned out configuration that allows each of...
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7565463 |
Scalable routing and addressing
PCI Express transactions can be transmitted via a shared PCI Express infrastructure. At an infrastructure ingress point an additional header comprising at least a source identifier and a target...
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7565460 |
Information processing apparatus and method for handling packet streams
A control machine which uses a data amount stored in an FIFO as a trigger and allows a DMA transfer to be started according to a capacity of the FIFO allows a control machine for preparing for the...
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7562187 |
Laser drivers that provide double buffering of serial transfers
Double buffering of serial transfers is provided in order to allow for increased serial transfer rate without requiring increased internal processing speeds. A laser driver serial controller...
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7552436 |
Memory mapped input/output virtualization
A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate...
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7548999 |
Chained hybrid input/output memory management unit
In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to...
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7546397 |
Systems and methods for allowing multiple devices to share the same serial lines
Methods and systems for allowing multiple devices to share the same serial lines (e.g., SDIO, SEN and SCLK) are provided. Such devices can be located, e.g., on an optical pick-up unit. Each device...
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7543081 |
Use of N—Port ID virtualization to extend the virtualization capabilities of the FC-SB-3 protocol and other protocols
A computer implemented method, data processing system, and computer usable program code are provided for using identifier virtualization to extend the virtualization capabilities of protocols. A...
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7539788 |
Data processing system for keeping isolation between logical partitions
When a subject of access of a transaction from an IO device is not any resource allocated to a logical partition to which the device having issued the transaction belongs, a report as an error is...
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7539782 |
Method of virtualizing I/O resources in a computer system
A method of virtualizing hardware resources in a multiprocessor computing environment is provided. Each resource is provided a resource address. A hardware resource map is provided to store virtual...
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7536486 |
Automatic protocol determination for portable devices supporting multiple protocols
In accordance with certain aspects of the automatic protocol determination for portable devices supporting multiple protocols, a portable device detects which one of the multiple protocols is being...
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7533216 |
Device and method for simulating a hard disk
A device and a method for simulating a hard disk are disclosed. The device has a core logic chip, a main memory module and a setting module. The setting module is used to set the main memory module...
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7533191 |
Methods and arrangements for devices to share a common address on a bus
Methods and arrangements for devices to share a common address on a bus are disclosed. Embodiments may comprise a host for medium management and one or more client devices coupled with a...
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7529860 |
System and method for configuring an endpoint based on specified valid combinations of functions
A system and method for registering combinations of physical and/or virtual functions for configuring an endpoint are provided. With the system and method, a mechanism informs a management...
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7526596 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Methods and systems for an identifier-based memory section
A storage system that may include one or more memory devices, a memory interface device corresponding to one or more of the memory devices, which are organized in sections, and a section...
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7526017 |
Transmitting device, receiving device, transmission system, and transmission method
A transmitter LSI 1 transmits a source clock, transmission data, and a transmission sync signal indicating the timing of the transmission data to a receiver LSI for establishing transmission...
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7523226 |
Controlling an auxiliary display user interface based on usage context
An auxiliary computing device normally used for remotely controlling a primary device may change its functionality and extend its usefulness based on a usage context. An auxiliary device may change...
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7502876 |
Background memory manager that determines if data structures fits in memory with memory state transactions map
A background memory manager (BMM) for managing a memory in a data processing system has circuitry for transferring data to and from an outside device and to and from a memory, a memory state map...
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7502871 |
Method for query/modification of linear block address table entries for direct I/O
The present invention provides a method, that enables application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from the local...
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7487327 |
Processor and method for device-specific memory address translation
A processor employing device-specific memory address translation. In one embodiment, a processor may include a device interface configured to receive a memory access request from an input/output...
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7472158 |
Initiator connection tag for simple table lookup
SAS devices provide an OPEN frame when requesting a connection or path to a device. An initiator connection tag value, preferably a 16-bit value, is included in this OPEN frame by the initiator....
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7471512 |
Storage system assembly employing repeater amplifiers in I/O expansion module
A storage system assembly includes a storage processor (SP) module and an input/output (I/O) expansion module disposed between an and opening of an enclosure and a midplane circuit board. The SP...
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7467283 |
System and method for addressing protocol translation in a storage environment
A system and method for translating addressing protocols between two types of storage drives in a storage environment is provided. A storage environment may include a JBOD of Serial ATA drives...
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7464189 |
System and method for creation/deletion of linear block address table entries for direct I/O
A method that enables application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from the local operating system or hypervisor is...
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7464188 |
Computer system controlling accesses to storage apparatus
Since no control of accesses made by a computer as accesses to a storage apparatus is executed, the computer can be used illegally to steal and improperly change data stored in the storage...
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7461186 |
Data handover unit for transferring data between different clock domains by parallelly reading out data bits from a plurality of storage elements
The invention provides a data handover unit for transferring data from a furst clock domain to a second clock domain, comprising: a first clock unit operable to supply a first clock signal; a...
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7457942 |
PC card control device, computer system using the PC card control device, and PC card identifying method
A PC card control device includes a PC card identifying part configured to identify a type of a card connected with the connector. An identification information acquisition part of the PC card...
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7457255 |
Method and apparatus for providing link-local IPv4 addressing across multiple interfaces of a network node
A system to provide link-local IPv4 addressing across multiple interfaces of a network-node. The network-node broadcasts an Address Resolution Protocol (ARP) request packet on multiple interfaces...
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7444440 |
Method and device for providing high data rate for a serial peripheral interface
An improved high performance scheme is provided with a serial peripheral interface (SPI) to enable microcontroller-based products and other components and devices to achieve a higher serial...
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7444437 |
Input/output device and method of setting up identification information in input/output device
An input/output device and a method of setting up identification information for an input/output device, to confirm which slot of which device enclosure each unit is mounted in, within a short...
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7441050 |
Data processing system, data processing method, computer-readable storage medium, and disk drive
In a data processing system that processes serial data transferred from a processor formed as one chip and transmits the resultant data to another chip, a data output processing unit that processes...
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7426607 |
Memory system and method of operating memory system
A random access memory system has a memory controller, a first memory device, a second memory device, and a memory bus. The memory controller is configured to control access to a plurality of...
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7426583 |
Method and circuit for decoding an address of an address space
Decoding an address in an address space including a plurality of local ranges and a plurality of peripheral ranges is described. Various approaches for decoding an input address include determining...
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7424554 |
Method of and system for changing the address of a disk array enclosure
An apparatus for setting an enclosure address in a computer system having a plurality of enclosures includes at least one enclosure address control device including input means for changing the...
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7421519 |
Method for the detection of misdirected data
Provided is a method, wherein in certain embodiments an I/O command from a host is received at a first storage unit. An identifier is generated that identifies a destination to which the I/O...
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7421515 |
Method and system for communications network
A system and method of operation are provided for using a network interface to process incoming messages sent by a client device to a network server. The network interface includes a...
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7420701 |
Systems and methods for providing automatic language switching
Systems and methods for accurately recognizing a language format of an input imaging data stream when no explicit language switch is present. A sniffer process is initiated when an imaging device...
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7415542 |
Micro-programmable filter engine having plurality of filter elements interconnected in chain configuration wherein engine supports multiple filters from filter elements
A micro-programmable filter (MFE) engine includes multiple programmable filter elements and a microcode controller. The filter elements can be configured, controlled, and combined in different ways...
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7409480 |
Electronic equipment, method of receiving data, method of transmitting data, method of setting channel and method of grouping electronic equipment into channels
It becomes possible for a user to set a transmission or reception channel arbitrarily and easily. Each of equipment connected to an IEEE 1394 bus may include a register provided within a RAM 113 ...
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7408661 |
Control apparatus and its method, and control program and storage medium holding it, with access designating second address being performed based on link to the second address included in display information
A controller which exists between a client apparatus and an image processing apparatus and which controls access from the client apparatus such that the client apparatus can use a network server...
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