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7624215 |
Interrupt controller
An interrupt controller for managing interrupt requests comprises interrupt control circuitry in a first domain, the first domain being switchable to a low-power mode, and interrupt request...
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7610425 |
Approach for managing interrupt load distribution
A method and apparatus for distributing multiple interrupts among multiple processors is disclosed. According to one embodiment, an interrupt daemon monitors the interrupt load among the processors...
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7607133 |
Interrupt processing control
A data processing system 2 supporting interrupt handling is provided with an interrupt controller 24 . The interrupt controller is responsive to save state data when interrupt processing is...
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7587717 |
Dynamic master/slave configuration for multiple expansion modules
A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes...
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7587510 |
System and method for transferring data between a user space and a kernel space in a server associated with a distributed network environment
A system ( 150 ) and method provide for the transfer of at least one packet ( 194 ) comprising data between a user space ( 152 ) and a kernel space ( 154 ) associated with a server ( 156 ) that is...
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7552371 |
Method and system for automatically diagnosing disability of computer peripheral devices
A method and a system for automatically diagnosing disability of computer peripheral devices are provided. In the method, a set of interrupt configuration data relevant to a disabled PCI peripheral...
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7552260 |
Method for dynamically arranging interrupt pins
A method for dynamically arranging interrupt pins is provided, which is suitable for arranging a plurality of interrupt pins of a control chip. In this method, a number of interrupts sent from each...
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7533206 |
Resource management device
A bus arbitration section and a resource control section are interposed between a shared resource and a plurality of bus masters. The minimum number of receivable access permissions within a given...
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7512730 |
Method for dynamically allocating interrupt pins
A method for dynamically allocating interrupt pins is provided. The present method is used for allocating a plurality of interrupt pins of a control chip. In the present method, a hardware routing...
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7506091 |
Interrupt controller utilising programmable priority values
An interrupt controller 2 is provided with priority registers 6 storing priority values P 0 -P 9 used to determine prioritisation between received interrupt signals I 0 -I 9 . A priority value...
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7500040 |
Method for synchronizing processors following a memory hot plug event
A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for...
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7484214 |
Real time control system
A real-time control system for executing exactly a cyclic task, preventing a delay of the processing start time due to accumulation of a plurality of overhead times, thereby executing control...
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7484024 |
Apparatus and method for interrupt source signal allocation
An apparatus and method for interrupt source signal allocation is provided. An interrupt controller may include an interrupt source allocation unit, an interrupt pending register, a control...
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7478185 |
Directly initiating by external adapters the setting of interruption initiatives
The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a...
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7444451 |
Adaptive interrupts coalescing system with recognizing minimum delay packets
The present invention relates to an adaptive interrupts coalescing system with recognizing minimum delay packets. The adaptive interrupts coalescing system of the invention comprises a first...
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7426728 |
Reducing latency, when accessing task priority levels
One embodiment disclosed relates to a method of reducing access latency to a task priority register (TPR) of a local programmable interrupt controller unit within a microprocessor. A command is...
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7421692 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Real time control system
A real-time control system for executing exactly a cyclic task, preventing a delay of the processing start time due to accumulation of a plurality of overhead times, thereby executing control...
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7415560 |
Method of automatically monitoring computer system debugging routine
A monitor method of computer system is provided, applying within an interrupt service routine. According to the application of interrupt service, when the interrupt controller sends an interrupt...
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7415558 |
Communication steering for use in a multi-master shared resource system
New approaches for providing communication between multiple masters ( 12, 14 ) and one or more shared resources ( 24, 30, 100 ) are needed. One example of a resource that may need to be shared is...
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7395434 |
Method for secure storage and verification of the administrator, power-on password and configuration information
A computer includes a processor, an input device and a read only memory (“ROM”). One or more passwords are flashed in the ROM in encoded form. The encoding process may include any well-known...
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7373446 |
Method and system for dynamically patching an operating system's interrupt mechanism
In a virtual computing machine, a system and method that dynamically patches the interrupt mechanism (in interrupt vector space) of a host computing architecture with guest mode software....
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7359998 |
Low-power CD-ROM player with CD-ROM subsystem for portable computer capable of playing audio CDs without supply energy to CPU
A low-power audio CD player for portable computers permits operation of the CD-ROM subsystem when power is not being supplied to the computer subsystem. In one embodiment of the invention, the...
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7337254 |
Information processing system and method of controlling the same
An information processing system operating in response to a remote control signal transmitted from a remote controller, the information processing system including a remote signal receiver to...
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7321947 |
Systems and methods for managing multiple hot plug operations
A method for managing multiple hot plug operations in an information handling system is provided. An instruction for initiating a new hot plug operation is received, the new hot plug operation...
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7320044 |
System, method, and computer program product for interrupt scheduling in processing communication
Method, system, apparatus and computer program product for interrupt scheduling in processing communication. In one embodiment the method includes: a sending computer program and a receiving...
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7315911 |
Method for efficient inter-processor communication in an active-active RAID system using PCI-express links
A fault-tolerant RAID system is disclosed. The system includes redundant RAID controllers coupled by a PCI-Express link. When a PCI-Express controller of one of the RAID controllers receives a...
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7302511 |
Chipset support for managing hardware interrupts in a virtual machine system
In one embodiment, an apparatus includes a set of multiplex blocks coupled with an interrupt controller and multiple interrupt request lines, and a virtual machine monitor block (VMM) coupled to...
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7287112 |
Dynamic reconfiguration interrupt system and method
The present invention system and method enables dynamic reconfiguration of an electronic device with appropriate interrupts in a convenient and efficient manner. A plurality of internal...
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7269677 |
Power consumption reduction and quicker interruption response in an information processing device utilizing a first timer and a second timer wherein the second timer is only conditionally activated
An information processing device having low power consumption without affecting interruption request response speed. The device specifies a waiting time until execution of a given event and makes a...
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7260664 |
Interrupt mechanism on an IO adapter that supports virtualization
A mechanism for handling event notifications or interrupts in a logically partitioned computing system having IO adapters that support adapter virtualization are provided. A virtual adapter...
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7257658 |
Message based interrupt table
An interrupt processing technique is provided where an interrupt message is sent to an interrupt controller of a processor in response to an interrupt request from an individual device. The...
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7243178 |
Enable/disable claiming of a DMA request interrupt
Machine-readable media, methods, and apparatus are described for performing direct memory access (DMA) transfers. In some embodiments, a device may generate an interrupt to request a DMA transfer....
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7234014 |
Seamless user interactions for portable storage devices
A portable storage device 10 includes a body 12 , an actuator 16 , and an indicator 18 . When coupled to a host device 22 , a user depressing the actuator 16 causes an interrupt message to...
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7225285 |
Assigning interrupts in multi-master systems
Techniques and mechanisms provide management of interrupt requests in a system, such as a programmable chip system. The system may include multiple master components and slave components....
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7225284 |
Increasing the quantity of I/O decode ranges using SMI traps
A method of increasing the quantity of input/output (I/O) decode ranges using system management interrupts (SMI) traps is disclosed. In one aspect, the present disclosure teaches a method of...
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7222200 |
Method for synchronizing processors in SMI following a memory hot plug event
A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for...
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7209993 |
Apparatus and method for interrupt control
An interrupt control apparatus comprising an interrupt vector register for holding address information corresponding to interrupt resources of a first type which are managed by an operating system...
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7200700 |
Shared-IRQ user defined interrupt signal handling method and system
A shared-IRQ user-defined interrupt signal handling method and system is proposed, which is designed for use with a computer platform to allow a group of peripheral devices connected to an...
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7194623 |
Data event logging in computing platform
There is disclosed a computer entity having a trusted component which compiles an event log for events occurring on a computer platform. The event log contains event data of types which are...
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7177963 |
System and method for low-overhead monitoring of transmit queue empty status
A queue monitoring system and method determines when one or more transmit queues have reached a state that requires action by the host processing device, without the need for periodic polling of...
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7174554 |
Tools and methods for discovering race condition errors
Tools and methods are described herein for discovering race condition errors in a software program. The errors are discovered by deliberately causing a processor executing the test program to...
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7162560 |
Partitionable multiprocessor system having programmable interrupt controllers
A system that may optionally be partitioned into multiple domains is disclosed. Each domain is capable of independently powering on, executing a firmware program, and loading an operating system,...
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7159057 |
Evaluation chip
An evaluation chip is disclosed whose interrupt priority order can be changed freely. A plurality of interrupt priority order determining circuits 20 - 1 to 2 - 4 perform a logical operation on...
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7149831 |
Batch processing of interrupts
A computer-implemented method for handling pending interrupt vectors of a pending interrupt list is disclosed. The method includes batch-reading the set of pending interrupt vectors into a working...
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7149830 |
Semiconductor device and microcontroller
A semiconductor device in which input terminals for external interrupts can be set as desired. A plurality of external input terminals can be specified as interrupt terminals which output an input...
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7143223 |
Method, system and program product for emulating an interrupt architecture within a data processing system
To emulate an interrupt architecture in a data processing system, interrupt emulation code receives from an operating system a first call requesting access to a first resource in a first interrupt...
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7139857 |
Method and apparatus for handling interrupts
An apparatus and method for handling an interrupt are disclosed. In one embodiment, a processor may receive an interrupt request corresponding to a particular interrupt. The particular interrupt...
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7139850 |
System for processing programmable buttons using system interrupts
System for processing programmable buttons using system control interrupts in a portable device. The system comprises a programmable button that comprises logic to generate a selected system...
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7139618 |
Method of operation and a control program for a central unit in an automation system
The present invention is directed to a method of operation and a control program for a central unit (e.g., CPU) in an automation system repeatedly executing a control program that is stored in the...
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7133951 |
Alternate set of registers to service critical interrupts and operating system traps
A processor includes a set of general purpose registers that are used when executing generic tasks and a set of exception registers that is dedicated for servicing specific exceptions. When a task...
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