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7617389 Event notifying method, event notifying device and processor system permitting inconsistent state of a counter managing number of non-notified events  
An event notifying method notifies one or a plurality of events from a device to a processor by queuing to a queue in a processor system having one or a plurality of processors. A number of...
7607133 Interrupt processing control  
A data processing system 2 supporting interrupt handling is provided with an interrupt controller 24 . The interrupt controller is responsive to save state data when interrupt processing is...
7596648 System and method for information handling system error recovery  
An information handling system recovers from memory errors associated with a memory unit that supports operation of an SMI handler by using another memory unit to support operation of the SMI...
7587510 System and method for transferring data between a user space and a kernel space in a server associated with a distributed network environment  
A system ( 150 ) and method provide for the transfer of at least one packet ( 194 ) comprising data between a user space ( 152 ) and a kernel space ( 154 ) associated with a server ( 156 ) that is...
7584316 Packet manager interrupt mapper  
A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with an interrupt mapper for informing a plurality of processors about...
7552371 Method and system for automatically diagnosing disability of computer peripheral devices  
A method and a system for automatically diagnosing disability of computer peripheral devices are provided. In the method, a set of interrupt configuration data relevant to a disabled PCI peripheral...
7549039 Generating an interrupt in a system having plural partitions that share a resource  
A system includes a plurality of partitions having respective operating systems, and a resource shared by the partitions. The resource has plural segments, where a first one of the segments is...
7533207 Optimized interrupt delivery in a virtualized environment  
Various operations are disclosed for improving the operational efficiency of interrupt handling in a virtualized environment. A virtualized interrupt controller may obviate the need for an explicit...
7529876 Tag allocation method  
Embodiments of the present invention provide methods and systems for allocating multiple tags to multiple requesters in back to back clock cycles. A tag pool may be divided into a predetermined...
7523240 Interrupt controller and interrupt control method  
An interrupt controller superior in maintenance performance and expandability. An interrupt controller 10 comprises a queue circuit 11 that holds channel numbers corresponding to interrupt...
7478186 Interrupt coalescer for DMA channel  
A DMA interrupt coalescer processes interrupts received from a DMA channel of a DMA controller by transmitting an interrupt request to an interrupt controller if a coalescing condition is satisfied...
7464210 Data processing system having a data transfer unit for converting an integer into a floating-point number when tranferring data from a peripheral circuit to a memory  
This invention provides a data processing system capable of performing an interrupt exception handling routine as many times as the number of times of occurrence of a request event for the same...
7461380 Inter-task communications method, program, recording medium, and electronic device  
Within a processing of a sender task, a transmission request occurs that a data item be sent to a processing of a recipient task. The data item is then once stored in a queue from which the...
7444451 Adaptive interrupts coalescing system with recognizing minimum delay packets  
The present invention relates to an adaptive interrupts coalescing system with recognizing minimum delay packets. The adaptive interrupts coalescing system of the invention comprises a first...
7415561 Computer for dynamically determining interrupt delay  
In a computer having a unit for outputting an interrupt request to a processor, a delay condition from occurrence of an interrupt event to issue of an interrupt request to the processor can be...
7400685 Decoding method and apparatus and recording method and apparatus for moving picture data  
A method and apparatus for recording moving picture data encoded using a prediction encoding system, in which the playback control information is recorded along with moving picture data encoded...
7366814 Heterogeneous multiprocessor system and OS configuration method thereof  
Interrupt process generated in a processor for arithmetic operation is offloaded onto a system control processor, thereby reducing disturbance to the processor for arithmetic operation. A...
7366813 Event queue in a logical partition  
An information processing system is provided which includes a plurality of system resources, and an event queue having a predetermined number of entries. An event recording mechanism of the...
7363410 Flexible interrupt handling methods for optical network apparatuses with multiple multi-protocol optical networking modules  
An API including an interrupt handler registration function and one or more interrupt dispatchers, is provided to an optical networking apparatus to facilitate registration of interrupt handlers to...
7340547 Servicing of multiple interrupts using a deferred procedure call in a multiprocessor system  
A driver program for a multiprocessor subsystem includes an interrupt servicing routine (ISR) and a deferred procedure call (DPC). The ISR, invoked in response to an interrupt, determines whether...
7302512 Interrupt steering in computing devices to effectuate peer-to-peer communications between device controllers and coprocessors  
A computer device, an input/output ("I/O") communication subsystem, a chipset and a method are disclosed for implementing interrupt message packets to facilitate peer-to-peer communications between...
7290077 Event queue structure and method  
An information processing system is provided which includes a plurality of system resources, and an event queue having a maximum number of entries. An event recording mechanism of the information...
7281073 Method for controlling interrupts and auxiliary control circuit  
An auxiliary interrupt control circuit is for use in a computer system including at least one peripheral for generating interrupt requests, an interrupt pending register for storing the interrupt...
7263568 Interrupt system using event data structures  
Provided are techniques for interrupt processing. An Input/Output device determines that an event has occurred. The Input/Output device determines a state of an event data structure. The...
7260663 System and method for presenting interrupts  
An information processing system is provided which includes an interrupt table including a plurality of entries relating to interrupts requested by entries in a plurality of event queues. The...
7254726 System and method for managing system events by creating virtual events in an information handling system  
In a computer system or information handling system, a virtual system event provides for the communication of the notification of a system events from the hardware of the computer system to the...
7222251 Microprocessor idle mode management system  
An idle mode system has a clock gating circuit, a bus interface unit, memory interfaces and an interrupt and idle control unit. The clock gating circuit receives a first clock and designated...
7197586 Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler  
A method, apparatus, and computer instructions for providing pre and post handlers to log trace records before entering or after exiting the interrupt handler. A trace record includes a ‘from’...
7181559 Message based transport mechanism for level sensitive interrupts  
An interrupt handling technique is provided that may allow for sharing level sensitive interrupts in systems where interrupts are message based, i.e., edge triggered. An interrupt input unit is...
7177963 System and method for low-overhead monitoring of transmit queue empty status  
A queue monitoring system and method determines when one or more transmit queues have reached a state that requires action by the host processing device, without the need for periodic polling of...
7154559 Video apparatus, notably video decoder, and process for memory control in such an apparatus  
A video apparatus has a digital decoder having a first memory on an internal bus and linked to an OSD circuit and to a second memory via a main bus. The video apparatus comprises means for...
7149831 Batch processing of interrupts  
A computer-implemented method for handling pending interrupt vectors of a pending interrupt list is disclosed. The method includes batch-reading the set of pending interrupt vectors into a working...
7143197 Method and system for monitoring a telecommunications signal transmission link  
A system including an event monitor monitoring at least one transmission link. Each event monitor receives transmission link addresses from an address sequencer and transmits related event data to...
7133951 Alternate set of registers to service critical interrupts and operating system traps  
A processor includes a set of general purpose registers that are used when executing generic tasks and a set of exception registers that is dedicated for servicing specific exceptions. When a task...
7130948 Flexible interrupt handling methods for optical networking apparatuses with multiple multi-protocol optical networking modules  
An API including an interrupt handler registration function and one or more interrupt dispatchers, is provided to an optical networking apparatus to facilitate registration of interrupt handlers to...
7124225 Method and apparatus for multi-interrupt controller for reducing hardware interrupts to DSP  
The present inventions provide a controlling device for reducing external interrupts for a processor and the method thereof in a real time system. The controlling device decides whether it should...
7120718 Method for generating interrupt commands in a microprocessor system and relative priority interrupt controller  
A method for generating interrupt commands for a microprocessor system includes storing interrupts in a pending interrupts register, and storing priority values associated with the stored...
7099978 Method and system of completing pending I/O device reads in a multiple-processor computer system  
A method and system for completing pending I/O device reads by periodically stalling the issuance of I/O device accesses by a program in a multiple-processor computer system.
7096297 System and method for delaying an interrupt request until corresponding data is provided to a destination device  
A method and system for forwarding interrupt requests from a source device to a destination device. A controller bridge receives data, from a source device, for a destination device and stores the...
7096296 Supercharge message exchanger  
A system with a first random access memory (RAM), a second RAM, a first processor coupled to the first RAM and a second processor coupled to the second RAM. The first RAM is configured to store...
7089341 Method and apparatus for supporting interrupt devices configured for a particular architecture on a different platform  
Method and apparatus for supporting interrupt devices configured for a specific architecture (e.g., APIC-based software and hardware) on a different platform (e.g., a PowerPC platform). One...
7085869 Arrangement for managing transmitted packets requiring acknowledgement in a host channel adapter  
A host channel adapter configured for outputting packets, according to a service protocol requiring acknowledgement messages within a prescribed time interval following transmission, utilizes a...
7080178 Interrupt pre-emption and ordering within a data processing system  
A data processing system nested interrupt controller 24 responsive to priority level values 28, 30 associated with respective interrupt handling programs to control the execution of those...
7054975 Interrupt generation in a bus system  
The present invention relates to a bus system comprising a first and second station ( 10, 14 ) coupled via a bus ( 12 ) for transferring data and control signals, the bus ( 12 ) operating according...
7043729 Reducing interrupt latency while polling  
Systems, methods, and software for reducing system management interrupt (SMI) latency while operating in system management mode. The present invention implements a technique for exiting system...
7032049 Apparatus for relaying received interrupt requests  
An apparatus is described which is distinguished by the fact that the apparatus does not output an interrupt request until after a plurality of interrupt requests have been received. The apparatus...
7028124 Method and apparatus for dual queue head processing of interrupt endpoints  
A method and apparatus for generating, initializing, and scheduling of two interrupt queue heads to represent a single endpoint are described. In an embodiment, a method includes generating primary...
6996645 Method and apparatus for spawning multiple requests from a single entry of a queue  
Coded requests are received from Memory Port Interfaces ( 608 and 612 ) and stored into Outgoing Queue ( 604 ). Coded requests are also received from Transaction Pipeline ( 610 ), some of which...
6985982 Active ports in a transfer controller with hub and ports  
In a transfer controller with hub and ports architecture one of the data ports is an active data port. This active data port can supply its own source information, destination information and data...
6968412 Method and apparatus for interrupt controller data re-direction  
In one aspect, a method is disclosed. The method includes trapping initializing data of a first interrupt type to a first interrupt controller, re-routing the initializing data of the first...
Matches 1 - 50 out of 187 1 2 3 4 >