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5530873 |
Method and apparatus for processing interruption
Shadow registers for processing interruption are provided in a CPU. When the control shifts to interruption routine, the shadow registers are used for the interruption routine by changing the use...
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5513349 |
System and method for safing of asynchronous interrupts
Processing of an asynchronous signal directed to a thread comprising a software routine executing in a computer system such that data consistency is maintained is discussed. Such processing...
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5511202 |
Desktop computer system having zero-volt system suspend and control unit for ascertaining interrupt controller base address
A desktop computer system having the capability to suspend and resume the state of the computer system. The suspended system state is saved to the system hard file such that system power may be...
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5511184 |
Method and apparatus for protecting a computer system from computer viruses
An apparatus and method for protection against attack by computer virus. Detection and prevention of a virus attack at boot time is achieved by write-protecting the storage devices of the system...
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5471620 |
Data processor with means for separately receiving and processing different types of interrupts
A data processor which is provided with a flag in a Processor Status Word (PSW) 116 for storing prohibiting/enabling status for receiving all of the interrupt requests, and in which the instruction...
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5459870 |
Interface circuit for controlling data transfers
In a computer system including a host which operates in a pre-read mode to start a block data transfer after reading status of a peripheral device (HDD) in response to an interrupt from the...
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5381540 |
Interface: interrupt masking with logical sum and product options
Interrupt circuitry for a processor comprises a plurality of interrupt inputs, an interrupt output, combinatorial logic with a plurality of combinatorial logic inputs connected to the plurality of...
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5367676 |
Data processor for multiple macro-service processings based on a single macro-service request
A data processor includes a central processing unit having an execution unit, a program counter for supplying the address of the instruction to be executed and a program status word for holding the...
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5339437 |
Method and apparatus for saving a system image onto permanent storage that is operating system independently
At least one storage parameter table is initialized to reserve an area of permanent storage for saving a system image. The reserved area is not formatted by the operating system for general use...
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5291606 |
Interrupt control unit
In an interrupt controller, interrupt processing mode indication circuits are provided for each interrupt request circuit for storing interrupt processing mode information, and priority level...
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5291604 |
Transparent system interrupts with automated halt state restart
A dedicated memory area is provided on a microprocessor system for storing a customizable system interrupt service routine, processor state data at the time of interruption and a halt indicator...
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5276888 |
Computer system with interrupts transparent to its operating system and application programs
A transparent system interrupt is invoked by the assertion of an electrical signal at an external pin of a microprocessor CPU chip. Upon assertion of this interrupt, the CPU begins program...
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5218712 |
Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption
In a data processing system employing microcode techniques, complex sequences of microinstructions can be initiated by application of a single macroinstruction. These complex sequences of...
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5193187 |
Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
A fast interrupt mechanism is capable of simultaneously interrupting a community of associated processors in a multiprocessor system. The fast interrupt mechanism enables the more effective...
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5163150 |
Information processor performing interrupt operation without saving contents of program counter
An information processor has at least one interface unit by which the processor is coupled to a peripheral equipment. The interface unit can selectively generate either a first mode signal or a...
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5155853 |
Data processor operating in a vector interrupt mode and register bank switching mode with selected bank for interrupt processing
A data processor comprises a central processing unit, a plurality of register banks used by the central processing unit when the central processing unit executes a given process, an interrupt...
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5148544 |
Apparatus and method for control of asynchronous program interrupt events in a data processing system
In a data procesing system having a kernel mode (i.e., for executing privileged instructions) and a user mode of operation, apparatus for responding to interrupt conditions includes a first...
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5109329 |
Multiprocessing method and arrangement
A master-slave multiprocessor (FIG. 1) is formed by connecting a slave processor (25) to an I/O slot of a uniprocessor, and by minimally modifying the uniprocessor's operating system. At...
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5101497 |
Programmable interrupt controller
A computer system including a programmable interrupt controller wherein individual interrupt levels can be programmed to receive edge or level sensed interrupt signals. The controller includes a...
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5036458 |
Information processor executing interruption program without saving contents of program counter
An information processor has at least one interface unit by which the processor is coupled to peripheral equipment. The interface unit can selectively generate either a first mode signal or a...
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4998197 |
Data processor with fast break in program execution by selectively processing either external control signal or external interrupt
A circuit by which an SWI instruction held in a memory circuit is switchedly input in response to a signal supplied externally is provided in a processor, whereby the substitution of a program word...
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4996640 |
Data processing system
A data processing system capable of processing data in a plurality of modes including an input/edit mode is disclosed. The system includes a data name memory, start address memory and edit...
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4930068 |
Data processor having different interrupt processing modes
A data processor comprises an interrupt processing request controller receiving processing requests from peripheral devices for generating an interrupt request. An execution unit has a first mode...
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4847752 |
Data processing apparatus having an input/output controller for controlling interruptions
A data processing apparatus includes an interruption control unit having an associative memory which is used to store a priority data of an interruption and a mode data designating an interruption...
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4716523 |
Multiple port integrated DMA and interrupt controller and arbitrator
Both DMA access and character interrupt driven access modes of service are provided to multiple communication ports by an integrated arbitration DMA/interrupt controller utilizing its own resident...
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4651298 |
Selection of data from busses for test
A test computer has a direct memory access module, interface units, and a data select unit for each of several system busses. Only some of the data on each system buss is to be transferred to the...
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4514805 |
Interrupt operation in systems emulator mode for microcomputer
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and...
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4491912 |
Data processing system with improved microsubroutine facility
A data processing system having a first storage for storing therein microprograms; an address register for supplying an instruction address of a microprogram to be executed into said first storage;...
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4486827 |
Microprocessor apparatus
A special reset function is provided in the CPU, using the same control input to the CPU as the normal reset, to reset only the program counter to facilitate the use of a single CPU in a...
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3665415 |
DATA PROCESSING SYSTEM WITH PROGRAM INTERRUPT PRIORITY APPARATUS UTILIZING WORKING STORE FOR MULTIPLEXING INTERRUPT REQUESTS
A data processing system having program interrupt apparatus with classes of interrupts for awarding priority to devices requesting service based in part on the relative priority of the device as a...
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3440612 |
PROGRAM MODE SWITCHING CIRCUIT
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3059850 |
Control arrangements for electrical digital computing engines
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