|
Match
|
Document |
Document Title |
|
|
6889167 |
Diagnostic exerciser and methods therefor
A computer-implemented method for diagnosing the performance of a computer system using a diagnostic application. The method includes providing a diagnostic application and providing an operating...
|
|
|
6889279 |
Pre-stored vector interrupt handling system and method
A pre-stored vector interrupt handling system for rapidly processing interrupt requests from input/output (I/O) devices in processor-based systems includes selection logic and an interrupt vector...
|
|
|
6883053 |
Data transfer control circuit with interrupt status register
A data transfer control circuit includes several data receiver-transmitters, each having an interrupt identification register. Interrupt signals from the data receiver-transmitters are combined...
|
|
|
6880021 |
Intelligent interrupt with hypervisor collaboration
An apparatus, method and program product for controlling the transfer of data in a data processing system having a processor handling an I/O request in an I/O operation, main storage controlled by...
|
|
|
6880029 |
Programmable controller
In a programmable controller which executes a user program process, an I/O refresh process and a peripheral service process by using a same microprocessor, the cyclic execution of the peripheral...
|
|
|
6874049 |
Semaphores with interrupt mechanism
Disclosed is a multiprocessor system including a semaphore register and a semaphore interrupt register. In addition, for each processor in the multiprocessor system, there is a semaphore interrupt...
|
|
|
6865636 |
Multitasking processor system for monitoring interrupt events
In a processor system, different memory means ( 8 ), which can in each case comprise a memory stack ( 9 ) for the instruction counter, a register ( 10 ) for temporarily storing data and status...
|
|
|
6862641 |
Interruptable and re-enterable system management mode programming code
Interruptable and re-enterable system management mode (SMM) programming code. The code includes one or more instructions, an entry or exit location, and one or more instructions. The code is...
|
|
|
6859845 |
System for resolving conflicts due to simultaneous media streams and method thereof
A system and methods are provided for resolving resource conflicts related to processing multiple media streams on a single media device. An audio/video (A/V) server is used to interconnect a...
|
|
|
6857064 |
Method and apparatus for processing events in a multithreaded processor
In a multithreaded processor, events are categorized according to which of a “soft” state clearing (“nuke”) process and a “hard” nuke process should be performed in response to each...
|
|
|
6851006 |
Interruption handler-operating system dialog for operating system handling of hardware interruptions
Starting and establishing a dialog between an interruption handler and an operating system for handling of hardware interruptions by the operating system is disclosed. A recommendation for handling...
|
|
|
6836881 |
Remote tracing of data processing nodes in an asynchronous messaging network
Remote tracing from a local data processing node of the execution of a process within an application program running on a remote data processing node in a distributed data processing network. The...
|
|
|
6834352 |
Method and apparatus for maximizing an advertising effect using a control unit to detect if advertisement is being displayed and suspending a function if advertisement is not displayed
A computer includes a central processing unit (CPU), a memory, an input unit, a monitor, an advertisement presenting program for presenting an advertisement on the monitor, and a controlling unit...
|
|
|
6829719 |
Method and apparatus for handling nested faults
Apparatus and a method for handling nested faults including the steps of determining whether a fault is a first level fault, responding to a determination of a first level fault by saving a first...
|
|
|
6823414 |
Interrupt disabling apparatus, system, and method
An interrupt processing apparatus, system, and article including a machine-accessible medium, along with a method of processing interrupts, optimize interrupt-handling by combining the activities...
|
|
|
6823460 |
Method and system for intercepting an application program interface
A method of intercepting application program interface, including dynamic installation of associated software, within the user portion of an operating system. An API interception control server in...
|
|
|
6823413 |
Interrupt signal processing apparatus
An interrupt signal processing apparatus, when receiving an interrupt requesting signal from one device, writes a pulse signal generated by an interrupt setting pulse generating section to a...
|
|
|
6823467 |
Method and apparatus for arbitrary resolution interval timeouts
Methods and apparatus for enabling timeouts with arbitrary resolutions to be implemented are disclosed. According to one aspect of the present invention, a method for enabling a device driver to...
|
|
|
6820155 |
Interruption managing device and interruption managing method
An interrupt management section 103 for holding interrupt acceptance possibility states prepared for each of interrupt sources 121 to 122 , and an interrupt mask cancellation section 104 for...
|
|
|
6820154 |
System and method for servicing interrupts
Disclosed are a system and method of selectively awaking processes in response to an interrupt condition. A processing system may host a plurality of processes where each process is associated with...
|
|
|
6820153 |
Interrupt processing and memory management method in an operation processing device and a device using the same
In operation processing devices based on Java (a registered trademark), each time a functional program is executed, in response to a command to access that function, a work area for the program...
|
|
|
6816935 |
Interrupt and status reporting structure and method for a timeslot bus
An interrupt and status reporting method and structure for a timeslot bus communications protocol. In one embodiment, a peripheral bus is a timeslot bus configured to transmit information across...
|
|
|
6816809 |
Hardware based utilization metering
A hardware based utilization metering device, and a corresponding method are used in a computer system having one or more central processor units (CPUs) to provide a measure of CPU utilization. The...
|
|
|
6813728 |
Method and a device for checking the functioning of a computer
A method and a device for checking the functioning of a computer are proposed, the computer in a normal operating state having access to the working memory via bus lines. For the purposes of...
|
|
|
6813665 |
Interrupt method, system and medium
An interrupt method, system, and/or medium may comprise generating a load balancing value that helps balance servicing of interrupts among processors.
|
|
|
6807595 |
Mobile communication device having a prioritized interrupt controller
A microprocessor system having an interrupt controller is provided for use in a mobile communications device. Peripheral processing units generate interrupt requests for sending to the...
|
|
|
6799316 |
Virtualizing hardware with system management interrupts
Initially, a SMI trap detects an application accessing a memory location associated with a physical hardware device. The SMI trap receives the device address for the address bus and compares that...
|
|
|
6799317 |
Interrupt mechanism for shared memory message passing
A method for transparently handling messages originating from local shared memory and from an external source. A device driver allows the local sender to identify and wake up a waiting receiver...
|
|
|
6798708 |
Memory controller and serial memory
In a memory controller, a serial data including an instruction bit train with addition of a start bit, a clock signal, a chip enable signal, and a reset signal are inputted. During the active...
|
|
|
6795884 |
Read-only memory based circuitry for sharing an interrupt between disk drive interfaces
An apparatus for sharing an interrupt between a controller for a parallel storage device interface and a controller for a serial storage device interface includes interrupt conditioning circuitry...
|
|
|
6792492 |
System and method of lowering overhead and latency needed to service operating system interrupts
A method for achieving low overhead for operating system (“OS”) interrupts is described. In a preferred embodiment, when an interrupt occurs, a lightweight interrupt handler is used to...
|
|
|
6792491 |
Invoking ACPI source language code from interrupt handler
In one embodiment of the invention, an embedded controller receives an interrupt command and a query number from a system management interrupt (SMI) handler. The embedded controller generates a...
|
|
|
6792483 |
I/O generation responsive to a workload heuristics algorithm
An apparatus, method and program product for use with a data processing system having a processor handling an I/O request in an I/O operation, main storage controlled by said processor for storing...
|
|
|
6789142 |
Method, system, and program for handling interrupt requests
Provided are a method, system, and program for handling interrupts. A request is received as to whether a device transmitted an interrupt and a determination is made as to whether the device...
|
|
|
6785893 |
Operating system event tracker having separate storage for interrupt and non-interrupt events and flushing the third memory when timeout and memory full occur
A system and method for logging events processed by an operating system is provided. The events logged can include interrupt and non-interrupt events, and can include user-defined events....
|
|
|
6782432 |
Automatic state savings in a graphics pipeline
A method, apparatus, and system are described for processing an operation code (op-code) to be transmitted over a data path of a graphics pipeline. If the op-code comprises context state...
|
|
|
6779054 |
Method and apparatus for operating a network controller
In one embodiment, an apparatus is described. The apparatus includes an input/output (I/O) device that is capable of being coupled to a computing system. The device is configured such that, in...
|
|
|
6779065 |
Mechanism for interrupt handling in computer systems that support concurrent execution of multiple threads
The present invention provides a mechanism for handling interrupts on a processor that supports multiple-threads concurrently. The processor's resources are allocated to provide multiple logical...
|
|
|
6775729 |
PERIPHERAL DEVICE, PERIPHERAL DEVICE CONTROL METHOD, PERIPHERAL DEVICE CONTROL SYSTEM, STORAGE MEDIUM FOR STORING PERIPHERAL DEVICE CONTROL PROGRAMS, SENDING DEVICE FOR SENDING PERIPHERAL DEVICE CONTROL PROGRAMS, AND PERIPHERAL DEVICE CONTROL PROGRAM PRODUCT
A peripheral device is connected to an information processing device, and in the event that an interruption job is input from the information processing device while the peripheral device is...
|
|
|
6775721 |
Method and system for handling a data stream from optical media utilizing automatic link sector detection
The present invention provides an improved method and system for link detection and handling. The method includes detecting one of the plurality of link sectors; generating an interrupt signal;...
|
|
|
6775728 |
Method and system for concurrent handler execution in an SMI and PMI-based dispatch-execution framework
A method and system that enables concurrent event handler execution in a system management interrupt (SMI) and processor management interrupt (PMI)-based dispatch-execution framework to service an...
|
|
|
6772259 |
Interrupt handlers used in different modes of operations
According to the present invention, when an interrupt occurs in a computer system running an operating system, control takes a separate code path in the operating system, depending on whether the...
|
|
|
6772258 |
Method and apparatus for sharing an interrupt between disk drive interfaces
An apparatus for sharing an interrupt between a controller for a parallel storage device interface and a controller for a serial storage device interface includes interrupt conditioning circuitry...
|
|
|
6772189 |
Method and system for balancing deferred procedure queues in multiprocessor computer systems
A method and system for balancing deferred procedure queues in multiprocessor computer systems provides a greater use of multiprocessing power for the handling of hardware requests in a device...
|
|
|
6772257 |
Method and apparatus for processing interrupts
Briefly, in accordance with one embodiment of the invention, a method of processing interrupts, includes the following. An interrupt status message is transmitted after detecting a change in state...
|
|
|
6766399 |
Application programming interface for temporary release of associated file locks on storage devices
A method is provided for use in a computer system for performing an action on a storage volume being monitored by a program. The method includes the issuing of a command to suspend the notification...
|
|
|
6766400 |
Disk array apparatus and interrupt execution method of the same
A disk array apparatus and an interrupt execution method of the same enables command processing received from an upper level apparatus to be executed in high-speed by reducing rate of the interrupt...
|
|
|
6766398 |
Method for processing PCI interrupt signals in a logically partitioned guest operating system
The present invention generally provides embodiments relative to a method for PCI interrupt routing in a logically partitioned guest operating system. The method, which may be embodied upon a...
|
|
|
6760800 |
Event vector table override
In an embodiment, a system may include a processor that handles a number of events. These events may include general purpose interrupts (GPIs) assigned to particular devices in the system....
|
|
|
6760783 |
Virtual interrupt mechanism
A host coupled to a switched fabric including one or more fabric-attached I/O controllers. Such a host may comprise a processor; at least one host-fabric adapter coupled to said processor and...
|