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8079035 Data structure and management techniques for local user-level thread data  
Data structure creation, organization and management techniques for data local to user-level threads are provided. In one embodiment, a method includes generating, for a user-level thread...
8077015 Method for waking a device in response to a wireless network activity  
A method and a system for data transmission between a first electronic device and a second electronic device, wherein the second electronic device is in a sleep mode. Transmission of data between...
8072882 Method and apparatus for a graceful flow control mechanism in a TDM-based packet processing architecture  
A method and apparatus for improving packet processing employing a network flow control mechanism are disclosed. A network process, in one embodiment, suspends distribution of incoming packet(s)...
8074232 Method for improving the communication of the human interface device  
A method for improving the communication of the human interface device, comprising reporting at least one interrupt input endpoint and at least one interrupt output endpoint to the host;...
8074005 Data processor and control system  
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to...
8055924 Semiconductor integrated circuit and electric power supply controlling method thereof  
An interrupt power supply control unit 5 monitors interrupts 11, 21, 31 issued from function blocks 1, 2, 3, and also, a power supply control instruction 41 issued from a CPU 4. When either an...
8055827 Guest interrupt controllers for each processor to aid interrupt virtualization  
In one embodiment, a system comprises a processor, a first interrupt controller coupled to the processor, and a second interrupt controller coupled to the processor. The first interrupt controller...
8051417 Target thread selection in a multi-threaded process  
In an embodiment of the invention, an apparatus and method for a target thread selection in a multi-threaded process perform the steps of receiving a signal that may or may not be masked by...
8051415 Disk array apparatus, method for exchanging firmware, program for exchanging firmware and storage medium for storing program thereof  
Disclosed is a disk array apparatus which includes disk apparatuses and which reads and writes data of the disk apparatus based on an I/O instruction issued by a host computer, includes: a CPU...
8037468 Methods for synchronous code retrieval from an asynchronous source  
The present invention discloses methods for delivering code to a host system including the steps of: accepting a CPU request, from a host-system processor of the host system, for a code segment;...
8037227 System and method for virtualizing processor and interrupt priorities  
Dispatching of interrupts to a processor is conditionally suppressed, that is, only if an old priority value and a new priority value are either both less than or both greater than a maximum...
8032897 Placing virtual machine monitor (VMM) code in guest context to speed memory mapped input/output virtualization  
In one embodiment, a method comprises: obtaining use of one or more pages in a guest physical address space of a guest; storing handler code to process one or more input/output (I/O) and/or...
8028114 Information processing apparatus, method, and program for simplifying an interrupt process  
The present invention relates to an information processing apparatus, an information processing method and a program for simplifying an interrupt process to reduce time needed for the interrupt...
8024504 Processor interrupt determination  
Processor interrupt determination procedures are described. In an implementation, one or more computer-readable media comprise instructions that are executable by a computer to determine, based on...
8019922 Interruption facility for adjunct processor queues  
Interruption facility for adjunct processor queues. In response to a queue transitioning from a no replies pending state to a reply pending state, an interruption is initiated. This interruption...
8015337 Power efficient interrupt detection  
Interrupt request detection circuitry is disclosed for detecting and outputting interrupt requests to a processor. The interrupt request detection circuitry comprises: an interrupt signal input...
8010727 System management interrupt interface wrapper  
In a personal computing system function calls, formatted in 16-bit format for a 16-bit interface to the firmware, are communicated through an operating system providing a System Management...
8010726 Data processing apparatus and method for handling interrupts  
A data processing apparatus and method for handling interrupts is provided, the apparatus having an interrupt controller operable to receive interrupts generated by a number of interrupt sources,...
8006246 Apparatus for forcibly terminating thread blocked on input/output operation and method for the same  
Provided are an apparatus and a method for forcibly terminating a thread blocked on an I/O operation by terminating the I/O operation, transmitting a user-defined signal to the thread blocked on...
8001308 Method and system for handling a management interrupt event in a multi-processor computing device  
A method and system for handling a management interrupt, such as a system management interrupt (SMI) and/or a platform management interrupt (PMI), includes sequestering two or more processor cores...
7996835 System, method and program for managing communication with multiple configurations for virtual machine  
System, method and program product for managing a plurality of configurations of a first virtual machine. A command is received to set the configuration of the first virtual machine for processing...
7996593 Interrupt handling using simultaneous multi-threading  
Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information...
7996594 Interrupt-driven link status feedback mechanism for embedded switches  
A computer implemented method, a tangible computer readable medium, and a data processing system intelligently propagate link status information received by a blade server to the various ports of...
7987283 System and method for transferring data between a user space and a kernel space in a server associated with a distributed network environment  
A system (150) and method are disclosed that provide for the transfer of at least one packet (194) comprising data between a user space (152) and a kernel space (154) associated with a server...
7987464 Logical partitioning and virtualization in a heterogeneous architecture  
A method, apparatus, and computer usable program code for logical partitioning and virtualization in heterogeneous computer architecture. In one illustrative embodiment, a portion of a first set...
7987307 Interrupt coalescing control scheme  
In an embodiment, a method is provided. The method of this embodiment provides determining a flow context associated with a receive packet; and if the flow context complies with a dynamic...
7984218 Processor, electronic apparatus, interruption control method and interruption control program  
A processor 1 provided with a plurality of cores, an interrupt operation dedicated core 20 which is used only for an interrupt operation; a normal core 11 to 1n which outputs an interrupt request...
7984206 System for debugging throughput deficiency in an architecture using on-chip throughput computations  
A method, system, and apparatus for debugging throughput deficiency in an architecture using on-chip throughput computations are disclosed. In one embodiment, a system includes a subsystem module...
7984281 Shared interrupt controller for a multi-threaded processor  
A multi-threaded processor is disclosed that includes a sequencer adapted to provide instructions associated with one or more threads of a multi-threaded processor. The sequencer includes an...
7984222 Systems for providing performance monitoring in a memory system  
Systems for providing performance monitoring in a memory system. The memory system includes a memory controller, a plurality of memory devices, a memory bus and a memory hub device. The memory...
7979861 Multi-processor system and program for causing computer to execute controlling method of multi-processor system  
A multi-processor system with a plurality of unit processors includes: a request accepting section for accepting a first request and a second request, wherein the first request is a request to...
7979618 Image forming apparatus and control method thereof  
An image forming apparatus and a control method thereof. The image forming apparatus includes a plurality of image processors which process an image to be formed on a printing medium corresponding...
7979617 Quad aware locking primitive  
A method and computer system for efficiently handling high contention locking in a multiprocessor computer system. At least some of the processors in the system are organized into a hierarchy, and...
7975267 Virtual interrupt processing in a layered virtualization architecture  
Embodiments of apparatuses, methods, and systems for processing virtual interrupts in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes virtual machine...
7970814 Method and apparatus for providing a synchronous interface for an asynchronous service  
Methods and apparatus for providing a synchronous interface for an asynchronous service including, in a synchronous interface engine executing on a processor, receiving a request from a client for...
7966481 Computer system and method for executing port communications without interrupting the receiving computer  
A microprocessor system in which an array of processors communicates more efficiently through the use of a worker mode function. Processors that are not currently executing code remain in an...
7962686 Efficient preservation of the ordering of write data within a subsystem that does not otherwise guarantee preservation of such ordering  
A technique for efficiently preserving the ordering of data being written to a nonvolatile memory through a subsystem of a network storage system in the event of a power disruption, where the...
7962921 Apparatus and methods using intelligent wake mechanisms  
An embodiment of the present invention provides a network interface card (NIC), comprising an intelligent wake mechanism and a device driver associated with the intelligent wake mechanism and...
7953906 Multiple interrupt handling method, devices and software  
A device, method and software for handling multiple interrupts in a peripheral device are disclosed. The disclosed method includes, upon a hardware event in the peripheral device recording the...
7953915 Interrupt dispatching method in multi-core environment and multi-core processor  
Disclosed is an interrupt dispatching system and method in a multi-core processor environment. The processor includes an interrupt dispatcher and N cores capable of interrupt handling which are...
7953913 Peripheral device locking mechanism  
A computing system having a host device and at least one client device having a lock used to prevent modification of data in the client device. A lock clear signal from the host device causes the...
7949813 Method and system for processing status blocks in a CPU based on index values and interrupt mapping  
Certain aspects of a method and system for processing status blocks based on interrupt mapping may be disclosed. Exemplary aspects of the method may include determining whether a particular status...
7950013 System for monitoring time proportion for interrupt or task processing with restriction placed in subsequent monitoring time period when allowable time proportion is exceed  
A storage system has a single processor that operates in a multitasking operating system environment. An operation time manager adjusts the balance between processing time proportions for...
7945908 Method and system for improving the accuracy of timing and process accounting within virtual machines  
A sponge process, for example within a driver in a guest operating system, is associated in a virtual computer system with each virtual processor in one or more virtual machines. When timer...
7930457 Channel mechanisms for communicating with a processor event facility  
Mechanisms for communicating with a processor event facility are provided. The mechanisms make use of a channel interface as the primary mechanism for communicating with the processor event...
7925815 Modifications to increase computer system security  
Methods and systems for processing more securely. More specifically, embodiments provide effective and efficient mechanisms for reducing APIC interference with accesses to SMRAM, where processor...
7924908 Rake receiver interface  
In some embodiments of the present invention, a method and apparatus to generate interrupts in a transfer of information between a rake receiver and a processor, said interrupts having a rate of...
7917677 Smart profiler  
A method, system, and computer usable program product for a smart profiler are provided in the illustrative embodiments. An allowable number of interrupts for use by a profiler application is...
7917910 Techniques to manage critical region interrupts  
Briefly, techniques to manage interrupts and swaps of threads operating in critical region. In an embodiment, a thread is to be interrupted during a first critical region with an interrupt...
7917657 Method and system for monitoring a telecommunications signal transmission link  
A system including an event monitor for monitoring at least one transmission link. Each event monitor receives transmission link addresses from an address sequencer and transmits related event...