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8271997 General purpose embedded processor  
The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution...
8266358 Image processing device, image processing method, and recording medium  
An image processing device including a first control unit to control a normal operating mode during which image processing is performed, a second control unit to control an energy-saving mode...
8261284 Fast context switching using virtual cpus  
Various technologies and techniques are disclosed that provide fast context switching. One embodiment provides a method for a context switch comprising preloading a host virtual machine context in...
8260994 Interface for prototyping integrated systems  
An interface is described which has at least one chip side port with a first plurality of pins for conveying fields of a packet and first and second circuit side ports each port having a set of...
8255577 I/O forwarding technique for multi-interrupt capable devices  
The method, apparatus and system of an I/O forwarding technique for multi-interrupt capable I/O devices are disclosed. In one embodiment, a method of transferring an I/O request in a...
8255594 Handling legacy BIOS services for mass storage devices using systems management interrupts with or without waiting for data transferred to mass storage devices  
A method, system, and computer program product containing instructions for handling legacy BIOS services for mass storage devices using system management interrupts. In response to receiving a...
8255604 Interrupt vector piggybacking  
A hypervisor receives an interrupt that includes a target address and, in turn, branches to an administrating interrupt vector. Next, the administrating interrupt vector determines whether to...
8255451 Technologies for detecting erroneous resumptions in a continuation based runtime  
Technologies for enabling a continuation based runtime to accept or reject external stimulus and, in addition, to determine if an external stimulus may be valid for processing at a later point in...
8255912 Techniques for setting events in a multi-threaded system  
To set one or more events without intermediate scheduling of threads in a multi-threaded system, a scheduler is first rendered essentially ineffective. The events are then set, for example, by...
8255602 Effective mixing real-time software with a non-real-time operating system  
This disclosure describes a processor system that allows non-real time code to execute normally, while permitting a real time interrupt in hardware or software to execute with minimal added latency.
8250271 Command and interrupt grouping for a data storage device  
A data storage device may include multiple memory chips and a controller that is operably coupled to the memory chips and that is arranged and configured to receive a group of commands from a...
8250252 System and methods for using a DMA module for a plurality of virtual machines  
A system is provided. The system comprises a plurality of virtual machines executed by a computing system for sending and receiving information; and an adapter presented to the plurality of...
8250395 Dynamic voltage and frequency scaling (DVFS) control for simultaneous multi-threading (SMT) processors  
A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the...
8250272 Interrupt control apparatus and image forming apparatus  
An interrupt control apparatus includes: an interrupt request supply unit that supplies interrupt request information; a processing unit that performs interrupt processing based on the interrupt...
8244946 Interrupt moderation  
A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed...
8244947 Methods and apparatus for resource sharing in a programmable interrupt controller  
Efficient techniques are described for identifying active interrupt requests to improve performance and reduce power requirements in a processor system. A method to identify active sampled...
8234429 Monitoring interrupt acceptances in guests  
In one embodiment, an interrupt acceptance control circuit is provided. The interrupt acceptance control circuit may monitor one or more guest interrupt controllers in a system in response to an...
8234430 Apparatus and method with controlled switch method  
An embedded microcontroller system comprises a central processing unit, a system controller for receiving and handling an interrupt, a register having storage locations containing sets of...
8234420 Method, system, and apparatus for communicating using multiple controllers  
Operating a control system includes repeatedly transmitting a first interrupt to at least one interface unit by a first controller of a plurality of controllers, wherein the first interrupt is...
8230198 System for synchronous code retrieval from an asynchronous source  
The present invention discloses a computer-readable storage medium having computer-readable code embodied on the computer-readable storage medium, the computer-readable code including: program...
8230148 Systems and methods for embedding interrupts into a serial data stream  
Systems and methods for transmitting and processing interrupts by embedding interrupt information into a serial data stream are disclosed. An event is detected and converted into an interrupt...
8219731 Data processor and control system  
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to...
8219725 Cache optimized balanced handling of initiatives in a non-uniform multiprocessor computing system  
A balancing process between I/O processor groups of a non-uniform multiprocessor system enables spreading of I/O workload across multiple I/O processor groups on a group base as soon as the I/O...
8219732 Method for managing state in a wireless network  
A method for managing states by a Media Access Control (MAC) layer in a wireless network is disclosed. The method includes determining next occurable physical interrupts for each of the states;...
8214574 Event handling for architectural events at high privilege levels  
Methods and apparatus to perform event handling operations are described. In one embodiment, after an event (such as an architectural event occurs), the corresponding occurrence response (e.g., a...
8214573 Method and system for handling a management interrupt event in a multi-processor computing device  
A method and system for handling a management interrupt, such as a system management interrupt (SMI) and/or a platform management interrupt (PMI), includes allocating two or more processor cores...
8214628 Computer performance monitoring by associating counter values with particular processes when an interrupt is detected  
A performance monitoring device has an interrupt detection unit that detects generation of an interrupt process to be executed by a processor in accordance with TLB entry invalidation executed in...
8208799 Method and system for PVR software buffer management to support software passage  
Methods and systems for a personal video recorder (PVR) software buffer management to support the software passage are disclosed. A first plurality of receive buffer descriptors may be allocated...
8209565 Data processing device and bus access control method therein  
A data processing device includes a computing circuit that accesses a peripheral device connected to through a internal bus, an internal bus connection circuit that is provided between the...
8200875 Processing and forwarding of message-signaled interrupts  
An interrupt detection apparatus includes a detection address region storing unit configured to store an address region, as a detection address region, to be detected in accordance with a first...
8174723 Efficient printer control electronics  
An apparatus (such as a printer) including a combination engine controller circuit board having a integrated circuit (IC) chip configured to process (format) incoming data as well as to control...
8176488 Methods and systems for determining potentially unsafe instructions in a virtual machine context and activating a software debugger to process the potentially unsafe instructions  
Methods and systems for safe execution of guest code in virtual machine context are presented. A method for running a virtual machine in a computing system includes (a) launching a virtual machine...
8171198 Image forming apparatus and control method thereof  
An image forming apparatus and a control method thereof. The image forming apparatus includes a plurality of image processors which process an image to be formed on a printing medium corresponding...
8171322 Portable electronic devices with power management capabilities  
An electronic device may operate in standby and active modes. A headset may be coupled to the electronic device. The electronic device may have audio codec circuitry. The audio codec circuitry may...
8156493 Exception handling in a concurrent computing process  
The present invention provides a method and system for exception handling in an executable process executing in a concurrent computing environment. The present invention allows a user to interrupt...
8151026 Method and system for secure communication between processor partitions  
A system and method for writing, by a sender, a message into blocks of a memory space, the memory space being shared by the sender of the message and a receiver of the message, and sending, by the...
8140875 Integrated circuit apparatus  
An integrated circuit apparatus may include: a plurality of power domains to which power voltage is separately supplied; a plurality of circuit macros belonging to a plurality of the power domains...
8140817 Dynamic logical partition management for NUMA machines and clusters  
A partitioned NUMA machine is managed to dynamically transform its partition layout state based on NUMA considerations. The NUMA machine includes two or more NUMA nodes that are operatively...
8136113 Method and apparatus for adjusting sleep time of fixed high-priority threads  
A sleep function capable of putting a fixed high-priority thread to sleep within a time-window is disclosed. After a sleep request has been made by a fixed high-priority thread via the sleep...
8131901 Interrupt control for virtual processing apparatus  
A data processing system supporting one or more virtual processing apparatuses is provided with external interrupt interface hardware 26 and virtual interface hardware 28. Hypervisor software...
8122167 Polling in a virtualized information handling system  
A software thread is dispatched for causing the system to poll a device for determining whether a condition has occurred. Subsequently, the software thread is undispatched and, in response...
8120418 Large-scale integrated circuit  
A large-scale integrated circuit according to the present invention includes a plurality of functional blocks for independently performing a signal processing operation, and a selection...
8117368 System management interrupt interface wrapper  
In a personal computing system function calls, formatted in 16-bit format for a 16-bit interface to the firmware, are communicated through an operating system providing a System Management...
8112647 Protocol for power state determination and demotion  
A system may comprise a plurality of processing units, and a control unit and monitoring unit interfacing with the processing units. The control unit may receive requests for transitioning the...
8108582 Notifying asynchronous events to a host of a data storage system and apparatus for the same  
A method of notifying asynchronous events to a host of a data storage system is presented. The method comprises the steps of: detecting an asynchronous event; generating an interrupt message in...
8099537 Method, device, and system for transmitting data fragments over multiple transmission lines and techniques for stopping data transmission  
It is an object of the invention to inhibit a drop in the data transmission efficiency due to the transmission of an interrupt signal. The invention provides a signal transmission method that is...
8099531 Information processing method and computer program comprising network card wherein a plurality of processors switches use of network card related to setting of resource flag  
An information processing apparatus includes a device that performs data processing; and processors, each processor including a device driver corresponding to the device. A device driver set in...
8095659 Service interface  
A service interface enables an application to be developed independently from a particular service. At execution of the application, the application is wrapped or bound to a service....
8087034 Virtual processor methods and apparatus with unified event notification and consumer-produced memory operations  
The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual...
8086832 Structure for dynamically adjusting pipelined data paths for improved power management  
A design structure embodied in a machine readable, non-transitory storage medium used in a design process includes a system for dynamically varying the pipeline depth of a computing device. The...