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8811417 Cross-channel network operation offloading for collective operations  
A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be...
8806085 Application specific integrated circuit (ASIC) disposed in input/output module connectable to programmable logic controller (PLC) based systems having plurality of connection paths  
An input/output module for use in an industrial control system and connectable to a programmable logic controller (PLC), the input/output module having an interface configured for an electrical...
8799547 Data packet processing method for a multi core processor  
A method for processing a data packet in a network server system comprising at least one central processor unit (CPU) having a plurality of cores; and a network interface for forming a connection...
8799687 Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates  
A processor may include power management techniques to, dynamically, chose an optimal C-state for the processing core. The measurement of real workloads on the OSes exhibit two important...
8799694 Adaptive recovery for parallel reactive power throttling  
Power throttling may be used to conserve power and reduce heat in a parallel computing environment. Compute nodes in the parallel computing environment may be organized into groups based on, for...
8799696 Adaptive recovery for parallel reactive power throttling  
Power throttling may be used to conserve power and reduce heat in a parallel computing environment. Compute nodes in the parallel computing environment may be organized into groups based on, for...
8787255 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Method and system for improved multi-cell support on a single modem board
 
A system for providing multi-cell support within a single SMP partition in a telecommunications network is disclosed. The typically includes a modem board and a multi-core processor having a...
8782657 Dynamic creation and destruction of IO resources based on actual load and resource availability  
A method for binding input/output (I/O) objects to nodes. The method includes binding an I/O object group to a NUMA node of a plurality of NUMA nodes on a system, obtaining an I/O object group...
8782454 System and method for managing clock speed based on task urgency  
A system and method are described for utilizing task urgency information when making power management decisions. For example, one embodiment of a method for managing power states of a processor...
8782314 Scalable and configurable system on a chip interrupt controller  
Embodiments include a system and method for an interrupt controller that propagates interrupts to a subsystem in a system-on-a-chip (SOC). Interrupts are provided to an interrupt controller that...
8773455 RGB-out dither interface  
A display controller may include an RGB Interface module and a display port module, which may both use a target-master interface, in which the data receiving module pops pixels from the data...
8769177 Interrupt latency reduction  
A method in accordance with one embodiment of the invention can include detecting an interrupt request during execution of an instruction by a processor of an integrated circuit. Additionally, a...
8762994 Power-optimized interrupt delivery  
An apparatus, method, system, and computer-readable medium are disclosed. In one embodiment the apparatus is a processor. The processor includes thread remapping logic that is capable of tracking...
8762757 Power management method and device thereof  
A power management method for a mobile device including a basic input output system (BIOS) and an embedded controller (EC) includes determining whether the mobile device is operated in a direct...
8762614 Analog-to-digital converter with early interrupt capability  
An early interrupt feature enables generation of interrupts prior to completion of an analog-to-digital conversion to be used in a processor PID calculation. Even though an analog-to-digital...
8756357 Data processor and control system  
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to...
8751717 Interrupt control apparatus and interrupt control method  
An interrupt control apparatus and interrupt control method reduce situations in which the output of interrupt information is suspended and thus reduce stress caused in a user, without missing the...
8739160 Methods and systems for safe execution of guest code in virtual machine context  
System for safe execution of guest code in virtual machine context includes (a) a virtual machine monitor (VMM) that handles potentially unsafe instructions; (b) a virtual machine (VM) running...
8738830 Hardware interrupt processing circuit  
A hardware interrupt processing circuit converts selected hardware interrupts to an interrupt vector having bits corresponding to the selected hardware interrupts. The hardware interrupt...
8738952 Device controller low power mode  
A device controller, such as a universal serial bus (“USB”) device controller, that is unattached to an external device is placed into a low power mode. During low power mode, interface components...
8732371 Managing overhead associated with service requests via software generated interrupts  
An application process operates at a privilege level lower than that of the kernel code of the operating system in which the process executes. When the application process requires performance of...
8726292 System and method for communication in a multithread processor  
A system and method for Inter-Thread Communication using software interrupts in a multithread processor are disclosed. Bits in a shared control register and/or a private control register can...
8725914 Message signaled interrupt management for a computer input/output fabric incorporating platform independent interrupt manager  
An apparatus, program product and method dynamically bind Message Signaled Interrupt (MSI) resources shared by a plurality of clients to an interrupt facility in an MSI-capable computer. In...
8725922 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Data processor and control system
 
Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to...
8725921 Virtual multi-processor system  
A virtual multi-processor system includes a plurality of logic processors. Moreover, the virtual multi-processor system includes a logic processor controller configured to allocate a time slice to...
8719589 Microprocessor that facilitates task switching between multiple encrypted programs having different associated decryption key values  
A microprocessor includes a storage element having a plurality of locations each storing decryption key data associated with an encrypted program. A control register field (may be x86 EFLAGS...
8711885 Signal processing apparatus and methods  
A unified system of programming communication. The system encompasses the prior art (television, radio, broadcast hardcopy, computer communications, etc.) and new user specific mass media. Within...
8713235 Low latency interrupt collector  
This document provides apparatus and methods for providing low latency response from a processor to the interrupts collected from peripheral devices. In an example, an apparatus can collect...
8706941 Interrupt virtualization  
In an embodiment, a device interrupt manager may be configured to receive an interrupt from a device that is assigned to a guest. The device interrupt manager may be configured to transmit an...
8700819 Host device suspending communication link to client device based on client device notification  
A communication link between a host device and a client device can be suspended based on a suspend request or notification provided by the client device. The suspend request can be transmitted by...
8694688 Disk controller for implementing efficient disk I/O for a computer system  
A hardware support system for implementing accelerated disk I/O for a computer system. The system includes a bus interface for interfacing with a processor and a system memory of the computer...
8688883 Increasing turbo mode residency of a processor  
In one embodiment, the present invention includes a method for accessing a task stored in an entry of a task queue that identifies the task and a first core of a processor on which the task has...
8688882 Systems on chips having interrupt proxy functions and interrupt processing methods thereof  
Provided is a system on chip (SoC) capable of rapidly processing interrupts generated in various modules without causing an error. The SoC includes a processor configured to process a task, a...
8688964 Programmable exception processing latency  
A digital processor with programmable exception processing latency, may have a central processing unit (CPU) of a digital processor, an exception controller coupled with the CPU, and a control...
8683158 Steering system management code region accesses  
Apparatuses and methods for steering SMM code region accesses are disclosed. In one embodiment, an apparatus includes a status indicator, a base storage location, and an abort storage location....
8677028 Interrupt-based command processing  
In general, this disclosure describes techniques that allow communication between devices/modules of a computer system regarding inter-device/module command execution. In accordance with the...
8677042 Interrupt moderation  
A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed...
8667201 Computer system interrupt handling  
A system, method and article of manufacture for an accelerated processing device (APD) to request a central processing unit (CPU) to process a task, comprising enqueuing a plurality of tasks on a...
8667192 Integrated circuit with programmable circuitry and an embedded processor system  
An integrated circuit can include a processor system configured to execute program code. The processor system can be hard-wired and include a processor hardware resource. The IC also can include a...
8661265 Processor modifications to increase computer system security  
A method, an x86 processor and a computer system for processing more securely. More specifically, embodiments provide an effective and efficient mechanism for reducing APIC interference with...
8661176 Wireless two-way transmission of serial data signals between an electronic device and a power meter  
The invention relates to a bidirectional wireless transmission system for serial format data signals between a “master” electronic device (3) and a “slave” energy meter (2) including a...
8656079 Method and apparatus for remapping interrupt types  
A method and apparatus are provided for controlling system management interrupts is disclosed. The method comprises: receiving an interrupt signal; determining a type associated with the interrupt...
8650565 Servicing interrupts generated responsive to actuation of hardware, via dynamic incorporation of ACPI functionality into virtual firmware  
The methods and systems described herein describe methods and systems for forwarding an interrupt that is generated by hardware to virtual firmware executing on a virtual machine. A control...
8650430 Enabling a peripheral device to transmit a request for interrupt processing to a host when no clock signal is output from the host device  
In a communication system in which data is transmitted and received in synchronization with a clock signal, a peripheral device cannot transfer data to a host device when the host device stops...
8645020 Channel diagnostic system for sent receiver  
A system for performing diagnostic checks on a data message transmitted from a sensor and received by a receiver includes a receiver clock tick counter, a prescaler counter, a calibration pulse...
8645668 Information processing apparatus, information processing method and computer program  
A sub-processor different from the main processor executing control in the operating system (OS) is designated to control a device driver corresponding to a communication unit and thus, the...
8635387 Enhanced I/O performance in a multi-processor system via interrupt affinity schemes  
Disclosed herein is a method for improving Input/Output (I/O) performance in a host system having multiple CPUs. Under this method, various interrupt affinity schemes are provided, which associate...
8631181 Validating message-signaled interrupts by tracking interrupt vectors assigned to devices  
The disclosed embodiments provide a system that validates message-signaled interrupts. During operation, the system receives a message-signaled interrupt from a requesting device. This...
8631119 Interruptibility awareness service  
Interruptibility awareness service enables a requestor to learn whether a requestee is interruptible, for instance, by obtaining current social interaction information of a requestee; determining...
8621487 Virtual processor methods and apparatus with unified event notification and consumer-producer memory operations  
The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual...