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7197586 Method and system for recording events of an interrupt using pre-interrupt handler and post-interrupt handler  
A method, apparatus, and computer instructions for providing pre and post handlers to log trace records before entering or after exiting the interrupt handler. A trace record includes a ‘from’...
7191258 Packet forwarding system having a control packet processor which allocates the bandwidth for a control packet adaptively and processing method thereof  
A control packet management device of a packet forwarding system has a packet queue having a plurality of queues to store a control packet as transmitted, a first processor to transmit said...
7191443 Digital device, task management method and program therefor  
A task management method is provided for preventing a task that can cause a failure in a system from being aborted during a manipulation of the task. A program execution means transmits...
7188203 Method and apparatus for dynamic suppression of spurious interrupts  
An apparatus and method for dynamic suppression of spurious interrupts in a computer system. More specifically, there is provided a method that comprises providing a look-up table comprising...
7185341 System and method for sharing PCI bus devices  
A plurality of processors share a device using a common PCI bus. Each processor includes a PCI addressable memory area where data sent to or received from the device is stored. Each processor...
7185120 Apparatus for period promotion avoidance for hubs  
A device is presented including a host controller capable of attaching a quantity of queue heads to a frame list. The quantity of queue heads are attached to the frame list before any transaction...
7181564 Data processing apparatus and data processing method  
When reading out flash ROM data from an external interface circuit, a clock for a CPU is stopped only in a period during which the flash ROM is read out and fetch data at the CPU side are held in...
7181559 Message based transport mechanism for level sensitive interrupts  
An interrupt handling technique is provided that may allow for sharing level sensitive interrupts in systems where interrupts are message based, i.e., edge triggered. An interrupt input unit is...
7178132 Forward walking through binary code to determine offsets for stack walking  
A method used for walking forward through a binary image of a procedure to identify a return instruction, and while walking forward through the binary image, identifying a set of instructions that...
7178062 Methods and apparatus for executing code while avoiding interference  
Mechanisms and techniques operate in a scalable or non-scalable processing architecture computerized device to execute critical code while overcoming interference from interruptions. A critical...
7177925 Event management system  
One embodiment of an event management system, operating on a computer system having event producers and event consumers, includes an initial event handler program and an event queue having a first...
7177963 System and method for low-overhead monitoring of transmit queue empty status  
A queue monitoring system and method determines when one or more transmit queues have reached a state that requires action by the host processing device, without the need for periodic polling of...
7174554 Tools and methods for discovering race condition errors  
Tools and methods are described herein for discovering race condition errors in a software program. The errors are discovered by deliberately causing a processor executing the test program to...
7171501 System and method for asynchronous transfer of control  
An invention is provided for a synchronous transfer of control. An asynchronous interrupt exception is received, and in response, the value of a reference counter is determined. The value of the...
7171531 Process job flow analysis  
A storage device is configured with one or more processes that receive, process, and pass on jobs from a source. The number of jobs received by a process is compared with the number of jobs...
7167893 Methods and systems for processing a plurality of errors  
As part of handling a large amount of error information generated on a mainframe system associated, for example, with a telephone billing system, a utility software program allows a user to easily...
7168075 Automation device and updating method  
A device used for control or monitoring of a process is updated without interruption or exceeding upper response time limits for response to a change in the state of the process. If the updating...
7165134 System for selectively generating real-time interrupts and selectively processing associated data when it has higher priority than currently executing non-real-time operation  
A method is disclosed. The method includes receiving real-time data at a personal computer implementing a general purpose operating system, generating a real-time event at the personal computer...
7165128 Multifunctional I/O organizer unit for multiprocessor multimedia chips  
An apparatus and method for providing enhanced performance for multi-processor multimedia chips. In one embodiment, the present invention is comprised of a data and communication apparatus coupled...
7164610 Microcomputer having a flush memory that can be temporarily interrupted during an erase process  
A microcomputer with a built-in non-volatile semiconductor memory, which can automatically perform a work of temporarily interrupting automatic writing or automatic erase and accepting an...
7162560 Partitionable multiprocessor system having programmable interrupt controllers  
A system that may optionally be partitioned into multiple domains is disclosed. Each domain is capable of independently powering on, executing a firmware program, and loading an operating system,...
7162558 Interrupt signal processing circuit for sending interrupt requests to a computer system  
A computer system associated with a plurality of interrupt sources that produce interrupt signals may include interrupt signal processing blocks corresponding to the interrupt sources,...
7152125 Dynamic master/slave configuration for multiple expansion modules  
A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes...
7149831 Batch processing of interrupts  
A computer-implemented method for handling pending interrupt vectors of a pending interrupt list is disclosed. The method includes batch-reading the set of pending interrupt vectors into a working...
7149830 Semiconductor device and microcontroller  
A semiconductor device in which input terminals for external interrupts can be set as desired. A plurality of external input terminals can be specified as interrupt terminals which output an input...
7143197 Method and system for monitoring a telecommunications signal transmission link  
A system including an event monitor monitoring at least one transmission link. Each event monitor receives transmission link addresses from an address sequencer and transmits related event data to...
7143024 Associating identifiers with virtual processes  
Multiple virtual processes are each associated with a unique virtual process identifier. For each virtual process, a separate initialization process is started, from which all other processes...
7143311 Interrupt handler for a data processor  
A data processor formed on a single integrated circuit and capable of connection to an external memory, the data processor including: a central processing unit; a local memory including a debug...
7143223 Method, system and program product for emulating an interrupt architecture within a data processing system  
To emulate an interrupt architecture in a data processing system, interrupt emulation code receives from an operating system a first call requesting access to a first resource in a first interrupt...
7139618 Method of operation and a control program for a central unit in an automation system  
The present invention is directed to a method of operation and a control program for a central unit (e.g., CPU) in an automation system repeatedly executing a control program that is stored in the...
7136944 Method and apparatus for using address traps to pace writes to peripheral devices  
A system and method for pacing writes to a legacy peripheral device includes a control block configured to trap on the address of the legacy peripheral device and slows the rate that the CPU posts...
7133961 Non-volatile memory card and transfer interruption means  
A memory card is provided with a transfer control circuit, a write control circuit and a judging circuit. The transfer control circuit outputs a transfer flag signal during the data transfer. The...
7133953 Data transmission device used to forward data received at a first device for a second device to the second device  
A data transmission device is used to forward data that have been received from a first device, and are intended for a second device, to the second device. The data transmission device described...
7133951 Alternate set of registers to service critical interrupts and operating system traps  
A processor includes a set of general purpose registers that are used when executing generic tasks and a set of exception registers that is dedicated for servicing specific exceptions. When a task...
7133952 Method and apparatus for a wearable computer  
A wearable computer system includes a processing unit (102) and a number of peripherals. The processing unit and peripherals are coupled in a daisy-chain fashion utilizing a serial bus (120). The...
7130950 Providing access to memory configuration information in a computer  
Client software stores an identifier corresponding to memory configuration data of interest and causes a software interrupt that requests a memory configuration read function. An interrupt read...
7120716 Semiconductor integrated circuit and interrupt request output method thereof  
There is provided a resistor unit 115 for bypassing an output cell 107 of an interrupt request signal and an input cell 108 of an external interrupt factor, and the output cell 107 of the...
7120718 Method for generating interrupt commands in a microprocessor system and relative priority interrupt controller  
A method for generating interrupt commands for a microprocessor system includes storing interrupts in a pending interrupts register, and storing priority values associated with the stored...
7120717 Method and apparatus for controlling interrupt storms  
An apparatus and method for detecting and controlling interrupt storms in a computer system. More specifically, there is provided a method that comprises detecting whether or not a device is...
7117330 Synchronization techniques in a multithreaded environment  
Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer...
7114022 Method for generating interrupt signal and media access controller utilizing the same  
A method for generating an interrupt signal for a media access controller (MAC) in communication with a computer host and an external network is disclosed. The method includes steps of asserting...
7111089 Programmable scheduler for digital signal processor  
A digital signal processor operates in conjunction with a scheduler hardware module and a scheduler software module in executing a highest priority runnable event among a plurality of events. The...
7103693 Method for applying interrupt coalescing to incoming messages based on message length  
A balanced approach is provided for interrupt coalescing, wherein interrupts of locking and other small size packets are maximized, while large data segment interrupts are minimized. Thus, the...
7103692 Method and apparatus for an I/O controller to alert an external system management controller  
Embodiments of the present invention provide a method and apparatus to allow an I/O controller to alert an external controller using an enhanced SMBus implementation that enables bi-directional...
7099984 Method and system for handling interrupts and other communications in the presence of multiple processing sets  
A computing system comprises two or more processing sets, for example for fault tolerant operation. The multiple processing sets have a connection to at least one device, typically many devices....
7099963 Method and system for monitoring embedded disk controller components  
A history module for monitoring plural components in an embedded disk controller with a first main processor operationally coupled to a first bus and a second processor operationally coupled to a...
7096294 Method and computer program product for graphically providing interrupt request (IRQ) routing information  
A method and an associated computer program product are provided for obtaining interrupt requests (IRQ) routing information in a more efficient and intuitive manner. In this regard, a graphical...
7096472 Systems and methods for ensuring atomicity of processes in a multitasking computing environment  
In the present invention, a computer in which a plurality of programs are executed under a management of an Operation System having a memory management mechanism includes a unit for ensuring...
7096295 Method and device for generating program interruptions in users of a bus system, and bus system  
A method and device and a bus system for generating at least one program interruption in at least one user of a bus system, at least one user storing a specifiable time value in at least one...
7093039 Communication terminal increasing effective data rate on asynchronous transmission and a data transmission method therefor  
A UART sets a predetermined threshold remaining data amount n, which defines an interrupt position, in a transmission trigger detector before data transmission is completed, checks if a trigger,...