|
Match
|
Document |
Document Title |
|
|
6675246 |
Sharing arbiter
The Sharing arbiter is an arbiter which, under certain conditions, permits two or more Done signals to be received before the Sharing arbiter issues a grant signal and, under certain conditions, is...
|
|
|
6671761 |
Bus system
A bus system is provided. The bus system includes: an arbiter that receives access commands output from the plurality of master devices and outputs the access commands in an order according to a...
|
|
|
6662306 |
Fast forwarding slave requests in a packet-switched computer system by transmitting request to slave in advance to avoid arbitration delay when system controller validates request
A method and apparatus for packet-switched flow control of transaction requests in uniprocessor and multiprocessor computer systems that maximizes system resource utilization and throughput, and...
|
|
|
6658513 |
Managing locks affected by planned or unplanned reconfiguration of locking facilities
Changes in locking configurations are managed. A locking configuration includes one or more locking facilities and the one or more locking facilities include one or more locks. When a change in a...
|
|
|
6651128 |
Systems and methods for arbitrating between asynchronous and isochronous data for access to data transport resources
Several different systems and methods are described involving arbitration between asynchronous and isochronous data for access to a data transport resource (e.g., a bus or a memory controller). A...
|
|
|
6651148 |
High-speed memory controller for pipelining memory read transactions
A memory controller ( 218 ) is disclosed which includes a write arbiter ( 130 ) and a read arbiter ( 140 ) for receiving and processing memory requests from a number of requestor modules ( 190 )...
|
|
|
6631433 |
Bus arbiter for a data storage system
A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The...
|
|
|
6629177 |
Arbitrating requests on computer buses
Arbitration requests are received that belong to respective bus types. Each of the types is associated with a programmed value representing a potential number of times that requests of that type...
|
|
|
6629174 |
Synchronization using bus arbitration control for system analysis
A synchronization method including running a system ( 725 ) having multiple agents ( 730 and 780 ) in parallel operation, the multiple agents each having at least one path ( 732 ) to a common bus...
|
|
|
6628662 |
Method and system for multilevel arbitration in a non-blocking crossbar switch
A method and system for arbitrating data transfers between devices connected via electronically isolated buses at a switch. In accordance with the method and system of the present invention,...
|
|
|
6618778 |
Arbiter for arbitrating between a plurality of requesters and method thereof
An arbiter for arbitrating between a plurality of requests from a plurality of requesters, said arbiter being arranged to assign an order of priority of said requesters, the requester having the...
|
|
|
6606691 |
System integrating agents having different resource-accessing schemes
In a system integrating modules (PROC) designed for a time-slotted resource-accessing scheme and modules (PROC′) designed for accessing a common resource based on request-arbitration, a...
|
|
|
6604160 |
Computing system arbitrating and selectively providing resource-seeking tasks with takeaway of non-shareable resources
In a computing system with non-shareable resources, use-arbitrating processes are executed on behalf of each task seeking or having access to non-shareable resource. The processes compete according...
|
|
|
6591323 |
Memory controller with arbitration among several strobe requests
A controller for a memory partitioned into a plurality of banks and divided into addresses that are accessed by a plurality of row access strobe signals and a plurality of column access strobe...
|
|
|
6581124 |
High performance internal bus for promoting design reuse in north bridge chips
In an example embodiment, an apparatus providing communication in a computer system, comprises, a plurality of modules each having a master port and a slave port A secondary bus is shared between...
|
|
|
6581118 |
Apparatus and method for determining bus use right
In order to efficiently utilize a bus system, when a new job occurs, the preferences assigned to jobs is determined in accordance with the volumes of the data remaining for unprocessed jobs, and...
|
|
|
6571306 |
Bus request mechanism for bus master which is parked on a shared bus
A method and mechanism for arbitrating access to a bus. A client which is parked on a bus is allowed to gain access to the bus without having to go through arbitration. A client which is parked on...
|
|
|
6539451 |
Data storage system having master-slave arbiters
A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface has a memory with a high address memory section and a low address memory...
|
|
|
6535941 |
Method and apparatus for avoiding data bus grant starvation in a non-fair, prioritized arbiter for a split bus system with independent address and data bus grants
A distributed system structure for a large-way, symmetric multiprocessor system using a bus-based cache-coherence protocol is provided. The distributed system structure contains an address switch,...
|
|
|
6529984 |
Dual phase arbitration on a bus
A multiphase IEEE 1394 network of nodes requires all nodes to broadcast their current understanding of the phase of the bus (e.g., odd or even). Even if a node is not requesting ownership of the...
|
|
|
6526518 |
Programmable bus
The present inventions provide apparatuses and methods for implementing a programmable bus. A programmable bus provides greater functionality and versatility through the ability to manage data...
|
|
|
6505265 |
Bus arbitration system with changing arbitration rules
A bus arbitration system uses different arbitration rules at different times, by periodically changing the priority order of the bus masters; by masking further bus requests from a particular bus...
|
|
|
6493784 |
Communication device, multiple bus control device and LSI for controlling multiple bus
The present invention provides a multiple bus control device and others which can also be applied to access control by a signal having a directional propagation property for implementing various...
|
|
|
6493805 |
Method and system for synchronizing block-organized data transfer amongst a plurality of producer and consumer stations
With respect to a particular facility semaphore-based synchronizing is executed among a first station and one or more second stations. For each station a single bivalent semaphore is provided. The...
|
|
|
6487622 |
Quorum arbitrator for a high availability system
A computer system operable to provide nodes of a cluster with a quorum resource includes a network interface controller, a mass storage device, a processor, and memory. The network interface...
|
|
|
6484221 |
Bus extension for multiple masters
A network bus for interconnecting a plurality of medical devices is described in which the devices are provided with modules adapted to communicate along the bus. Some of the devices are capable of...
|
|
|
6480918 |
Lingering locks with fairness control for multi-node computer systems
The processors in a multiprocessor computer system are grouped into nodes. The processors can request a lock, but the lock is granted to only one processor at any given time to provide exclusive...
|
|
|
6457106 |
Shared memory control system and shared memory control method
In a current shared memory cycle, the memory access band value of each bus master is calculated at any time and discriminated to determine the next memory cycle control before completion of the...
|
|
|
6438635 |
Bus management using logic-based arbitration among bus access requests
A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are...
|
|
|
6430640 |
Self-arbitrating, self-granting resource access
An arbitration system and method provides self-arbitration among a plurality of processors or other entities vying for access to the bus or other shared resource. The entities vying for access to...
|
|
|
6418496 |
System and apparatus including lowest priority logic to select a processor to receive an interrupt message
One embodiment of the invention includes an apparatus, such as a bridge, for use in connection a with computer system. The apparatus includes remote priority capture logic to hold task priority...
|
|
|
6393505 |
Methods and apparatus for data bus arbitration
A data bus arbitration system is disclosed including a bus status monitor which is coupled to a data bus and generates a bus status signal for use by an arbiter. The arbiter is coupled to a number...
|
|
|
6363445 |
Method of bus arbitration using requesting device bandwidth and priority ranking
A bus arbitration regulates access to a common bus by a plurality of devices by assigning each device a priority rank. A current weighted bandwidth of each device is set equal to a desired weighted...
|
|
|
6349370 |
Multiple bus shared memory parallel processor and processing method
A parallel processor having a high processing performance, where, before the end of a page transfer with an outside memory via an external access bus by a first access request accompanied with a...
|
|
|
6341303 |
System and method for scheduling a resource according to a preconfigured plan
A scheduler for allocating a computer system resource, such as processor time, among processes (e.g., database processes) according to a plan. A scheduling plan may include multiple sub-plans, and...
|
|
|
6314484 |
Computer system with a bus having a segmented structure
Computer system comprising a communication bus, a plurality of units connected to the bus, in which the bus includes a plurality of bus segments, each bus segment being concatenated with at least...
|
|
|
6314488 |
System for segmenting a fibre channel arbitrated loop to a plurality of logical sub-loops using segmentation router as a master to cause the segmentation of physical addresses
A segmented fiber channel communications system includes a segmentation router, including a plurality of ports. Control instructions associated with the segmentation router establish the...
|
|
|
6311217 |
Method and apparatus for improved cluster administration
A cluster administration system that is capable of handling a cluster having one or more computing devices. The number of computing devices that may be included in a cluster is limited only by...
|
|
|
6311249 |
Bus arbitration system having both round robin and daisy chain arbiters
A bus arbitration system includes a first priority grant signal determination part for primarily determining a priority grant signal among two groups including a plurality of priority request...
|
|
|
6308274 |
Least privilege via restricted tokens
A method and mechanism to enforce reduced access via restricted access tokens. Restricted access tokens are based on an existing token, and have less access than that existing token. A process is...
|
|
|
6304952 |
Information processing apparatus and information processing method
In an information processing apparatus, priorities are assigned to a plurality of central processing units (CPUS) and the CPUs transfer their respective display lists of drawing instructions to a...
|
|
|
6286070 |
Shared memory access device and method
A bus controller for a CCD digital still camera arbitrates competing requests by multiple microcontrollers for a shared memory. One of the microcontrollers is designated to have a higher priority...
|
|
|
6272584 |
System board with consolidated EEPROM module
A computer system is provided with a non-volatile memory module that is shared by a plurality of system components during system initialization. In one embodiment, the computer system comprises a...
|
|
|
6269418 |
Priority-based shared bus request signal mediating circuit
A bus request signal mediating circuit comprises an input section for latching a plurality of bus request signals occurring within a certain period of time and for suppressing a new input of bus...
|
|
|
6256698 |
Method of and apparatus for providing self-sustained even arbitration within an IEEE 1394 serial bus network of devices
A method of providing self-sustained even arbitration within an IEEE 1394-1995 serial bus network of devices controls the arbitration and assignment of newly-connected simpler devices to more...
|
|
|
6249847 |
Computer system with synchronous memory arbiter that permits asynchronous memory requests
A computer system that includes a CPU, a memory and a memory controller for controlling access to the memory. The memory controller generally includes arbitration logic for deciding which memory...
|
|
|
6237055 |
Avoiding livelock when performing a long stream of transactions
An arbiter comprising logic circuitry configured to delay granting bus ownership to an agent X in response to receiving a first signal which indicates that a device coupled to the bus is not...
|
|
|
6230229 |
Method and system for arbitrating path contention in a crossbar interconnect network
A method and system for transmitting data among a plurality of cards in a crossbar interconnect network having a plurality of cards each having source paths and destination paths utilizes a...
|
|
|
6226702 |
Bus control apparatus using plural allocation protocols and responsive to device bus request activity
In a bus control apparatus, a plurality of counters are employed in addition to a plurality of data input/output devices such as a memory, a modem, and a graphic board. These data input/output...
|
|
|
6202137 |
Method and apparatus of arbitrating requests to a multi-banked memory using bank selects
A present request includes a present bank select that maps the present request to one bank of a memory having multiple banks. A first request includes a first bank select that maps the first...
|