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6961826 |
Processor state reintegration using bridge direct memory access controller
A computer system comprising at least two processing sets. Each processing set includes main memory. A bridge connects the processing sets. At least a first processing set further including a dirty...
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6957313 |
Memory matrix and method of operating the same
An apparatus and method for storing, manipulating, processing, and transferring data in a memory matrix ( 105 ). The matrix ( 105 ) includes a number of multi-ported memory devices ( 250 ) arranged...
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6957280 |
Streamlining ATA device initialization
The invention includes a platform having a controller coupled to a central processing unit through a system bus. The platform also includes a register device coupled between the central processing...
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6954807 |
DMA controller and method for checking address of data to be transferred with DMA
The address of a data packet to be transferred from a memory to a network interface card within a direct memory access (DMA) is checked. First of all, the address of a descriptor corresponding to...
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6954806 |
Data transfer apparatus and method
A data transfer apparatus and method that can make efficient use of a memory and a common bus by controlling a DMA controller through descriptor control, and can thereby achieve a data transfer...
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6950884 |
Device and method for bidirectional data transfer between two processors wherein DMA channel provides improved data transfer between processors
A device for the bidirectional transfer of data between two processors contains input and output control information memories for storing an item of binary control information for input and output...
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6948010 |
Method and apparatus for efficiently moving portions of a memory block
The present invention relates to a method and system for transferring portions of a memory block. A first data mover is configured with a first start address corresponding to a first portion of a...
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6948025 |
System and method for transferring data between an IEEE 1394 device and a SCSI device
An interface conversion system for improving the performance of a data transfer process that is performed between the IEEE 1394 interface and a SCSI. Data is transferred between a host device that...
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6944682 |
System and method for directly indicating to first direct memory controller (DMA) in halt state to resume DMA transfer via resume instruction from second DMA controller
Direct memory access (DMA) controllers are used in digital processing of image data in image processing devices such as digital copiers, scanners, printers and fax machines. The DMA controllers are...
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6941392 |
Buffer switch having descriptor cache and method thereof
A buffer switch comprises a data memory that stores a plurality of data. A cache memory comprises a plurality of FIFO mini-queues each storing a plurality of descriptors each corresponding to a...
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6941391 |
Fencepost descriptor caching mechanism and method therefor
A system and method for reducing transfer latencies in fencepost buffering requires that a cache is provided between a host and a network controller having shared memory. The cache is divided into...
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6941424 |
System, method, and computer program product for high speed DMA-based backplane messaging
A system and method of enhanced backplane messaging among a plurality of computer boards communicating over a common bus uses a set of pre-allocated buffers on each computer board to receive...
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6941390 |
DMA device configured to configure DMA resources as multiple virtual DMA channels for use by I/O resources
Various embodiments of a system and method for configuring a set of DMA resources as multiple virtual DMA channels are disclosed. In one embodiment, a system may include a context memory configured...
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6941406 |
System having interfaces and switch that separates coherent and packet traffic
An apparatus includes one or more interface circuits, an interconnect, a memory controller, a memory bridge, a packet DMA circuit, and a switch. The memory controller, the memory bridge, and the...
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6937973 |
Design of an application specific processor (ASP)
A method of operating a computer system to design an application specific processor (ASP) comprises defining a set of peripherals for the ASP which are responsive to stimuli and which communicate...
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6938105 |
Data apparatus and method having DMA circuitry to efficiently transfer multivalued bit-plane data
A data processing apparatus improves speed and efficiency of transfer of bit data, especially, multivalue data bit plane. For this purpose, a memory 50 holds four 8-bit multivalue data per 1...
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6931495 |
Processor and method of arithmetic processing thereof
A processor system, comprising: a processor having a function to write back data stored in a cache memory to an external memory in units of a cache line formed of a plurality of words; a small unit...
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6931459 |
Duplicator for recording medium and method for duplicating recording medium
A method for duplicating recording medium includes detecting a source recording medium and a plurality of target recording mediums. A source DMAC is configured for the source recording medium and a...
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6925512 |
Communication between two embedded processors
A system including at least two processing units embedded on a chip able to communicate with each other and to generally independently control access to data from memory on the chip.
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6922740 |
Apparatus and method of memory access control for bus masters
A method and apparatus of memory access control for bus masters are described. In one embodiment, the method includes the receipt of a direct memory access (DMA) request from a device. Once the DMA...
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6920510 |
Time sharing a single port memory among a plurality of ports
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to transfer data between a plurality of first ports and a second port via a single port memory in...
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6917991 |
Method of and system for efficiently tracking memory access by direct memory access controller
The debug controller makes an efficient use of memory in tracing the direct memory access by the processor and the direct memory access controller for the purpose of debugging. The direct memory...
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6915359 |
Data transfer device, data transfer method, data transfer program and computer readable storage medium thereof
A data transfer device which set an address of page as transfer destination and transfer data to the page. In the data transfer device to which the present invention is applied, an address and page...
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6914606 |
Video output controller and video card
A video output controller has a video output buffer, a DMA controller, and a display controller. The display controller has a DMA command list processor configured to determine which of the DMA...
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6912602 |
System having two or more packet interfaces, a switch, and a shared packet DMA circuit
An apparatus includes a first interface circuit, a second interface circuit, a memory controller for configured to interface to a memory, and a packet DMA circuit. The first interface circuit is...
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6907477 |
Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors
A method and system for attached processing units accessing a shared memory in an SMT system. In one embodiment, a system comprises a shared memory. The system further comprises a plurality of...
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6904474 |
Using write request queue to prevent bottlenecking on slow ports in transfer controller with hub and ports architecture
A data transfer technique between a source port and a destination port of a transfer controller with plural ports. In response to a data transfer request ( 401 ), the transfer controller queries...
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6904512 |
Data flow processor
A data flow processor includes a number of hardware units each having more than one mode. A plurality of hardware units may be connected together to implement a flow made up of a series of...
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6904473 |
Direct memory access controller and method of filtering data during data transfer from a source memory to a destination memory
A direct memory access controller includes a source memory controller for controlling a source memory, a destination bus controller for controlling the transfer of data to a destination memory, a...
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6901455 |
Peripheral sharing device with unified clipboard memory
A method and apparatus for implementing unified clipboard memory within a keyboard, video and mouse (KVM) switch device is described. The device enables a selected one of several associated...
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6898657 |
Autonomous signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements
A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal...
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6898723 |
Method for verifying clock signal frequency of computer sound interface that involves checking whether count value of counter is within tolerable count range
A method for verifying clock signal frequency of a sound interface of a computer system is disclosed. The processes include steps of initializing and setting a DMA controller and the sound...
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6898646 |
Highly concurrent DMA controller with programmable DMA channels
A data transaction controller for transferring data responsive to a request from a client. The data transaction controller includes channel circuitry for providing a channel for data transfers. The...
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6895452 |
Tightly coupled and scalable memory and execution unit architecture
An architecture is shown where an execution unit is tightly coupled to a shared, reconfigurable memory system. Sequence control signals drive a DMA controller and address generator to control the...
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6892298 |
Load/store micropacket handling system
Systems and methods are described for a load/store micropacket handling system. A method includes interconnecting a compute node with a shared memory node; translating a processor instruction into...
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6889266 |
Method for delivering packet boundary or other metadata to and from a device using direct memory controller
An existing field of a descriptor is used to store metadata associated with a block of data to be transferred. The metadata is sent to a device using a special command when transferring the block...
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6883088 |
Methods and apparatus for loading a very long instruction word memory
The ManArray processor is a scalable indirect VLIW array processor that defines two preferred architectures for indirect VLIW memories. One approach treats the VIM as one composite block of memory...
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6880035 |
Electronic bus control device with a parallel databus and a method for the operation of the bus control device
An electronic control device with a parallel databus and a plurality of assemblies connected to the databus. The assemblies each include a processor and a memory device and are connected to the...
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6877059 |
Communications architecture for a high throughput storage processor
A storage processor particularly suited to RAID systems provides high throughput for applications such as streaming video data. An embodiment is configured as an ASIC with a high degree of...
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6874054 |
Direct memory access controller system with message-based programming
A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of...
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6874039 |
Method and apparatus for distributed direct memory access for systems on chip
A distributed direct memory access (DMA) method, apparatus, and system is provided within a system on chip (SOC). DMA controller units are distributed to various functional modules desiring direct...
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6871237 |
System for controlling data transfer protocol with a host bus interface
The present invention is a data transfer protocol control system with a host bus interface that includes a transmitting/receiving command DMA, a transmitting data DMA and a receiving data DMA for...
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6868457 |
Direct memory access controller, direct memory access device, and request device
A direct memory access controller includes: one request signal input terminal for inputting a request signal while at least one of a plurality of request devices is outputting the request signal;...
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6865623 |
Semiconductor integrated circuit for use in direct memory access
A semiconductor integrated circuit for use in direct memory access (DMA) has two sources which communicate with a bus through a bus interface. A DMA access signal generator is coupled to the bus...
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6865622 |
System including real-time data communication features
A system includes a direct memory access (DMA) engine to move data on a real time basis and a communication front-end to transmit and receive the data. In another embodiment, the system may also...
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6865638 |
Apparatus and method for transferring multi-byte words in a fly-by DMA operation
An apparatus and method for transferring multi-byte words having arbitrary start and end byte addresses are described. Data transfers between a memory and a PCI-bus pass through a PCI-side aligner...
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6865631 |
Reduction of interrupts in remote procedure calls
A method and system for executing one or more remote procedure calls. In one embodiment, a method comprises the step of a processing unit issuing a plurality of commands to a corresponding DMA...
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6859848 |
Circuit for controlling sequential access to SDRAM
A DMA controller arbitrates and selects a DMA control information signal received from at least one of a plurality of DMA request blocks and accesses an SDRAM on the basis of the selected DMA...
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6859850 |
Controller for controlling direct memory access
A controller for controlling direct memory access. Such a controller is particularly applicable when applied to a transport interface in the receiver of a digital set-top-box for television...
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6854025 |
DMA scheduling mechanism
A DMA scheduling mechanism for transmission of fragmented buffers having a processor for controlling several devices via a polled interface to interleave DMA data transfers on different...
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