Matches 501 - 550 out of 1080 < 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 >
Match Document Document Title
6687767 Efficient direct memory access transfer of data and check information to and from a data storage device  
The invention provides efficient apparatus and methods for using direct memory access (DMA) to store and retrieve data and associated check information in fixed-size blocks on a data storage...
6687796 Multi-channel DMA with request scheduling  
A digital system is provided with a multi-channel DMA controller ( 400 ) for transferring data between various resources ( 401, 402 ). Each channel includes a source port ( 460-461 ), a channel...
6684267 Direct memory access controller, and direct memory access control method  
The read position or write position of data is decided by the base address of a ring buffer and an offset from the base address and the offset is updated by the amount of DMA-transferred data. When...
6684270 Accelerated file system that recognizes and reroutes uncontested read operations to a second faster path for use in high-capacity data transfer systems  
An accelerated filesystem includes a fast-path and a slow-path. The fast-path includes an enhanced storage controller and an enhanced network processing function. Uncontested READ and WRITE...
6678755 Method and apparatus for appending memory commands during a direct memory access operation  
A direct memory access (DMA) controller for controlling memory access operations in a memory. During a memory access operation, the DMA controller executes a chain of DMA commands stored in a...
6678754 Methods and structure for recursive scatter/gather lists  
Methods of operation and systems for a standardized scatter/gather list processor component within DMACs and intelligent IOPs. The standardized circuit architecture and methods provide a register...
6678774 Shared resource arbitration method and apparatus  
An arbiter apparatus for selecting an agent to use a shared resource such as memory. A normal round robin list is utilized in the selection process during boot operation. During the initialization...
6675200 Protocol-independent support of remote DMA  
A remote DMA (RDMA) shim protocol laid atop an existing network data transfer protocol but logically underneath higher level disk and file access protocols specifies the portion of a data packet to...
6668287 Software direct memory access  
Apparatus and a method for generating an interrupt when a direct memory access by an I/O device is desired, suspending the operation of the microprocessor in response to the interrupt, placing...
6665746 System and method for prioritized context switching for streaming data memory transfers  
Method of streaming data transfers from scattered locations or to a gathered location in a memory, including the steps of manipulating the transfer of data between memory devices by processing, an...
6665759 Method and apparatus to implement logical partitioning of PCI I/O slots  
A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a...
6665747 Method and apparatus for interfacing with a secondary storage system  
One embodiment of the present invention provides a system for processing a request directed to a secondary storage system. The system operates by receiving the request at an interface of the...
6662258 Fly-by support module for a peripheral bus  
A system is provided that includes a bus master, a bus slave and a fly-by slave interface, all coupled to a peripheral bus. A peripheral device is coupled to the fly-by slave interface. The bus...
6662246 Two-dimensional memory access in image processing systems  
A two-dimensional direct memory access system that maximizes processing resources in image processing systems. The present invention includes a two-dimensional direct memory access machine. Also,...
6662245 Apparatus and system for blocking memory access during DMA transfer  
The present invention is directed to an apparatus and system for selectively inhibiting access to a memory during a DMA block transfer. In accordance with one embodiment of the present invention,...
6658502 Multi-channel and multi-modal direct memory access controller for optimizing performance of host bus  
A novel and sophisticated direct memory access (DMA) controller that can operate in either “fly-by” mode, “dual-cycle” mode, or “flow-through” mode. The DMA controller of the present...
6658503 Parallel transfer size calculation and annulment determination in transfer controller with hub and ports  
The transfer controller with hub and ports originally developed as a communication hub between the various locations of a global memory map within the DSP is described. Using the technique of this...
6658537 DMA driven processor cache  
The present invention provides a mechanism whereby caching operations, such as prefetch and copyback operations, can be initiated by an external direct memory access (DMA) controller. This allows...
6657633 DMA computer system for driving an LCD display in a GPS receiver  
A DMA computer system ( 10 ) for driving a peripheral device such as an LCD display ( 12 ) of a GPS receiver without stealing excessive cycles from a CPU ( 18 ). The DMA computer system ( 10 )...
6654835 High bandwidth data transfer employing a multi-mode, shared line buffer  
A technique for transferring data between a first device and a second device using a shared line buffer connected to a system bus which couples the first device and the second device. The technique...
6654819 External direct memory access processor interface to centralized transaction processor  
An external direct memory access unit includes an event recognizer recognizing plural event types, a priority encoder selecting for service one recognized external event, a parameter memory storing...
6654853 Method of secondary to secondary data transfer with mirroring  
Data transfers from the peripheral interface of a disk array to a data buffer are snooped to determine if the starting address of a data transfer matches an entry in a list of starting addresses...
6651115 DMA controller and coherency-tracking unit for efficient data transfers between coherent and non-coherent memory spaces  
In a computer system, an agent, a DMA controller and a memory controller are provided, each in communication with a bus. The DMA controller and the memory controller also can communicate with each...
6651119 Method for allocating priorities to plurality of DMA engines for processing data packets based on bus phase and transactions status  
A method and apparatus for processing data packets through direct memory access (DMA) in transferring data packets between a bus and an apparatus containing DMA engines. The DMA engines process...
6651113 System for writing data on an optical storage medium without interruption using a local write buffer  
A method for writing data on an optical storage medium in an optical storage device includes transferring data by a direct memory access process from a host buffer allocated in a memory of a host...
6651114 DMA controller which optimizes transfer rate of data and method therefor  
A DMA controller is arranged to transfer data in units of one byte, one by one, by hand shaking when a transfer request signal is asserted by a low-speed I/O device, and is arranged to continuously...
6647438 Direct memory access transfer reduction method and apparatus to overlay data on to scatter gather descriptors for bus-mastering I/O controllers  
Direct memory access (DMA) transfers to read data from memory are reduced by overlaying data into an immediate data space of a descriptor ring. The descriptor ring includes a context descriptor...
6643716 Method and apparatus for processing serial data using a single receive fifo  
The present invention discloses a method and apparatus for processing a packet of data received by a first-in-first-out (FIFO). In one embodiment, a message in the packet of data is recognized....
6636906 Apparatus and method for ensuring forward progress in coherent I/O systems  
A snapshot mechanism that includes an apparatus and method for tracking DMA read requests for cacheable data that can be altered before the data is returned to a requesting I/O device is herein...
6633926 DMA transfer device capable of high-speed consecutive access to pages in a memory  
A DMA transfer device transfers data from a first region to a second region in a memory allowing high-speed page access. The DMA transfer device includes: a first detecting unit for detecting a...
6628289 Rendering apparatus and method, and storage medium  
A rendering apparatus has an image generation unit for generating a source image, an address generation unit for generating the read and write addresses of a bitmap memory, a DMA read unit for...
6629186 Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment  
A bus controller and its associated device drivers are provided to a digital system to operate and control a peripheral bus, including the selective operation of at least a first portion of the...
6629161 Data processing system and data processing method  
A data processing system comprises: a plurality of data processing modules for performing a series of data processing, wherein each of the plurality of data processing modules processes data; a bus...
6629164 Character counter and match registers in a serial interface  
A method is described for controlling commands and data in a serial data stream received by a serial controller in a serial interface. A character count register is programed with a maximum number...
6629160 Direct memory access controller  
The present invention provides a direct memory access controller used for carrying out a direct memory access transfer of data from a first memory to a second memory, wherein the direct memory...
6625157 Apparatus and method in a network switch port for transferring data between buffer memory and transmit and receive state machines according to a prescribed interface protocol  
A network switch in a packet switched network includes a plurality of network switch ports, each configured for sending and receiving data packets between a medium interface and the network switch....
6622181 Timing window elimination in self-modifying direct memory access processors  
A direct memory access function for servicing real-time events, ensures that any parameter reloads occur during times when the direct memory access channel is idle and guarantees completion before...
6622193 Method and apparatus for synchronizing interrupts in a message passing queue oriented bus system  
In a message-passing, queue-oriented bus system, a separate interrupt work queue assigned to each interrupt line for each PCI device sends interrupt information packets from the device to the host....
6615292 Data transfer apparatus performing DMA data transfer from non-consecutive addresses  
A DMA transfer device according to the present invention allows data to be transferred from non-consecutive addresses. A logical address controller checks if logical addresses of data transferred...
6615291 DMA controller with dynamically variable access priority  
A bus monitor section 8 calculates bus-occupancy rate for each of the DMA control sections 1 to 3 connected to a bus 5 in accordance with bus-use permission signals ack 1 to ack 3 ,...
6611882 Inbound and outbound message passing between a host processor and I/O processor local memory  
Method of passing inbound messages to an I/O processor's local memory. A message is received in a messaging unit within the I/O processor. The messaging unit is read to fetch the message. A free...
6611905 Memory interface with programable clock to output time based on wide range of receiver loads  
A data processing system, and a method of operating a data processing system. The data processing system comprises a clock generator for generating a system clock signal, and a memory unit having a...
6606673 Direct memory access transfer apparatus  
Two-dimensional addresses of lateral lines of a rectangular area are produced in a prescribed scanning order in a sender-memory control unit as readout addresses of a sender's memory, pieces of...
6606672 Single-chip-based electronic appliance using a data bus for reading and writing data concurrently  
An electronic or information appliance, for example an LCD projector, air-conditioner or washing machine, which can use a data bus to read and write data at the same time. The electronic or...
6604151 Control apparatus for composite appliance  
The control apparatus reads the value of an external switch, and checks whether the apparatus serves as a control side or subordinate side. If the control apparatus serves as a subordinate side, it...
6601118 Dynamic buffer allocation for a computer system  
A system for dynamically allocating buffers between components in a computer system is described. The system uses matched sets of bi-directional buffers to control data flow between the processor...
6598097 Method and system for performing DMA transfers using operating system allocated I/O buffers  
A method and system for performing direct memory access (DMA) transfers using operating system allocated I/O buffers provides a mechanism for device to device transfers without utilizing global...
6594712 Inifiniband channel adapter for performing direct DMA between PCI bus and inifiniband link  
An Infiniband channel adapter for performing direct data transfers between a PCI bus and an Infiniband link without double-buffering the data in system memory. A local processor programs the...
6594711 Method and apparatus for operating one or more caches in conjunction with direct memory access controller  
A data processing apparatus includes a data processor core having integral cache memory and local memory, and external memory interface and a direct memory access unit. The direct memory access...
6584513 Direct memory access (DMA) transmitter  
A direct memory access (DMA) transmitter includes: (a) a data register; and (b) a transmitter state machine. Requested data at an address provided by a source is read from the random access memory...
Matches 501 - 550 out of 1080 < 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 >