Matches 1 - 36 out of 36
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7401066 Correlation of end-of-line data mining with process tool data mining  
One embodiment of the present invention is a process tool optimization system that includes: (a) a data mining engine that analyzes end-of-line yield data to identify one or more process tools...
7149828 Bus arbitration apparatus and bus arbitration method  
The present invention is to provide a bus arbitration apparatus and a bus arbitration method not reducing data transfer capability as a whole and preventing a loss of transferred data. It performs...
7143219 Multilevel fair priority round robin arbiter  
A method and apparatus for controlling access to a plurality of resources based on multiple received requests is provided. The system includes a priority register configured to receive each...
6823412 System and method for arbitration of a plurality of processing modules  
Method and apparatus for an arbitrated high speed control data bus system providing high speed communications between microprocessor modules in a complex digital processing environment. The system...
6721799 Method for automatically transmitting an acknowledge frame in canopen and other can application layer protocols and a can microcontroller that implements this method  
A method for use in a CAN device (e.g., a CAN microcontroller) that includes a processor core, for automatically transmitting an acknowledge message. The method includes the steps of receiving a...
6721833 Arbitration of control chipsets in bus transaction  
A bus arbitration method within a control chipset, The control chipset further comprises a first control chip and a second control chip, data are transferred between the first and the second...
6615302 Use of buffer-size mask in conjunction with address pointer to detect buffer-full and buffer-rollover conditions in a CAN device that employs reconfigurable message buffers  
A CAN microcontroller that supports a plurality of message objects, and that includes a CAN processor core, a plurality of message buffers associated with respective ones of the message objects, a...
6546508 Method and apparatus for fault detection of a processing tool in an advanced process control (APC) framework  
A method and apparatus for providing fault detection in an Advanced Process Control (APC) framework. A first interface receives operational state data of a processing tool related to the...
6408219 FAB yield enhancement system  
A yield enhancement system organizes defect classification and attribute information into a global classification scheme. The global classes are used to identify defect sources and to generate...
6223244 Method for assuring device access to a bus having a fixed priority arbitration scheme  
Computer-based devices, whether initiators or targets, are assured access to a bus having a fixed priority arbitration scheme (such as a SCSI bus) by assigning to each initiator a "fair share" of...
6003103 Method for attachment or integration of a bios device into a computer system using a local bus  
Chipset or a device for attachment of the ROM BIOS within the system architecture. Although normally attached to the ISA bus, the ROM BIOS may be attached to an alternate bus (typically a...
5974497 Computer with cache-line buffers for storing prefetched data for a misaligned memory access  
In a computer including two buses, a main memory, a write back cache, and a peripheral device, a method and apparatus for providing an inter-bus buffer to support successive main memory accesses...
5856921 Apparatus and method for intermodular communications using system bus controllers  
A system bus architecture for intermodular communications is disclosed. The system bus architecture comprises a backplane bus with associated memory and a plurality of control registers. A master...
5751974 Contention resolution for a shared access bus  
Data communication stations 10, 12, 14 are connected by way of a shared bus 15 common to all the communication stations. When two stations attempt to access the shared bus simultaneously, a...
5706469 Data processing system controlling bus access to an arbitrary sized memory area  
A novel data processing system is disclosed. Least significant bits of an address of a to-be-accessed memory of a number corresponding to a minimum specified range of a plurality of...
5692136 Multi-processor system including priority arbitrator for arbitrating request issued from processors  
In a multi-processor system, a priority arbitrator receives a request issued from each of processors, and arbitrates conflicts occurring among the requests. The requests derived from the respective...
5586265 Priority arbitrating interface for a plurality of shared subsystems coupled to a plurality of system processing devices for selective association of subsystem to processing device  
The electronic postage meter includes a printing unit which is responsive to a plurality of motors for printing of a postage indicia in response to a control circuit. The control circuit is...
5513372 Peripheral interface having hold control logic for generating stall signals to arbitrate two read and one write operations between processor and peripheral  
A peripheral interface unit (PIU) used by a microcontroller or microprocessor core having a pipelined architecture to access peripheral modules across a peripheral bus (PBUS). Data read or write...
5506964 System with multiple interface logic circuits including arbitration logic for individually linking multiple processing systems to at least one remote sub-system  
A data processing and transmission network includes plural information processing systems and shared sub-systems remote from the information processing systems. Each shared sub-system includes an...
5414818 Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol  
The present invention provides a method and apparatus for dynamically modifying the priority of access to a bus, where the bus has control and arbitration functions distributed among the devices...
5307466 Distributed programmable priority arbitration  
A distributed arbitration scheme for a communications bus wherein the bus interface modules decide among themselves who should next use the bus. The protocol is a common multiprocessor backplane...
5283902 Multiprocessor system having time slice bus arbitration for controlling bus access based on determined delay time among processors requesting access to common bus  
A method and device operate a system that contains several processors with different priority rankings. The overall system starts its operation as an arbitrating system. The conflict time resulting...
5038274 Interrupt servicing and command acknowledgement system using distributed arbitration apparatus and shared bus  
Each user of an intercommunication bus is associated with a distinct channel of an arbitration bus and maintains a priority record indicating its current priority status against each other user....
4779089 Bus arbitration controller  
A bus arbitration controller controls access of a plurality of asynchronous potential master devices to a unitary interconnecting bus by forming a distributed state machine of arbitration logic...
4766536 Computer bus apparatus with distributed arbitration  
A bus apparatus for interconnecting a plurality of nodes is disclosed. The nodes may comprise processors, input/output subsystems, or the like. Each node maintains a unique priority number; the...
4760515 Arbitration apparatus for determining priority of access to a shared bus on a rotating priority basis  
An arbitration apparatus for use within a computer system comprises a plurality of individual arbiters arranged in a particular configuration wherein some individual arbiters are higher in the...
4745548 Decentralized bus arbitration using distributed arbiters having circuitry for latching lockout signals gated from higher priority arbiters  
A silicon semiconductor wafer containing a plurality of silicon integrated circuits formed therein or attached thereto contains at least one data bus to which some of the circuits are connected....
4454581 Bus contention circuit  
A bus contention circuit, is employed for each unit of a system capable of seizing use of a bus, wherein the units are arranged in a priority order. Priority resolution is accomplished by...
4404628 Multiprocessor system  
A multiprocessor system comprising a plurality of processors and a memory unit which are connected through a common bus whereby each processor communicates with the memory through the bus....
4334288 Priority determining network having user arbitration circuits coupled to a multi-line bus  
A priority determining network to concurrently arbitrate between a plurality of requests that are initiated by different users who each desire either access to a system (e.g. a computer, a...
4321669 Microcomputer network having several microcomputer modules which are coupled onto at least one system bus  
In a microcomputer system resource and priority testing of modules is provided by first testing for readiness to exchange information via all modules, then testing for the priority assigned to the...
4320467 Method and apparatus of bus arbitration using comparison of composite signals with device signals to determine device priority  
A bus arbitration method and apparatus for determining which of a plurality of devices desiring access to a common bus will gain access to the bus when it becomes available. Using the change of...
4232366 Bus for a data processing system with overlapped sequences  
A digital data processing system including an interconnection for the various elements that constitute the system. Each element that connects to the interconnection is called a nexus. For one...
3983540 Rapid bus priority resolution  
In a computer system wherein a number of peripheral devices contend with each other for access to a communication bus, a priority selection system is provided. The priority selection system...
3680053 DATA TRANSMISSION SYSTEMS  
A data transmission highway, in the form of a ring has a plurality of data handling devices connected thereto. A different priority number is allocated to each device. When a device wishes to...
3445822 COMMUNICATION ARRANGEMENT IN DATA PROCESSING SYSTEM  
Matches 1 - 36 out of 36