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7617343 |
Scalable bus structure
A processing system is disclosed with a sending component and a receiving component connected by a bus. The bus may be configured with transmit and receive channels. The transmit channel may have a...
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7613863 |
High-speed data readable information processing device
A CAN module receives a message from a CAN bus to store the same in a message box unit of a message box. A reception request signal is output from the message box unit to a DMAC/IF. The DMAC/IF...
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7613859 |
Back-off timing mechanism in a digital signal processor
Systems and methods for implementing back-off timing for retries of commands sent from a master device to a slave device over a split-transaction bus. One embodiment includes a buffer having...
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7613849 |
Integrated circuit and method for transaction abortion
An integrated circuit includes processing modules and an interconnect device for coupling the processing modules and for enabling a device-level communication based on transactions between the...
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7613841 |
Systems and methods for reducing data storage in devices using multi-phase data transactions
Systems and methods for enforcing in-order execution of commands sent from a master device to a slave device, where it is not necessary to provide a data buffer to store data associated with...
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7610423 |
Service interface to a memory system
A cascaded interconnect system for providing a service interface to a memory system. The cascaded interconnect system includes a master service interface module, a service interface bus, and one or...
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7610422 |
Isolation and transmission of digital signals in intended direction
An interface between two or more integrated circuit devices employs isolation techniques to provide electrical isolation of a digital signal for transmission of the digital signal between a master...
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7609540 |
Serial bus controller using nonvolatile ferroelectric memory
A serial bus controller using a nonvolatile ferroelectric memory is provided. The memory controller structure using a nonvolatile ferroelectric register enables control of variable access time...
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7606956 |
12C slave device with programmable write-transaction cycles
Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate...
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7606955 |
Single wire bus for connecting devices and methods of operating the same
A master/slave system architecture that includes a single wire bus, a master device and bus interface coupled to the bus. The system further includes plurality of slave devices having respective...
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7605695 |
Automatic discovery and classification of detectors used in unattended ground sensor systems
An interface includes a port that communicates with one of N detectors, where N is an integer greater than 1. A classification module communicates with the port and classifies the detector as one...
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7603501 |
Communication circuit of serial peripheral interface devices
A communication circuit of a serial peripheral interface (SPI) device includes a master device and a plurality of slave devices. One of the slave devices includes a plurality of general purpose...
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7603487 |
Hardware configurable hub interface unit
A data transfer apparatus with hub and ports includes design configurable hub interface units (HIU) between the ports and corresponding external application units. The configurable HIU provides a...
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7593498 |
Method and apparatus for automatic rate identification and channel synchronization in a master-slave setting for high data throughput applications
Methods and apparatus are provided for automatic rate identification and channel synchronization in a master-slave setting for high data throughput applications. An interface is provided for use...
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7587717 |
Dynamic master/slave configuration for multiple expansion modules
A computing system having expansion modules. One of the expansion modules is identified as a master module. The other modules act as slaves to the master module. The central processing unit routes...
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7587542 |
Device adapted to send information in accordance with a communication protocol
A multiple use core logic chip set is provided in a computer system that may be configured either as a bridge between an accelerated graphics port (“AGP”) bus and host and memory buses, as a...
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7587541 |
Master-slave device communication circuit
A master-slave device communication circuit includes a master device, a bus, and a slave device having a bus switch connected to the master device via the bus, and a status detecting circuit. The...
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7587523 |
Distributed systems for determining card status
The master/slave arbitration process includes a voting process that allows cards within the system to use voting to determine the health of each of the individual cards. The voting process thereby...
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7584305 |
Serial peripheral interface circuit
An exemplary serial peripheral interface circuit includes a host, a plurality of slaves, and a decoder. A data output terminal, a data input terminal, and a serial clock terminal of the host are...
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7581049 |
Bus controller
A single bus apparatus enables the simultaneous execution of both high-speed data transfer, which requires real time operation, and low-speed data transfer. At least one of slaves I/F 22 - 0, 22 -...
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7577779 |
Method and system for a RFIC master
Methods and systems for a RFIC master are disclosed. Aspects of one method may include configuring an on-chip programmable device that may function as a master on a bus that has at least one device...
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7577756 |
Dynamically-and continuously-variable rate, asynchronous data transfer
A method of dynamically- and continuously-variable rate asynchronous data transfer, such as for use in an electronic blasting system, may employ a device that transmits data including...
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7568060 |
Method and system for interfacing components of a computing system with a pair of unidirectional, point-to-point buses
A method of interfacing two components of a computing system is provided wherein the method includes providing a pair of unidirectional, point-to-point buses to transmit data between a master bus...
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7565470 |
Serial bus device with address assignment by master device
The present invention offers a daisy chain serial bus system. For bus construction, the slave device has a first data transmission port to transfer serial data with its upward connected device and...
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7565420 |
Method for initializing a distributed software architecture and an electronic system
The present invention relates to a method for initializing a distributed software architecture as well as an electronic system. A control module for a network function is made available in the form...
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7562172 |
I2C Slave/master interface enhancement using state machines
Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate...
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7562171 |
Method for interfacing components of a computing system with a pair of unidirectional, point-to-point buses
A method of interfacing two components of a computing system is provided wherein the method includes providing a pair of unidirectional, point-to-point buses to transmit data between a master bus...
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7558895 |
Interconnect logic for a data processing apparatus
An interconnect logic and method are provided for controlling transaction reordering by slave logic units coupled to the interconnect logic. The interconnect logic couples master logic units and...
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7558894 |
Method and system for controlling power provided to an accessory
A method for a portable media player to control power provided an accessory is disclosed. The method includes requesting information about the power capabilities of the accessory by the portable...
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7552270 |
Signal transmission method, bridge unit, and information processing apparatus
An information processing apparatus having a fat tree structure, in which signal transmission across node columns managed by respective processor units is performed through end point bridges...
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7549004 |
Split filtering in multilayer systems
Circuitry and methods enable masters without split capability to communicate with split capable slaves in a multilayer system. The output stage associated with each split capable slave, which...
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7549003 |
Creation and management of destination ID routing structures in multi-host PCI topologies
System and method for managing routing of data in a distributed computing system, such as a distributed computing system that uses PCI Express protocol to communicate over an I/O fabric. A physical...
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7543088 |
Various methods and apparatuses for width and burst conversion
Methods and apparatuses are described for a communication system. The communication system comprises an initiator core supporting a first burst capability as well as a target core supporting a...
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7539804 |
Communication apparatus
An airbag ECU includes a communication bus connection circuit for connecting communication buses to communication circuits. A central control circuit connects some of the communication buses to the...
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7536492 |
Apparatus, system, and method for automatically resetting an inter-integrated circuit bus
An apparatus, system, and method are disclosed for resetting an inter-integrated circuit (I2C) bus slave. A data line resistor in series is provided with a data line of an I2C bus in communication...
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7533205 |
Control method and system of constructing raid configuration across multiple host bus adapters
A control method of constructing a RAID configuration across multiple host bus adapters in a data-processing system includes the following steps. Firstly, a master host bus adapter and at least a...
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7532636 |
High bus bandwidth transfer using split data bus
Methods and apparatus for achieving high bus bandwidth transfer using a split data bus. A data bus is split into multiple segments whose access is, individually controlled by an arbitration control...
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7529869 |
Mixed-signal single-chip integrated system electronics for data storage devices
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated...
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7529862 |
System for providing access of multiple data buffers to a data retaining and processing device
An area efficient system that includes a first circuit to synchronize a clock signal and a data signal and a data retaining and processing device to receive data from said data bus to thereby...
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7526595 |
Data path master/slave data processing device apparatus and method
An apparatus and method is described for data processing in a computer system. The apparatus comprises a data processing device having a data processing master, a functionally coupled data...
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7526589 |
Apparatus, system, and method for resetting an inter-integrated circuit data line using a negative voltage
An apparatus, system, and method are disclosed for resetting an inter-integrated circuit (I2C) data line with negative voltage. A hang detection module detects an I2C hung line selected from a data...
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7523324 |
Method and apparatus for improving bus master performance
A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU...
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7523243 |
Multi-host USB device controller
A shared USB device may be simultaneously configured and accessed by two or more USB hosts by using a multi-host capable device controller. The multi-host capable device may include separate...
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7523239 |
Bus communication system
A bus communication system is equipped with an operation scheme based on a trouble detection method that prevents a halt of the entire bus communication system by partially operating the system...
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7522073 |
Self-adapted bus inversion
Embodiments of the invention generally provide methods, systems, and articles of manufacture for selecting a data bus inversion (DBI) mode of operation. A comparison circuit of a device may receive...
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7519848 |
Data transfer apparatus
A data transfer apparatus includes at least one master and a plurality of slaves connected by a ring-connection bus, and a controller having a master port and slave ports connected to the...
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7519754 |
Hard disk drive cache memory and playback device
A NOR emulating device using a controller and NAND memories can be used in a computer system in placed of the main memory or in place of the BIOS NOR memory. Thus, the emulating device can function...
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7519753 |
Communication system
A communication system includes a master control unit, a plurality of slave control units, and buses connecting the master control unit and the slave control units for the asynchronous...
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7519005 |
Single-wire communication bus for miniature low-power systems
A single-wire serial communications bus has a master device and one or more slave devices. The slave devices are addressed according to a predetermined addressing scheme in an address space. The...
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7516258 |
Electronic apparatus and control method
An electronic apparatus includes a memory, first and second bus masters, a counting unit and a control unit. The first and second bus masters are capable of accessing the memory. The counting unit...
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