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7523324 |
Method and apparatus for improving bus master performance
A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU...
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7523243 |
Multi-host USB device controller
A shared USB device may be simultaneously configured and accessed by two or more USB hosts by using a multi-host capable device controller. The multi-host capable device may include separate...
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7519754 |
Hard disk drive cache memory and playback device
A NOR emulating device using a controller and NAND memories can be used in a computer system in placed of the main memory or in place of the BIOS NOR memory. Thus, the emulating device can function...
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7519005 |
Single-wire communication bus for miniature low-power systems
A single-wire serial communications bus has a master device and one or more slave devices. The slave devices are addressed according to a predetermined addressing scheme in an address space. The...
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7519753 |
Communication system
A communication system includes a master control unit, a plurality of slave control units, and buses connecting the master control unit and the slave control units for the asynchronous...
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7519848 |
Data transfer apparatus
A data transfer apparatus includes at least one master and a plurality of slaves connected by a ring-connection bus, and a controller having a master port and slave ports connected to the...
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7516257 |
Mechanism to handle uncorrectable write data errors
According to one embodiment, a system is disclosed. The system includes an initiator device to transmit input/output (I/O) write data and a target device, coupled to the initiator device, to...
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7516258 |
Electronic apparatus and control method
An electronic apparatus includes a memory, first and second bus masters, a counting unit and a control unit. The first and second bus masters are capable of accessing the memory. The counting unit...
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7512729 |
Method and apparatus for a high efficiency two-stage rotating priority arbiter with predictable arbitration latency
A scalable, two-stage rotating priority arbiter with re-circulation and bounded latency for use in multi-threaded, multi-processing devices. An apparatus implementing the two-stage arbiter includes...
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7509446 |
IIC bus communication system capable of suppressing freeze of IIC bus communication due to a noise and method for controlling IIC bus communication
Multiple master devices and multiple slave devices are connected in parallel to two bus lines including a SCL line 1 and a SDA line 2 , and a pullup resistor is connected between the bus lines...
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7505377 |
Digital copy machine
The digital copying machine has a printer, a writer and optionally a disk destruction devise connected to a personal computer by a USB port cable. The computer can select files from its hard drive...
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7506089 |
Bus system and method thereof
A bus system including first and second blocks. The bus system is configured such that data may be transferred at the first block at the same time that data may be transferred at the second block.
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7506080 |
Parallel processing of frame based data transfers
A frame based data transfer device includes a receive frame parser, a receive frame processor, and a DMA engine. The receive frame parser receives a frame, stores framing information from the frame...
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7506146 |
Fast and compact circuit for bus inversion
A bussed system with a fast and compact majority voter in the circuitry responsible for the bus inversion decision. The majority voter is implemented in analog circuitry having two branches. One...
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7493433 |
System, method and storage medium for providing an inter-integrated circuit (I2C) slave with read/write access to random access memory
A method for data access via an inter-integrated circuit (I2C) protocol. The method includes receiving an I2C read command at an I2C slave device, where the I2C read command is from an I2C master...
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7492189 |
Current mode bus interface system, method of performing a mode transition and mode control signal generator for the same
A current mode bus interface system includes a host interface device configured to transmit a reference current and a clock current, and to transmit a data current during a first transfer mode, and...
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7490188 |
Apparatus and method for USB data transmission in hybrid terminal including two CPUs utilizing two memories
An apparatus and a method for sharing an USB port and transmitting data in a hybrid terminal including both two CPUs and memories corresponding to the two CPUs are disclosed. In the apparatus and...
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7487266 |
Communication system and method, and distributed control system and method
A communication system performs bidirectional communication through a same communication path every communication cycle period between a master station and a slave station. From the start of the...
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7475176 |
High bandwidth split bus
A system includes a first bus segment and a second bus segment. The first bus segment is operatively coupled to one or more first bus agents, where the first bus agents are configured for writing...
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7475177 |
Time and frequency distribution for bufferless crossbar switch systems
A bufferless crossbar switch system and technique for synchronization and error recovery between switch line cards is provided. A network switches data through the bufferless data crossbar switch...
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7475178 |
Hot-plug link apparatus and method using a direction line to indicate presence of a hot-plug device
An apparatus for linking a hot-plug device to a host includes a slave interface circuit for connection to the host; a master interface circuit for connection to the hot-plug device; and direction,...
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7467246 |
Secure local network
A local network comprises at least one master and a plurality of slaves which can be controlled by the master via a data bus, with at least one slave being arranged in an unprotected region and at...
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7466608 |
Data input/output circuit having data inversion determination function and semiconductor memory device having the same
A data input/output circuit of a semiconductor memory device has a data inversion determination function. In an input mode, the data input/output circuit inverts an input data group in response to...
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7464206 |
Semiconductor device and method of connecting the same
According to the present invention, there is provided a semiconductor device comprising:
a power line to be externally supplied with a power supply voltage; a ground line for grounding; a...
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7461188 |
Capacitive multidrop bus compensation
The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear...
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7457891 |
DMA controller connected to master and slave device wherein a rank is used for judging data transfer permissibility
A DMA controller is connected by a bus to a plurality of master devices and a plurality of slave devices, and performs a data transfer between slave devices which are specified as a source and a...
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7451026 |
Control unit for controlling and/or regulating at least one vehicle function
A control unit for controlling and/or regulating at least one vehicle function, including at least one computing element and one transceiver for connecting the control unit to at least one data...
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7444668 |
Method and apparatus for determining access permission
A method and apparatus for determining access protection ( 96 ) includes receiving a plurality of access requests ( 84 ) corresponding to a plurality of masters ( 12, 14 ), determining access...
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7437493 |
Modular architecture for a network storage controller
A network storage controller for transferring data between a host computer and a storage device, such as a redundant array of inexpensive disks (RAID), is disclosed. The network storage controller...
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7426709 |
Auto-generation and placement of arbitration logic in a multi-master multi-slave embedded system
An FPGA design system includes the use of constraints in order to determine whether to associate arbitration logic with a bus or in slave modules. In one embodiment, area constraints can be used to...
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7426600 |
Bus switch circuit and bus switch system
A bus switch circuit having plural master side interface circuits inputting/outputting signals for plural bus masters respectively, and one or plural slave side interface circuit(s)...
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7421527 |
Transmission apparatus and transmission method
A small-sized and low-cost transmission apparatus and a transmission method (having a high responsivity) capable of transmitting an interrupt signal with a small number of input/output terminals...
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7418535 |
Bus system and method of arbitrating the same
A bus system, which may prevent data from being incorrectly transferred when an early termination occurs during a burst mode, may include a bus, for example, an advanced high-performance bus (AHB),...
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7415554 |
System and method for parallel data transmission
A system for parallel data transmission including a master device and a slave device is provided. The master device includes a first and a second I/O ports for outputting a read signal and a write...
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7415562 |
Variable-function or multi-function apparatus and methods
An apparatus capable of interacting with another device, includes: a module configured to provide a functionality, where the apparatus is configurable to support a second module for providing an...
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7415555 |
Bus bridge device
A bus bridge device, which connects a first device executing a first process and a second device executing a second process in response to a request from the first device, includes a notifying unit...
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7412500 |
Method and apparatus for using a serial cable as a cluster quorum device
A method for obtaining a quorum vote by a first node using a quorum cable, wherein the quorum cable comprises a first end connected to the first node and a second end connected to a second node,...
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7412550 |
Bus system with protocol conversion for arbitrating bus occupation and method thereof
A bus system including a bus arbiter and a plurality of masters. The bus arbiter grants bus control to one of the plurality of masters. When a master with bus control sends a read command, bus...
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7412556 |
Method and system for master devices accessing slave devices
Techniques for multiple master devices accessing one or more slave devices via a single data bus are disclosed. According to one aspect of the techniques, a bus controller coupled between the...
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7406551 |
Bus configuration circuit
A bus configuration circuit includes a first group having a first master module, a first slave module and a first bus module group; a second master module and a second slave module disposed outside...
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7404054 |
Information processing device and processor
A device with a small number of circuits is provided for blocking illegal address access from a bus master device connected to the processor system bus. An illegal address blocking circuit is...
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7404022 |
Method and system for transmission and control of data stored in a USB master to and for utilization by a USB slave
The present invention concerns a method and a system for data transmission and control based on Universal Serial Bus (USB). The system comprises a USB Master device and a USB Slave device. The USB...
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7395364 |
Data transfer control apparatus
A data transfer control apparatus has a plurality of bus slaves connected to a bus master via a bus interface unit for RAM connected to the bus master via a master bus, and a transfer bus which...
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7395362 |
Method for a slave device to convey an interrupt and interrupt source information to a master device
A computer system, more generally a master-slave system, may be configured with interrupt handling capability without additional dedicated interrupt lines. An interrupt condition may be bound with...
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7386634 |
Control method for bus provided with internal switch
In a bus, which is provided with a switch having a plurality of master ports and a plurality of slave ports and can connect each of the plurality of master ports to an arbitrary port of the...
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7380042 |
Method of detecting and monitoring master device communication on system bus
A bus monitoring device includes a detector to detect a signal on the bus. The signal is initiated by one of a plurality of devices coupled to the bus. A clamp circuit is included to clamp the...
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7380033 |
Communication apparatus implementing time domain isolation with restricted bus access
A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital...
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7376771 |
Generic interface for operating modes of modules
A generic interface for a module, method of providing a generic interface, and a module controller system providing a register slave having a generic interface are described. The interface includes...
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7373453 |
Method and apparatus of interleaving memory bank in multi-layer bus system
A method and apparatus of interleaving memory banks in a multi-layer bus system. The apparatus includes a plurality of slave interface units receiving signals requesting a bus access and generating...
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7373444 |
Systems and methods for manipulating entries in a command buffer using tag information
Systems and methods for facilitating the location of entries in a buffer where a slave device stores information related to an active transaction so that the entries can be removed if the...
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