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6810459 |
Reduced complexity computer system architecture
An architecture for a computer system that has lower complexity than prior computer system architectures. In one embodiment the functionality that in prior computer system architectures resides in...
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6803857 |
Remote control system
A controller has means responsive to a continuous press of a continuously operable key to transmit, to an electronic device, a key command indicative of a type of the pressed key, and means for...
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6804263 |
Controlling the state of a node connected to a bus during the self identification phase of bus arbitration
A data network has a bus to which are connected a given node, a parent node and a child node; and arbitration over acquisition of the bus is performed before data is communicated between nodes....
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6804734 |
Device and method for switching receiving/recording device in a broadcasting connection/point-to-point connection bus enviroment
An information processing device, method thereof and a recording medium for easily switching input signals. A broadcast connection and a point-to-point connection are established between the...
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6801054 |
Output buffer circuit
An output buffer circuit is disclosed that can enhance AC performance and suppress reflected noise. An output buffer circuit can include a first driver circuit ( 2 1 ) and at least one second...
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6801969 |
Method and apparatus for data dependent, dual level output driver
The inter-symbol interference problem is reduced by detecting a data sequence indicating when a boost is needed on a ‘short pulse’, usually the first data pulse of the opposite polarity after a...
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6799239 |
Centrally distributed serial bus
A bus for a computer system receives serial data from each subsystem and simultaneously broadcasts the data to all subsystems. The computer system includes bus interface logic in each subsystem....
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6795882 |
High speed asynchronous bus for an integrated circuit
An apparatus for providing a high speed asynchronous bus for a plurality of modules of an integrated circuit is disclosed. Each of the modules may comprise one or more clock domains. The apparatus...
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6795887 |
Modular MFP/printer architectures
Modularized intra-system architectures for printer and multifunction peripheral (MFP) devices are based on disintegrating traditionally highly integrated systems into separate system components...
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6792491 |
Invoking ACPI source language code from interrupt handler
In one embodiment of the invention, an embedded controller receives an interrupt command and a query number from a system management interrupt (SMI) handler. The embedded controller generates a...
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6792490 |
System and method for hiding peripheral devices from a host processor in a computer system
A computer system with an Intelligent Input/Output architecture having a dynamic device blocking mechanism for hiding at least a portion of peripheral devices. The computer system comprises at...
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6792505 |
System apparatus and method for storage device controller-based message passing having effective data channel bandwidth and controller cache memory increase
Controller for coupling data between a data storage system and a host includes a first processor and a first RAM coupled to the first processor; a first auxiliary processor including a first memory...
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6789146 |
Socket for receiving a single-chip video controller and circuit board containing the same
A circuit board socket is provided which is adapted to accept a plug-in single video controller having embedded video memory. The socket allows a circuit board to be easily wired to accommodate...
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6785775 |
Use of a cache coherency mechanism as a doorbell indicator for input/output hardware queues
A method of and apparatus for improving the scheduling efficiency of a data processing system using the facilities which maintain coherency of the system's level cache memories. These efficiencies...
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6785778 |
Share masks and alias for directory coherency
A directory tag for each cache line in a memory within a multiprocessor distributed memory system includes a share mask and an alias signature. The share mask is used to keep track of entities of...
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6782438 |
IO speed and length programmable with bus population
A system and circuitry is described for a programmable PCI/PCI-x bus that accepts PCI and PCI-x controller cards and associated IO devices. The operating speed of the bus is reduced in accordance...
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6782437 |
Method of communicating on a network
A method for communicating on a SCSI bus permits out-of-band addressing and communication for normally non-addressable devices such as SCSI expanders and terminators. The method remaps 18 SCSI data...
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6778526 |
High speed access bus interface and protocol
A high speed access bus interface for a communications network. The interface allows uni-directional transfer of data packets at a fast path processing rate of about 10 gigabits per second. The...
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6775714 |
Communication method, communication apparatus, communication system and providing medium
An object of this invention is to enable a lock transaction to be carried out between apparatuses connected through a bus such as IEEE 1394 method with fewer data transmission processings. If a...
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6775725 |
Preparation and execution of a program in an additional chip card of a terminal
To execute a program in a second chip card, inserted in a terminal in addition to a first chip card, containing data relating to the owner of the first card, the second card communicates with the...
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6772251 |
Bit interleaved data serial interface
A shared wire serial interface between two devices that share a system clock and a single bi-directional serial data line. The clock drives both the system and the interface and is provided over a...
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6772056 |
Data bus for constraint means in a vehicle
Data bus for constraint devices, which connects a control unit to the constraint devices, which are connected to the data bus via transformers. The data is then transmitted over the data bus using...
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6772249 |
Handheld option pack interface
An interface of an option pack configured to be used in conjunction with the main unit of a Personal Digital Assistant (PDA). An option pack comprising a connector configured to mate with the main...
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6772250 |
Boundary scannable one bit precompensated CMOS driver with compensating pulse width control
An improved data driver, method, and system for driving data with an improved slew rate and eye opening is provided. In one embodiment, the data driver includes a non-precompensating data driver...
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6769622 |
System and method for simulating universal serial bus smart card device connected to USB host
A system and method simulates a universal serial bus (USB) smart card device connected to a USB host device for development and debugging and includes a computer simulator and USB host device with...
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6765413 |
Bus circuit preventing delay of the operational speed and design method thereof
In a bus circuit which includes a plurality of signal lines, insertion pattern α, which provides repeaters in only an odd numbered series of signal lines, and insertion pattern β, of which the...
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6766395 |
Extended common mode differential driver
A driver ( 300 ) which meets wide common mode voltage requirements is provided. Output passgates ( 310 ) protect sensitive line driver circuitry ( 305 ) from extreme bus voltages;...
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6766394 |
Storage apparatus
A battery pack is detachably provided for a drive main body. When carrying, an interface card and a connector cable are detachably supported and fixed to the drive main body by a holder member,...
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6760801 |
Ground referenced voltage source input/output scheme for multi-drop bus
A multi-drop bus input/output method and apparatus is disclosed. The apparatus comprises a multi-drop bus that has termination ends. The multi-drop bus also has a characteristic impedance. The...
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6757244 |
Communication bus architecture for interconnecting data devices using space and time division multiplexing and method of operation
There is disclosed, for use in a communication device, such as an access concentrator, that performs high-speed data transfers between a group of M data drivers and a group of N data receivers, a...
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6757759 |
Microcomputer chips with interconnected address and data paths
A computer system is formed by two interconnected chips each having on chip a CPU connected to a module by an on chip and data path, for distributing event request packets, the paths of the two...
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6757761 |
Multi-processor architecture for parallel signal and image processing
A quad-processor arrangement having 6 communications paths, one path between each of every possible pair of processors. Each processor is provided with a local memory which can be accessed by the...
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6757751 |
High-speed, multiple-bank, stacked, and PCB-mounted memory module
The density for any generation of Standard In-Line Memory Module (SIMM), or Dual In-Line-Memory Module (DIMM), chipset used to provide computer Random Access Memory (RAM), can be multiplied by...
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6757760 |
Method of and apparatus for dispatching a processing element to a program location based on channel number of received data
A dispatching apparatus includes a channel pointer register having storage locations, each with fields for channel number, valid bit, and corresponding instruction pointer which points to...
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6754748 |
Method and apparatus for distributing multi-source/multi-sink control signals among nodes on a chip
A method and apparatus are described for distributing multi-source/multi-sink control signals among nodes on a chip. Each node on the chip assists in returning the control signal to an inactive...
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6754747 |
System and method for configuring an I/O bus
A system and method are provided for configuring an I/O bus. The system and method includes a plurality of adapter cards. A plurality of adapter card slots associated with the I/O busses receive...
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6754746 |
Memory array with read/write methods
Improved circuitry for connecting the memory array to a data bus allows for high speed accessing of the memory array. Sense amplifier latches are coupled to each column of memory cells. The latched...
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6754749 |
Multiple use integrated circuit for embedded systems
An integrated circuit includes a microcontroller core interconnected with a peripheral component interconnect (PCI) interface configurable as a PCI host/CPU bridge when the integrated circuit is...
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6754729 |
Internally connected network interface cards for clustered processing
A single-chassis clustered network system ( 10 ) having internal connectors ( 14 ) that eliminate the need for wiring out the back of the chassis. Each main board ( 11 ) has a network interface...
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6751692 |
Adapter for memory device and connecting method using the same
An adapter for a memory device for connecting a detachable memory device to an AT attachment (ATA) interface of a host computer and a connecting method using the adapter are presented. With a...
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6751697 |
Method and system for a multi-phase net refresh on a bus bridge interconnect
A method and system for a multi-phase net refresh on a bus bridge interconnect, the interconnect comprising a number of nodes, a bus bridge, and a number of buses, are described. In one embodiment,...
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6747874 |
Rack system with rear status indicator and method of use
An information handling system status indicator assembly includes a power jack, cabling and an indicator. The status indicator assembly connects with a status port located at the rear of an...
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6745264 |
Method and apparatus for configuring an interface controller wherein ping pong FIFO segments stores isochronous data and a single circular FIFO stores non-isochronous data
Hardware Description Language (HDL) code is created for an interface controller so that logic requiring device-specific configuration refers to a parameter file. This set of parameters lets...
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6741095 |
Data transmission system, circuit and method
A transmission system and method for transmission of digital data with impedance matching at the terminal ends reduces reflected signals due to impedance mismatch at the terminating ends and due to...
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6742068 |
Data server with hot replaceable processing unit modules
A data server having a plurality of hot replaceable processing unit modules. Each module includes a motherboard having plugged therein: a CPU; a main memory; an I/O adapter card, and an...
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6738834 |
System for reconfiguring a peripheral device using configuration residing on the peripheral device by electronically simulating a physical disconnection and reconnection to a host device
A dynamically and independently reconfigurable multi-mode device, and a method thereof. The device can include a controller for selecting a mode of operation. The device is configured according to...
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6738842 |
System having plural processors and a uni-cast/broadcast communication arrangement
A system having a plurality of processors, each one of the processors being adapted to issue a control signal and a processor ID code. Each one of the processors has: a unique, pre-assigned...
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6738858 |
Cross-bar matrix for connecting digital resources to I/O pins of an integrated circuit
A matrix of routing cells forming a cross-bar decoder ( 310 ). Signal triplets are coupled through the cross-bar decoder ( 310 ) based on control by a microprocessor. A register ( 50 ) provide...
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6738855 |
Communication interface between a TTL microcontroller and a RS232 Device avoiding level translation
A communication interface circuit transfers signals between a TTL microcontroller and a RS232 device while avoiding level translation. The interface circuit includes two switch elements. A first...
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6735651 |
Multi-chip module having chips coupled in a ring
A multi-chip apparatus is disclosed. In one form, the apparatus includes a carrier having a number of integrated circuit chips electrically coupled in a communications ring. The communications ring...
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