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6904472 |
Receiving device for receiving data
A description is given of a receiving device for receiving data. The receiving device extracts from the received data a specific part thereof and, depending on the content of the extracted data,...
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6903955 |
Semiconductor memory device having consistent skew over entire memory core
A semiconductor memory device including a memory core, a data input circuit, a data output circuit, at least one data input/output line, at least one row control signal and at least one column...
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6904487 |
Apparatus and method for generating distributed traffic
An apparatus and method for generating distributed traffic in nodes coupled to a bus, wherein one node reads information on other nodes and generates traffic, includes a bus interface unit and a...
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6904325 |
Method for optimizing ECU parallel flash programming arrangement on a CAN-based vehicle serial bus in general assembly
A parallel flash programming system for use in motor vehicle assembly includes an input receptive of information relating to a predetermined number of processors connected to a system bus,...
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6904480 |
Testing a bus using bus specific instructions
A system for generating transactions on a bus includes at least one instruction memory storing predefined bus stimuli instructions and at least one phase generator coupled between the bus and the...
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6898648 |
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
A method and system transfer read data from a memory device having a data bus and a data masking pin adapted to receive a masking signal during write operations of the memory device. The method...
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6898766 |
Simplifying integrated circuits with a common communications bus
When integrating a peripheral, it is common practice to use a fully custom design. Custom designs typically optimize performance, size, and energy usage. However, custom designs are more expensive...
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6898658 |
Method to prevent net update oscillation
A method for preventing net update oscillation of a bus bridge by competing net update messages is presented. The method includes the steps of (a) determining whether a particular portal is a...
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6895457 |
Bus interface with a first-in-first-out memory
A system includes a multithreaded processor. The multithreaded processor includes a plurality of microengines, a memory controller, a first bus interface and a second bus interface. The second bus...
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6895365 |
Systems and methods for analyzing data of an SPI data bus
Systems and methods for analyzing data transferred through an SPI data bus are presented. In one exemplary preferred embodiment of the invention, an SPI data probe imitates an SPI device coupled to...
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6895456 |
System supporting multicast master cycles between different busses in a computer system
A computer system with a plurality of peripheral busses is adapted to permit multicast signals to be transmitted by a device on one peripheral bus to multiple devices on the other peripheral bus....
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6892265 |
Configurable connectorized I/O system
A system for making interconnections between an input/output module and a first device and a second device wherein the system uses standard cables and connectors. The input/output module includes a...
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6889380 |
Delaying loading of host-side drivers for cluster resources to avoid communication failures
A cluster includes hosts, a fabric including switches with forwarding tables, and I/O enclosures. I/O controllers that are within the I/O enclosures are assigned to the hosts by a subnet manager. A...
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6889265 |
Apparatus and method to allow and synchronize schedule changes in a USB enhanced host controller
An apparatus and method for making changes to an active schedule being processed by a host controller is disclosed. The apparatus and method includes examining a transaction descriptor, determining...
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6889274 |
Signal processing circuit
A signal processing circuit having a data input-output (I/O) circuit, a microprocessor, a dedicated processing circuit, a local memory, and a memory access control circuit interconnected over a...
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6886050 |
Method for controlling a communication terminal device and rewritable storage medium having initialization setting data
A communication terminal device autonomously activates a specific function predetermined by a host device even when the communication terminal device is off-line when the power turns on. The...
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6883050 |
Optimized POD module/host interface
An interface between a point of deployment (POD) module and a host device, such as a set-top terminal for cable television selectively integrates the POD module and the host such that th POD module...
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6879602 |
Synchronizing method and bridge
An offset value corresponding to the difference between counter values of cycle time counters in two buses is obtained and stored, so that the buses are connected, the value of a first cycle time...
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6880027 |
System and method of evaluating universal serial bus function
The present invention provides a universal serial bus function evaluator connected between a computer and an universal serial bus function. The universal serial bus function evaluator comprises: a...
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6880026 |
Method and apparatus for implementing chip-to-chip interconnect bus initialization
A method and apparatus are provided for implementing chip-to-chip interconnect bus initialization. The chip-to-chip interconnect bus includes first and second unidirectional buses for full duplex...
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6877050 |
Data transfer device and method thereof
When data is transferred from a controller of a liquid crystal display device to each driver through a predetermined number of signal lines, the Transferring Data are divided into a plurality of...
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6877067 |
Shared cache memory replacement control method and apparatus
In a multiprocessor system in which a plurality of processors share an n-way set-associative cache memory, a plurality of ways of the cache memory are divided into groups, one group for each...
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6877051 |
Consistency checking mechanism for configuration parameters in embedded systems
An arrangement is provided for consistent parameter configuration in an embedded system. A consistent parameter configuration mechanism comprises a management client and a configuration manager....
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6874047 |
System and method for implementing an SMBus/I2C interface on a network interface card
A system and method for implementing an SMBus/I 2 C interface in a computer connectable to a network. The system includes a plurality of devices communicably coupled to an SMBus. The system...
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6870855 |
Data communication method, electronic apparatus, and physical-layer-control integrated circuit
In the 1394 communication, communication at a data rate of S 100, S 200, S 400, S 800, S 1600, S 3200 or at a faster speed in the future can be performed. When the 1394 communication is...
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6871247 |
Mechanism for supporting self-modifying code in a harvard architecture digital signal processor and method of operation thereof
For use in a processor having separate instruction and data buses, separate instruction and data memories and separate instruction and data units, a mechanism for, and method of, supporting...
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6868464 |
Method, apparatus, and system for multi-line communication
According to one aspect of the invention, a method is provided in which one or more requests are received to transmit data between a first device and a second device via a bus having a plurality of...
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6868463 |
Audio data recording apparatus and audio data sending/receiving method of the apparatus
The apparatus and method for transferring audio data to a data recorder adopting a personal computer bus to receive audio data enters into data communication mode over a bus without conducting...
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6862649 |
Behavioral translation of datalink messages between different protocols and platforms
The digital communication system (DCS) provides communication between users utilizing digital communication protocols. The DCS includes a first protocol interface system in communication with a...
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6859068 |
Self-correcting I/O interface driver scheme for memory interface
A self-correcting I/O interface driver scheme uses a delay difference detector to detect a difference in delays between an I/O data path and an I/O clock path. The delay difference detector inputs...
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6854028 |
Disk drive control for improving the operation of a computer subjected to motion
An apparatus, method and program product are operable for controlling the operation of a disk drive in a computer subjected to motion, and comprise monitoring the motion of the computer and...
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6850956 |
Method and apparatus for obtaining and storing data during automated data processing
A number of items of data from a data source ( 12 ) can be processed and then supplied to a data destination ( 16, 17 ). The data may include image data, text data, numeric data or other types of...
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6847617 |
Systems for interchip communication
In some embodiments, the invention involves a system having a first group of integrated circuits connected in a truncated ring fashion, wherein the truncated ring includes a truncated region to...
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6847975 |
Proxy processing method
A proxy processing method to flexibly add/modify customized operations, such as customized user authentication and accounting, is provided. A state transition engine stores state information and...
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6839795 |
Priority cross-bar decoder
A matrix of routing cells forming a cross-bar decoder ( 70 ). Signal triplets ( 84, 86, 88 ) coupled to the cross-bar decoder ( 70 ) are assigned a priority. A register ( 50 ) provide outputs to...
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6834317 |
Network topology for food service equipment items
A network topology for communication within and between food service equipment items generally comprises one or more food service equipment items, each having a controller and at least one...
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6831831 |
Disc storage subsystem having improved reliability
A disc storage subsystem includes a housing, at least one disc drive assembly received in a front portion of the housing, first and second controllers, and an intermediate electronic component. The...
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6831928 |
Method and apparatus for ensuring compatibility on a high performance serial bus
Various methods for ensuring compatibility between devices utilizing the IEEE 1394-1995 serial bus standard and new implementations of the standard are disclosed. Methods are disclosed which a...
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6832325 |
Device on a source synchronous bus sending data in quadrature phase relationship and receiving data in phase with the bus clock signal
A device on a source synchronous data bus includes a clock generation circuit which generates transmit and receive clock signals for transmitting and receiving data. The device sends data in...
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6832277 |
Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive coupling
A method of broadcasting N, an even integer, bits of data onto a bus that includes a first plurality of electrical conductors and a second plurality of electrical conductors. The method includes:...
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6832343 |
Apparatus for controlling safety-critical processes
The present invention relates to an apparatus for controlling safety-critical processes. The apparatus includes at least one safe control unit for controlling the safety-critical processes and at...
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6829659 |
Method, system and program product for logically disconnecting in fibre channel communication without closing the exchange
The present invention provides fiber channel networks the ability to logically disconnect without closing an exchange pair wherein the control unit signals the channel that the channel can elect to...
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6826628 |
PCI-PCMCIA smart card reader
A method and apparatus is disclosed for implementing an integrated video card and smart card reader. A single processor is used to perform both video and smart card reader functions. The processor...
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6823283 |
Measurement system including a programmable hardware element and measurement modules that convey interface information
System and method for measurement, DAQ, and control operations. A measurement module includes measurement circuitry for performing signal conditioning and/or signal conversion, and interface...
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6823416 |
Method and apparatus for device interface
A method for communicating between a controller and a device with double-buffered inputs comprises the steps of providing one or more communication paths for exchanging data between the controller...
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6823408 |
Electronic equipment, and method for controlling state of physical layer circuit therefor
A system is designed to avoid problems that may occur if a physical layer misunderstands the kind of signal it receives and erroneously changes its state to a suspend state. When a node B receives...
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6816947 |
System and method for memory arbitration
A memory access arbitration scheme is provided where transactions to a Shared memory are stored in an arbitration queue. Prior to arbitration, the transactions are compared against the contents of...
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6813672 |
EMC enhancement for differential devices
An apparatus configured to communicate through a differential bus to a device. The apparatus may be configured to disconnect and reconnect the device in response to an abnormal reset event to...
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6813648 |
Method and apparatus for post boot-up domain validation
A method for performing domain validation testing of SCSI devices connected to a SCSI bus is provided. The method includes booting up a computer system having a SCSI device connected to the SCSI...
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6809830 |
Method and system for enabling a printing program to communicate with a printer
A method and system for enabling a printing program to communicate with a printer relies on a plug and play manager to detect the presence of a printer and send a notification message to the...
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