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6591321 |
Multiprocessor system bus protocol with group addresses, responses, and priorities
A multiprocessor system bus protocol system and method for processing and handling a processor request within a multiprocessor system having a number of bus accessible memory devices that are...
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6591319 |
Glitch protection and detection for strobed data
In a processing system, a glitch protection circuit receives a strobe signal and a data receiver captures a data signal in response to an output from the glitch protection circuit. Several...
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6591318 |
Computer system having reduced number of bus bridge terminals
A system transfers BIOS instructions from a BIOS ROM to a processor for either execution or storage in a system memory. The BIOS ROM has an address bus coupled to an address bus of the processor...
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6587902 |
I/O port assembly of notebook computer connectable to monitor or TV as needed
The invention provides an input/output (I/O) port assembly of a notebook computer connectable to a monitor or a television (TV), which comprises an image processor, an I/O port, and a signal...
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6587813 |
PCI bus system testing and verification apparatus and method
An improved PCI verification method and apparatus provides iterative testing of all desired conditions or protocol combinations in a PCI system. One or more commands may be tested in combination...
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6587901 |
Information processing system, portable electronic equipment and information processing apparatus
The information processing system is configured such that a portable information terminal and host information processing apparatus can connect via a bus. A program executed by a CPU of the...
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6584521 |
Scaleable bandwidth interconnect for simultaneous transfer of mixed pleisiochronous digital hierarchy (PDH) clients
A scaleable bandwidth interconnect (SBI) for interconnection of physical layer devices with link layer devices which includes an ADD BUS interface operative to receive data from one of the link...
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6581127 |
Framework and method for inter-element channel transmission
A framework and a respective method for inter-element channel transmission are introduced mainly by constructing a plurality of connecting channels between elements. Each channel further includes a...
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6581124 |
High performance internal bus for promoting design reuse in north bridge chips
In an example embodiment, an apparatus providing communication in a computer system, comprises, a plurality of modules each having a master port and a slave port A secondary bus is shared between...
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6581114 |
Method and system for synchronizing serial data
A first embodiment of the present invention includes a decoder 320 and a detection circuit 330 . The decoder 320 receives data at a packet rate. Each packet includes more than one word so that...
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6578122 |
Using an access key to protect and point to regions in windows for infiniband
A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an...
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6578095 |
Data transfer control device for transferring data among a plurality of nodes and electronic equipment
The objective is to provide a data transfer control device and electronic equipment that are capable of reducing processing overheads, thus enabling high-speed data transfer within a compact...
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6574691 |
Apparatus and method for interfacing a non-sequential 486 interface burst interface to a sequential ASB interface
An apparatus is provided for interfacing a processor with a bus of a computer system wherein the processor performs burst read operations in both a sequential and a non-sequential manner and the...
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6571293 |
Multifunction peripheral to host communications
A data processing system comprising a single Host coupled by a communications channel to a single multifunction peripheral is disclosed. The multifunction peripheral comprises a paper tray, a...
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6563595 |
Method of communicating with a SCSI bus device that does not have an assigned SCSI address
A SCSI device resides and communicates on the SCSI bus without that device being assigned a SCSI address or corresponding SCSI ID. The driver software on the host computer directs the SCSI...
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6564242 |
Distributed automation system
A distributed automation system comprising a programmable logic controller connected to programmable logic controllers equipped with a host unit and couplers communicating with the host unit...
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6560200 |
Serial bus experimental apparatus
The present invention relates to serial bus experimental apparatus which has a simple configuration and allows capture of a series of packets transmitted over a serial bus, and/or allow intentional...
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6555760 |
Electronic circuit interconnection system using a virtual mirror cross over package
A virtual mirror “crossover” package includes two groups of electrically interconnected pairs of first and second connection points. Within each group, the set of first and second connection...
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6549966 |
Data routing device and system
A serial data routing device for use in routing serial data between a computer and a peripheral device. The data routing device includes a computer data converter which communicates data under the...
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6549964 |
Delayed transaction method and device used in a PCI system
A delayed transaction method and system to handle multiple delayed transactions in a PCI system is disclosed. When the responder accepts a first and second request from an initiator but can not...
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6549881 |
Interface for interfacing simulation tests written in a high-level programming language to a simulation model
The present invention is directed to a system having a shared processing resource, a plurality of processing modules and a synchronization control module. The shared processing resource is...
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6546479 |
Reduced instruction fetch latency in a system including a pipelined processor
The present invention provides digital computers, memory interfaces, methods of executing a program, methods of programming a digital computer, and methods of operating a memory interface....
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6546450 |
Method and apparatus for sharing a universal serial bus device among multiple computers by switching
A method and apparatus for allowing multiple electronic systems to share a Universal Serial Bus (USB) device is disclosed. In one embodiment, the electronic systems and the USB device are...
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6539439 |
Method and apparatus for interfacing a bus at an independent rate with input/output devices
A method and apparatus for interfacing a bus with a plurality of input/output (I/O) devices includes steps for handling transactions to and from the I/O devices. Transactions from the I/O devices...
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6535937 |
Write command verification across a PCI bus system
A method and system to verify the passage of one or more write commands sent from an originating location through a PCI bus system. An addressable data storage is located substantially at the end...
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6532547 |
Redundant peripheral device subsystem
A redundant peripheral device subsystem in a computer system is disclosed including first and second peripheral device controllers. First and second peripheral device busses are coupled to the...
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6529977 |
Circuit and method for reliably performing bus reset regardless of cable length
In a bus reset process of an IEEE-1394 transceiver circuit, a signal is transmitted to a serial bus and a signal from the bus is received and applied to a higher layer. When a transmit bus reset...
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6526468 |
Peripheral bus extender
An arrangement for extending the range of a peripheral bus carrying message packets has a pair of extenders interconnected by a balanced transmission line for transferring signals directly between...
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6526461 |
Interconnect chip for programmable logic devices
A method and apparatus for interconnecting multiple programmable logic devices. In a preferred embodiment of the invention, an interconnect chip couples one programmable logic device to another...
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RE38004 |
Universal AC sequencer for a server
An AC sequencer receives source AC voltage via a sequence-mounted universally accepted connector, such as an IEC 309 compatible connector. Source AC is coupled by an AC connector plug and AC power...
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6526470 |
Fifo bus-sizing, bus-matching datapath architecture
A circuit comprising (i) one or more input paths, (ii) one or more output paths, and (iii) one or more switch circuits. The switch circuits may be configured to connect one or more of said input...
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6523121 |
Bus system with a reduced number of lines
In order to reduce the number of lines of a standard bus while, at the same time, preserving the compatibility of the communications protocol, the system uses a modified bus. The modification...
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6523074 |
Apparatus and method to manage the invocation of feature service
An apparatus and method facilitating creation and modification of services with a data processing system by grouping of objects configured on a bus arrangement. At least one message that is...
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6522165 |
Bus termination scheme for flexible uni-processor and dual processor platforms
A circuit board has a transmission line. A connector is coupled to the circuit board and electrically coupled to the transmission line. Bus termination circuitry is electrically coupled to the...
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6519663 |
Simple enclosure services (SES) using a high-speed, point-to-point, serial bus
Enclosure services in a computer system having a Host computer and at least one Target device, are provided on a functional path, which is preferably a relatively high-speed, point-to-point serial...
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6519664 |
Parallel terminated bus system
A system and method for controlling output buffer drive enable signals on a parallel terminated bus is described. The method includes transferring data between a first agent and a second agent,...
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6516364 |
Method for time coordination of the transmission of data on a bus
In a method for time coordination of the transmission of cyclic data values on a bus to which data transmitters and data receivers are connected, each data transmitter is assigned a cycle time in...
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6513087 |
Bus transfer apparatus
A bus transfer apparatus for receiving a packet and repeating the received packet, in which the packet includes a PREFIX portion indicating the head of the packet, a DATA portion storing data, and...
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6510477 |
Bus system
A system and method for enhancing the performance of a parallel terminated bus. An implementation includes storing a minimum spacing for each transaction type in a memory, monitoring data...
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6510481 |
Method for out-of-band network communication
A method for communicating on a SCSI bus permits out-of-band addressing and communication for normally non-addressable devices such as SCSI expanders and terminators. The method remaps 18 SCSI data...
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6510522 |
Apparatus and method for providing access security to a device coupled upon a two-wire bidirectional bus
A computer system, bus interface unit, and method are provided for securing certain devices connected to an I 2 C bus. Those devices include any device which contains sensitive information or...
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6507920 |
Extending synchronous busses by arbitrary lengths using native bus protocol
A bus extender for extending synchronous busses of limited length provides convenient access to bus cards in ATE systems. The bus extender plugs into a synchronous bus, for example, a PCI bus, and...
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6507581 |
Dynamic port mode selection for crosspoint switch
A crosspoint switch includes a large number of ports and a separate pass transistor linking each possible pair of ports. When a pass transistor is turned on or off, it makes or breaks a signal path...
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6507878 |
Bus snoop control circuit
A bus snoop control circuit of the present invention, which is connected to a bus, includes a first circuit which determines whether or not the bus snoop control circuit snoops data based on an...
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6505263 |
Bus controller operating code in system memory
A computer system having bus controller operating code stored in a non operating system managed, extended portion of system memory. In one example, the operating code is executed by a bus...
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6502158 |
Method and system for address spaces
A system for allowing a node to be accessed through multiple address spaces. The system includes a virtual address memory providing a software settable bus identification address and a stable node...
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6499071 |
Interconnection system
An exemplary embodiment of the invention is an interconnection system including a primary connector having a first detection contact coupled to a first voltage, a second detection contact coupled...
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6499079 |
Subordinate bridge structure for a point-to-point computer interconnection bus
A communication link is used both as a primary communication link and as a subordinate link in a computer system. A first integrated circuit having a plurality of first functions and a second...
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6499072 |
Data bus bandwidth allocation apparatus and method
A data bus bandwidth allocation apparatus and method uses buffer entry feedback data from a buffer, such as an overflow buffer, that receives requested data over an unregulated bus. The data bus...
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6499066 |
Method and apparatus for using fibre channel test extended link service commands for interprocess communication
The present invention provides fiber channel networks the ability to use extended link service commands to convey implementation dependent information between ports.
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