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5560040 Library unit sharing system for ensuring sequential recording media access  
The present library unit sharing system is provided with a sharing control unit to control access by multiple computers to a library unit which contains multiple recording media. In response to an...
5557752 Telecommunications interface apparatus and method  
An interface apparatus and method for transmitting data between a host computer and a telecommunication network without requiring special host-based computer programs to communicate with the...
5557748 Dynamic network configuration  
A dynamic network configuration in a computer records and analyzes network transactions to permit dynamic configuration of network parameters when connecting the computer to a network. Upon...
5555436 Apparatus for allowing multiple parallel port devices to share a single parallel port  
An apparatus and system which allows multiple parallel port devices to share a single parallel port of a personal computer. The invention uses the parallel port signal called Select-- In which is...
5553300 Semiconductor microscope data interface for computer  
An interface for connecting the printer port of an SEM microscope to a computer is disclosed. The interface includes a latch for receiving data outputted from the printer port of the microscope,...
5553302 Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data  
An Input/Output (I/O) subsystem is provided for transferring frames containing frame control data from a serial data transfer medium to a parallel storage medium. The subsystem includes...
5553245 Automatic configuration of multiple peripheral interface subsystems in a computer system  
An apparatus for automatic configuration of multiple peripheral interface subsystems in a computer system, the computer system including a system expansion bus for adopting a plurality of...
5550999 Information processing system which can check secondary storage medium having prescribed relation therewith and secondary storage device therefor  
This invention provides an information processing system for a secondary storage medium which can prevent illegitimate reproduction of secondary storage media such as CD-ROMs by allowing only a...
5548779 System for providing system services for a device to a client using stack definition and stack description of a stack having top, intermediate, and bottom service objects  
A method and system for providing services in an object oriented system. The method and system are in the form of an interface reference framework of objects which create services in response to...
5548777 Interface control system for a CD-ROM driver by memory mapped I/O method having a predetermined base address using an ISA BUS standard  
An interface control system located between a PC and a CD-ROM includes an address selector, a first control signal generator, a second control signal generator, a bus transceiver, a control...
5546567 System for limiting change in bus clock frequency to duration of I/O operation upon completion signal  
A computer system includes a program executing section for executing a program, an instruction generating section for generating a frequency change instruction in response to the execution of the...
5542046 Server entity that provides secure access to its resources through token validation  
A peer to peer connection authorizer is described. The connection authorizer involves three different entities: a system authorizer mechanism, a client connection manager, and a server connection...
5536928 System and method for scanning bar codes  
An interface (12) for coupling a serial port (14) of a computer (16) to a bar code scanner (18). Electrical power required by the bar code scanner is delivered from the serial port of the...
5532844 Image data transferring system and method  
An image data transferring system interfaces an image processor and an image scanner by utilization of signal input and output ports of a common printer connector mounted on the image processor...
5530892 Single chassis multiple computer system having separate displays and keyboards with cross interconnect switching for work group coordinator  
A multiple computer system having team/work group features built in. A principal hardware component thereof is a unitary chassis of a compact tower configuration, designed to house electronics for...
5528758 Method and apparatus for providing a portable computer with integrated circuit (IC) memory card storage in custom and standard formats  
A portable information storage and transfer device for use with IC memory card-based portable computers obviates many operations traditionally requiring a desktop computer. The floppy disk drive...
5526487 System for multiprocessor communication  
A system for interprocessor communication including a shared register resource accessible by any one of the processors through the using internal communication paths. The shared register resource...
5515528 Computer system having improved idling operation  
An idling time of a peripheral equipment is dynamically controlled. Recent intervals of data transferred from a host system to the peripheral equipment are continuously measured, and an idling...
5513372 Peripheral interface having hold control logic for generating stall signals to arbitrate two read and one write operations between processor and peripheral  
A peripheral interface unit (PIU) used by a microcontroller or microprocessor core having a pipelined architecture to access peripheral modules across a peripheral bus (PBUS). Data read or write...
5511225 Programmable controller for controlling output of control system by having configuration circuit cooperating with monitor logic to selectively transmit return output frame  
Output control circuit for a programmable logic controller, comprising a control unit (13) and a circuit (14) for controlling and checking output channels (11), including a deserializing section...
5509138 Method for determining speeds of memory modules  
A microcomputer system with a data destination facility provides for accessing dynamic RAMs of different speeds faster or slower depending on the dynamic RAM speed. When the data destination...
5504919 Sorter structure based on shiftable content memory  
An optimized high-speed sorter has a plurality of process elements connected in series. Each process element includes a sorting unit used to store a sorted item, and a comparing/controlling unit...
5502839 Object-oriented software architecture supporting input/output device independence  
An object-oriented software architecture interacts with "real" input/output devices exclusively through "virtual" input/output devices. Since all human interface with the operating system is...
5499341 High performance image storage and distribution apparatus having computer bus, high speed bus, ethernet interface, FDDI interface, I/O card, distribution card, and storage units  
Apparatus that provides working storage for large image and data processing systems. The apparatus comprises a computer bus, a high speed backplane bus, a local area network, a central processing...
5499384 Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device  
An I/O controller (IOU) is provided for transferring dam between a host processor and one or more I/O devices. The I/O controller includes means for enabling concurrent performance of two...
5499375 Feedback register configuration for a synchronous vector processor employing delayed and non-delayed algorithms  
A Serial Video Processor (SVP) is provided for processing data through a plurality of parallel processing elements (228). Data is first stored in a data input register (DIR) (222) and then...
5499379 Input/output execution apparatus for a plural-OS run system  
A plural-OS run system in which a plurality of operating systems (OSs) capable of operating on machines of different architectures, respectively, are allowed to run on one bare machine under the...
5493689 System for configuring an event driven interface including control blocks defining good loop locations in a memory which represent detection of a characteristic pattern  
A system and process are disclosed for configuring an Event Driven Interface and analyzing its output for monitoring and controlling a data communications network. The invention is a combination...
5491820 Distributed, intermittently connected, object-oriented database and management system  
Disclosed is an object-oriented approach to storage and transmission of retrievable items in a client-server computer environment. Special processing modules manage retrieval and permanent...
5490282 Interface having serializer including oscillator operating at first frequency and deserializer including oscillator operating at second frequency equals half first frequency for minimizing frequency interference  
A serial communication interface for sending and receiving serial data is provided including a serializer and a deserializer.The serializer is designed so that the serializer VCO has a center...
5490253 Multiprocessor system using odd/even data buses with a timeshared address bus  
Bus arrangements are disclosed for interconnecting processors and main memory modules of a shared memory multiprocessor system. A single address bus interconnects all processors and memory...
5481707 Dedicated processor for task I/O and memory management  
A computer system performs memory to memory transfer, task scheduling and I/O request handling via a group of dedicated processors (e.g. a memory interface unit, an I/O unit, a data transfer unit,...
5479582 Message-oriented bank controller interface  
Disclosed is a message oriented interface for communication between a bank controller unit and peripheral devices, such as channel units, in digital loop transmission systems. At least four...
H001507 Demand assigned multiple access (DAMA) device controller interface  
A controller interface for demand assigned multiple access (DAMA) devices is provided. The controller interface includes a plurality of matched pairs of receive/transmit FIFO memory devices. The...
5471638 Bus interface state machines with independent access to memory, processor and registers for concurrent processing of different types of requests  
A processor couples to a system bus and includes a high performance microprocessor which tightly couples to a local memory. The processor is organized at the interface level into a plurality of...
5465038 Battery charging/data transfer apparatus for a handheld computer  
A battery charging/data transfer structure is provided for use in conjunction with a handheld computer to charge its battery and serve as an infrared data exchange interface between the handheld...
5463643 Redundant memory channel array configuration with data striping and error correction capabilities  
A memory channel array configuration wherein two or more memory channels are used for data transfer and data is striped across each of the memory channels. In addition, one or more redundant...
5463775 System and method for performing monitoring of resources in a data processing system in real time  
A graphical system resource monitor is provided to depict, in real-time, a data processing system's internal resource utilization. A window or viewport of a data processing system displays user...
5459453 Integrated I/O interface device and connector module  
An interface connector device for interconnecting a plurality of input/output devices including a signal bus connected to a control and to the input/output devices for multiplexing the signals...
5459838 I/O access method for using flags to selectively control data operation between control unit and I/O channel to allow them proceed independently and concurrently  
An access method allows the separation of the command stream being sent to the control unit from the command stream interpreted by the channel. This access method allows the I/O subsystem to,...
5455924 Apparatus and method for partial execution blocking of instructions following a data cache miss  
A partially blocking data cache having improved microprocessor performance while maintaining data consistency between external memory and cache memory. The data cache of the present invention is...
5452470 Use of video RAM in high speed data communications  
A data communication system contains a dual-port/dual-access-mode storage subsystem, and a communication controller connecting between that subsystem and external data communication channels. The...
5452419 Serial communication control system between nodes having predetermined intervals for synchronous communications and mediating asynchronous communications for unused time in the predetermined intervals  
A cost-effective motion control system communication architecture is provided that supports a centralized control node, distributed control nodes, and smart I/O peripheral control nodes. Networks...
5450546 Intelligent hardware for automatically controlling buffer memory storage space in a disk drive  
An integrated disk controller integrated circuit in a disk drive includes the buffer room logic hardware of this invention within a buffer control circuit. The buffer room logic hardware monitors...
5448704 Method for performing writes of non-contiguous bytes on a PCI bus in a minimum number of write cycles  
A PCI bus writes non-contiguous data in a maximum of two PCI bus write cycles. A Bridge is provided which can combine data within its write buffer such that non-contiguous data results. Some I/O...
5448703 Method and apparatus for providing back-to-back data transfers in an information handling system having a multiplexed bus  
A device for generating back-to-back data transfers on a bus in an information handling system. A detector for determining whether a first address value and a second address are within a range, a...
5446904 Suspend/resume capability for a protected mode microprocessor  
A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves...
5446910 Interrupt controller with automatic distribution of interrupts for a multiple processor computer system  
An interrupt controller for use in a computer system capable of utilizing multiple processors provides a system for automatically distributing interrupts among processors installed in the system....
5446866 Architecture for transferring pixel streams, without control information, in a plurality of formats utilizing addressable source and destination channels associated with the source and destination components  
An arrangement for transmitting information from a first component of a computer system to a second component of the computer system including a source channel associated with the first component...
5442761 Method by which packet handler inserts data load instructions in instruction sequence fetched by instruction fetch unit  
In a computer system, when data for a register assigned to a current process arrives at a processing element, an instruction for loading this data is automatically inserted into an instruction...