Matches 1 - 50 out of 166 1 2 3 4 >
Match Document Document Title
7584237 Fast hardware divider  
A method and mechanism for performing division. A processor includes a divider configured to perform arithmetic division operations. Prior to dividing a dividend by a divisor, the divider...
7567999 Device and method for calculating a result of a division  
A device for calculating a result or an integer multiple of the result of a division of a numerator by a denominator includes a unit for providing a factor which is selected such that a product of...
7539720 Low latency integer divider and integration with floating point divider and method  
A method and device divides a dividend by a divisor, the dividend and the divisor both being integers. The method and device determine a maximum possible number of quotient digits (NDQ) based on a...
7523152 Methods for supporting extended precision integer divide macroinstructions in a processor  
A method for an extended precision integer divide algorithm includes separating an L-bit integer dividend into two equal width integer format portions, a first portion including lower M bits of the...
7516172 Method for finding quotient in a digital system  
A fast division method which uses a smaller quotient digit set of {−1, 1} than {−1, 0, 1} that is used by known algorithms, therefore accelerates the speed of calculation. Partial remainders...
7487197 Data processing apparatus incorporating a numeric processing mechanism  
A data processing apparatus uses numeric processing. A corrective mechanism enables a method for performing accurate integer divisions to be derived from an approximate division method which does...
7486789 Device and method for calculation on elliptic curve  
In scalar multiplication method using a Montgomery-type elliptic curve, a high-speed elliptic curve calculation device effectively uses a table that stores coordinates of certain scalar multiple...
7403966 Hardware for performing an arithmetic function  
A circuit for performing an arithmetic function on a number performs the function using successive approximation. Each approximation produces an estimate of the result. A determination of the...
7395301 Method and process for determining a quotient  
A method executed in a computing device for dividing by the integer number 48, the method includes receiving a number, and using the number in a combination of four additions and four bit-level...
7367026 Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization  
A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains...
7346644 Devices and methods with programmable logic and digital signal processing regions  
A programmable logic integrated circuit device (“PLD”) includes programmable logic and a dedicated (i.e., at least partly hard-wired) digital signal processing region for performing or at least...
7334012 Reverse division process  
Described herein is a method that includes storing partial quotients of a continued fraction in a first set of counters, initializing a second sets of counters with counter values, decrementing a...
7277908 Numeric processor, a numeric processing method, and a data processing apparatus or computer program incorporating a numeric processing mechanism  
Provided are methods, computer programs and data processing apparatus using numeric processing. Firstly, a corrective mechanism enables a method for performing accurate integer divisions to be...
7251673 Method for performing integer divisions  
A method of automatic calculation of several integer divisions by a same integer divider, of several successive integer dividends, separated from one another by a constant iteration step, smaller...
7243119 Floating point computing unit  
A Sweeney Robertson Tocher (SRT) divider and a square root extractor of floating point double-precision bit width, including a selector of single-precision and double-precision, a carry propagation...
7174357 Circuitry for carrying out division and/or square root operations requiring a plurality of iterations  
Circuitry for carrying out an arithmetic operation requiring a plurality of iterations, such as division or square root operations, utilizes N sets of iteration circuitry arranged one after the...
7119576 Devices and methods with programmable logic and digital signal processing regions  
A programmable logic integrated circuit device (“PLD”) includes programmable logic and a dedicated (i.e., at least partly hard-wired) digital signal processing region for performing or at least...
7065546 Method of performing quantization within a multimedia bitstream utilizing division-free instructions  
Methods for enhancing the performance of quantization operations by converting division operations to a combination of multiplication and shift operations, which are preferably performed on a...
7020281 Timing attack resistant cryptographic system  
A method for determining a result of a group operation performed an integral number of times on a selected element of the group, the method comprises the steps of representing the integral number...
7016930 Apparatus and method for performing operations implemented by iterative execution of a recurrence equation  
The present invention provides an apparatus and method for performing an operation on an operand or operands in order to generate a result, in which the operation is implemented by iterative...
6970525 High-speed, high granularity baud clock generation  
A baud clock ( 15 ) for use by a serial communication interface ( 67 ) is generated by dividing a base clock of the serial communication interface by one of a plurality of possible composite...
6954772 Method and apparatus for performing modular division  
One embodiment of the present invention provides a system that performs modular division. This system contains a number of registers, including: a register A that is initialized with a value X; a...
6918024 Address generating circuit and selection judging circuit  
An address generating circuit, in which address generation by a modulo addition is executed at high speed, is provided. The address generating circuit makes, a two input adder that adds an address...
6751645 Methods and apparatus for performing pipelined SRT division  
An SRT division unit for performing a novel SRT division algorithm is presented. The novel SRT division algorithm comprises a method for performing SRT division using a radix r. As one skilled in...
6711603 Fractional, arithmetic unit, fractional arithmetic method, set-up engine for handling graphic images and computer-readable medium  
A fractional arithmetic unit for performing fractional arithmetic operations of different numerators and a common denominator with different precisions as required, the fractional arithmetic unit,...
6691144 Dual use dual complex multiplier and complex divider  
A circuit performs complex division and dual complex multiplication. The circuit has a plurality of multipliers. Each of the plurality of multipliers is used in both the complex division and the...
6687728 Method and apparatus for arithmetic operation and recording medium of method of operation  
An integer Z 101 is divided by an integer I 102 to obtain a remainder R 109 . The integer I 102 includes a polynomial of power of a basic operational unit of a computer. In this way, the integer...
6658444 Method and apparatus for performing a mask-driven interval division operation  
One embodiment of the present invention provides a system for performing a division operation between arithmetic intervals within a computer system. The system operates by receiving interval...
6625633 Divider and method with high radix  
A high radix divider capable of reducing the size of the circuit of a quotient/remainder judgement unit in a radix 2 k restoring division divider for finding a quotient k number of bits at a time,...
6604121 Digital division device and method using a reduced-sized lookup table  
Devices and methods are provided for estimating a high-precision quotient using a smaller-than-conventional lookup table. The devices include a numerator register feeding a numerator value (as a...
6549926 SRT divider having several bits of each partial remainder one-hot encoded to minimize the logic levels needed to estimate quotient bits  
A Sweeney, Robertson, Tocher (SRT) divider for use in a computer system has recoding circuitry to recode the three most significant bits of the dividend into one-hot form as the dividend is loaded...
6529929 Quantization device and method using prime number dividers  
A quantization circuit includes a set of prime number dividers that can be implemented as look-up tables and a shifter. A shifter implements divisions by prime number (two) and by powers of two....
6470372 Method for the performance of an integer division  
A method for performing in a modular arithmetic coprocessor an integer division of a first binary data element by a second binary data element. The result is obtained by making an iterative loop of...
6457036 System for accurately performing an integer multiply-divide operation  
A system for accurately and efficiently determining the result of an integer multiple-divide operation having the form of (A*B)/C is disclosed. If the values of A, B, and C provide for an easy...
6446106 Seed ROM for reciprocal computation  
A method and apparatus for performing a divide operation in a computer are described. The apparatus includes a first memory containing estimated reciprocal terms, and a second memory containing...
6427220 Method and apparatus for prml detection incorporating a cyclic code  
Apparatus and method for correcting errors in data recovered from a magnetic medium includes detecting the data recovered from the read wave form, and performing an arithmetic operation such as...
6321245 Method and system for performing fast division using non linear interpolation  
The present invention discloses a method and a system for performing fast division using non linear interpolation. A storage stores x-axis and y-axis coordinates (X0, Y0) of a plurality of non...
H001993 Floating-point division and squareroot circuit with early determination of resultant exponent  
A circuit calculates the exact biased resultant exponent before calculating the resultant mantissa of a division operation. The circuit includes a carry-save adder, a conditional-sum adder, a...
6256656 Apparatus and method for extending computational precision of a computer system having a modular arithmetic processing unit  
The integers involved in the computation are embedded into a modular system whose index (i.e., its modulus) is an integer M that is bigger than all of these integers involved. In other words, these...
6175850 Scheme for carrying out modular calculations based on redundant binary calculation  
A scheme for carrying out modular calculations which is capable of carrying out modular calculations using redundant binary calculation even when a number of bits of the mantissa (dividend) is...
6173305 Division by iteration employing subtraction and conditional source selection of a prior difference or a left shifted remainder  
A data processing apparatus iteratively forms quotient, includes data registers (200) for storing various initial and intermediate quantities, a multiplexer (215) for selecting data from one of two...
6161120 Apparatus for performing a division operation, especially for three-dimensional graphics  
The present invention relates to arithmetical computing devices, and especially to a division operation in three-dimensional (3D) graphics. A division f(a,b)=a/b is calculated by an integrated...
6138138 High speed multiple determination apparatus  
In a multiple determination apparatus for determining whether or not a dividend is a multiple of a divisor which is represented by D=α2 r where α is an odd number and r is 0, 1, 2, . . . , a...
6125380 Dividing method  
A method for dividing a dividend by a divisor and finding a dividing quotient and a dividing remainder is provided. The dividend has a low byte part and a high byte part and the divisor has a low...
6078941 Computational structure having multiple stages wherein each stage includes a pair of adders and a multiplexing circuit capable of operating in parallel  
A modular computational structure includes a pipeline having first and second adder stages. Each adder stage includes a pair of adders which operate in parallel, and outputs ports of the first...
6061781 Concurrent execution of divide microinstructions in floating point unit and overflow detection microinstructions in integer unit for integer divide  
An apparatus and method for performing integer division in a microprocessor are provided. The apparatus includes translation logic, floating point execution logic, and integer execution logic. The...
6060936 Circuit and method for performing a divide operation with a multiplier  
A divider circuit provides a divide operation with a multiplier, counter and comparator. The divide operation of two values, x and y, to produce the value of x divided by y, x/y, is provided by...
6021487 Method and apparatus for providing a signed integer divide by a power of two  
A method and apparatus to divide a signed integer by a constant power of two using conditionally-executed instructions to choose between a first result in the event that the dividend is a negative...
5969976 Division circuit and the division method thereof  
A division method and circuit performs a division for signed data by adding or subtracting a divisor to or from the dividend or the partial remainder from the division, according to the sign of the...
5928318 Clamping divider, processor having clamping divider, and method for clamping in division  
A clamping divider has a bit shifter, a multiple accumulator (MAC), and an output circuit. When executing a division with the use of a clamp value of 2 m , the bit shifter shifts one of the divisor...
Matches 1 - 50 out of 166 1 2 3 4 >