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Document Title 

4086474 
Multiplication technique in a data processing system
Two numbers are multiplied together without first changing either of them, if negative, to a positive number, thereby minimizing the time required in the multiplication process. In the... 

4071904 
Current mode multiplegenerating register
A multiplegenerating register generates one of several possible multiples of a binary number which is input thereto depending upon the informational content of a 3bit control signal. For each... 

4041296 
Highspeed digital multiplybydevice
High speed digital multiplybythree device comprising a sum generation unit associated with a carry lookahead unit, the latter comprising means for generating the carry bit Ck+1 to be fed to the... 

4034198 
Multiple generating register
A multiplegenerating register generates one of several possible multiples of a binary member which is input thereto in response to a respective one of a plurality of multiplegenerating commands.... 

4031377 
Fast multiplier circuit employing shift circuitry responsive to two binary numbers the sum of which approximately equals the mantissa of the multiplier
A multiplier for multiplying a fixed point multiplicand by a floating point multiplier utilizes decode logic which provides control signals related to two numbers, the sum of which is... 

4013879 
Digital multiplier
The digital CMOS/LSI synchronous serial multiplier includes a register to store an Xbit sign magnitude multiplier in parallel. The digital multiplier number can be entered into the register... 

4004140 
Digital attenuator
A digital attenuator is disclosed which is capable of having the output PCM signal attenuated nearly in proportion to the input PCM signal level based upon simple logic operations of Pout = α Pin... 

3997770 
Recursive digital filter
Recursive digital filter comprising at least two digital delay devices, a multiplying device having two inputs which are coupled to one another in a common branch point, a summing device from... 

3949209 
Multiplegenerating register
A multiplegenerating register generates one of several possible multiples of a binary number which is input thereto in response to a respective one of a plurality of multiplegenerating commands.... 

3866030 
Two's complement parallel array multiplier
Apparatus and methods for performing the parallel mbit by nbit multiplication of two binary 2's complement numbers by converting the multiplication process to an equivalent parallel array... 

3842415 
ANALOGTODIGITAL CONVERTER WITH ADAPTIVE FEEDBACK
A successive approximation encoder is disclosed in which a negative resistance circuit is connected with a capacitor to successively increase the input magnitudes to be encoded. The negative... 

3814924 
PIPELINE BINARY MULTIPLIER
A high speed pipeline multiplier system for a digital computer operates on a continuous stream of operands each having a given number of bits or on a stream of paired operands each operand having... 

3800130 
FAST FOURIER TRANSFORM STAGE USING FLOATING POINT NUMBERS
System for performing complex Fourier operations of multiplying a fixed complex number by a floating point complex number and adding to the resulting product another floating point complex number. 

3768077 
DATA PROCESSOR WITH REFLECT CAPABILITY FOR SHIFT OPERATIONS
A data processor is described in which general purpose registers having a unidirectional shift capability are employed in conjunction with a reflect operation to effectively execute multiply or... 

3761698 
COMBINED DIGITAL MULTIPLICATION SUMMATION
An arithmetic unit for combined digital multiplication and summation of the form A+B. C using operands A, C and D is disclosed without using discrete intermediate storage of any sum of any... 

3749898 
APPARATUS FOR MULTIPLYING BINARY SIGNALS BASED ON THE BINOMIAL THEOREM
Apparatus for multiplying binary signals based on the Binomial Theorem 2 A B = (A + B)2  (A2 + B2). The apparatus utilizes accumulator and squaring techniques to minimize computer time. 

3610906 
BINARY MULTIPLICATION UTILIZING SQUARING TECHNIQUES
A means and a method of highspeed multiplication are presented which are capable of replacing existing multiplication methods in present day digital data processing systems. In the system... 

3557355 
DATA PROCESSING SYSTEM INCLUDING MEANS FOR DETECTING ALGORITHM EXECUTION COMPLETION
A data processing system including an arithmetic unit in communication with a data processing unit provides the capacity of performing instruction execution operations upon data supplied thereto... 

3535498 
MATRIX OF BINARY ADDSUBTRACT ARITHMETIC UNITS WITH BYPASS CONTROL


3508038 
MULTIPLYING APPARATUS FOR PERFORMING DIVISION USING SUCCESSIVE APPROXIMATE RECIPROCALS OF A DIVISOR


3460129 
FREQUENCY DIVIDER


3456098 
SERIAL BINARY MULTIPLIER ARRANGEMENT


3453422 
COMPUTER WEIGHING SYSTEM


3443079 
CASCADE MULTIPLIER


3393303 
Multiplying arrangement


3300627 
Apparatus for realtime multiplication


3278732 
High speed multiplier circuit


3171022 
Hybrid multiplier


3065423 
Simultaneous hybrid digitalanalog multiplier


3052412 
Multiplier circuit


3021067 
Timesharing computer


3018955 
Apparatus for performing arithmetic operations


2981473 
Electric multiplication circuit


2832897 
Magnetically controlled gating element


2785854 
Electronic calculating device
