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5726927 |
Multiply pipe round adder
A multiplier in a floating point processor includes a circuit to determine for each bit of the multiplier operand a 3 times booth recode and a booth recode multiplier array which implements a 3...
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5721697 |
Performing tree additions via multiplication
A multiplier is modified to perform a tree addition. A first value is input to the multiplier in place of a first multiplicand. The first value is a concatenation of addends upon which the tree...
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5715187 |
Method and apparatus for integer multiplication
A binary multiplication method utilizing a combined table lookup and long multiplication to simplify the multiplication procedure, to improve the computational speed, and to save half of the memory...
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5691930 |
Booth encoder in a binary multiplier
A partial product generator in a binary multiplier for multiplying a parallel n-bit binary multiplier and a parallel m-bit binary multiplicand comprises n/2 (n being an even integer) or (n+1)/2 (n...
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5680359 |
Self-refresh period adjustment circuit for semiconductor memory device
A self-refresh period adjustment circuit for a semiconductor memory device. The self-refresh period adjustment circuit comprises a ring oscillator for generating a pulse signal with a fixed period...
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5677862 |
Method for multiplying packed data
A processor. The processor includes a decoder being coupled to receive a control signal. The control signal has a first source address, a second source address, a destination address, and an...
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5675526 |
Processor performing packed data multiplication
A processor. The processor includes a decoder being coupled to receive a control signal. The control signal has a first source address, a second source address, a destination address, and an...
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5666301 |
Multiplier carrying out numeric calculation at high speed
Luminance value data including data of R, G, and B and data α representing transparency, each of 8 bits, and a coefficient expressed by floating-point data are directly applied to an operation...
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5642306 |
Method and apparatus for a single instruction multiple data early-out zero-skip multiplier
A method and apparatus for multiple parallel multiplications of multiple packed data using a single multiplier is provided. Given multiple packed data as multiplicand blocks and as multiplier...
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5640336 |
Computational array and method for calculating multiple terms of a polynomial in a single computing element
A computational array (120) includes at least one computing element (130) that calculates multiple terms in a polynomial. The computing element (130) obtains an input value of each variable in each...
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5636351 |
Performance of an operation on whole word operands and on operations in parallel on sub-word operands in a single processor
A system allows parallel data processing within a single processor. In order to allow for parallel processing of data, an arithmetic logic unit or other operation executing entity within the...
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5619440 |
Multiplier circuit with rounding-off function
A multiplier circuit having a rounding-off function. A multiplier circuit has a smaller circuit size and operates at a higher speed by using a rounding half adder. An addition processing part which...
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5617345 |
Logical operation circuit and device having the same
A logical operation circuit performing a logic operation on inputs includes a plurality of adders arranged in a tree structure. The plurality of adders includes first-type adders and second-type...
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5586070 |
Structure and method for embedding two small multipliers in a larger multiplier
A multiplier circuit which performs selectable multiplication operations on a first word having an upper byte and a lower byte and a second word having an upper byte and a lower byte. A first...
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5579484 |
System for performing fast data accessing in multiply/accumulate operations while using a VRAM
A system and method are described which provide for fast sequential access of stored data, as required, for example, in the performance of multiply/accumulate operations in neural network...
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5557563 |
Data processing method and apparatus including iterative multiplier
An iterative multiplier having a multiplier core generating partial results upon each iteration. When an early terminate of a multiply instruction occurs, at least one of the partial results is...
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5524090 |
Apparatus for multiplying long integers
A multiplier apparatus designed to multiply integers of many figures with a small circuit scale in such a manner that an input value is partitioned and multiplication is performed by taking account...
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5513133 |
Compact microelectronic device for performing modular multiplication and exponentiation over large numbers
A compact synchronous microelectronic peripheral machine for standard microprocessors with means for proper clocking and control, has as essential elements: three main subdivided, switched and...
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5483477 |
Multiplying circuit and microcomputer including the same
A multiplying circuit wherein an adder 7 outputs a value "0" in which both of a positive part and a negative part of a number with a redundant code are "1", and at a last cycle of the...
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5473558 |
Method for generating hardware description of multiplier and/or multiplier-adder
A method for generating a hardware description of a multiplier/multiplier-adder for integrating a signal processing circuit includes the steps of acquiring input parameters such as a word length of...
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5473559 |
Hardware implemented multiplier
A sign inverting Booth encoder included in an encoding circuit generates a control signal designating a partial product having a sign different from that designated by an output signal generated...
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5471627 |
Systolic array image processing system and method
A systolic array of processing elements is connected to receive weight inputs and multiplexed data inputs for operation in two dimension convolution mode, or fully-connected neural network mode, or...
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5452242 |
Method and apparatus for multiplying a plurality of numbers
A method and apparatus for determining the product of a plurality of N numbers are disclosed. The preferred embodiment of the method includes the steps of: (1) determining a plurality of partial...
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5448639 |
Digital signature device
A Digital Signature Device includes hardware device for carrying out an operation AB2 -n mod N and an operation AB mod N, and carrying out modular exponentiation and modular multiplication based...
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5446909 |
Binary multiplication implemented by existing hardware with minor modifications to sequentially designate bits of the operand
Binary multiplication is performed with existing data processing apparatus to which only minor modifications are required. One operand and a partial product are stored in existing latches of a CPU....
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5442576 |
Multibit shifting apparatus, data processor using same, and method therefor
A multibit shifting apparatus (50) of a data processor (40) includes a multiplier (55) such as a modified Booth's recoded multiplier for use in normal multiplication operations. The multibit...
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5438533 |
Multivalued multiplier for binary and multivalued logic data
A multivalued multiplier is arranged to treat a plurality of multivalued signals at one time without having to increase the circuit scale. The multivalued multiplier includes a logic circuit and a...
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5436860 |
Combined multiplier/shifter and method therefor
A combined multiplier/shifter (150) uses an existing high-speed multiplier to perform both multiplies and programmable left and right shifts without a dedicated high-speed shifter. A shift decoder...
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5424970 |
Method and apparatus for multiplying a plurality of N numbers
A method and apparatus are disclosed for determining the product of N numbers in base Z. The method includes the steps of: (1) providing a first and succeeding storage arrays. The first storage...
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5408422 |
Multiplication circuit capable of directly multiplying digital data with analog data
A new and unique multiplication circuit solves the problems associated with digital multiplication circuits which operate on digital operands only. The multiplication circuit according to the...
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5402369 |
Method and apparatus for digital multiplication based on sums and differences of finite sets of powers of two
A method and apparatus is disclosed for digital multiplication based on sums and differences of finite sets of powers of two. It is observed that for a given multiplicand signal A, multiples of the...
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5396502 |
Single-stack implementation of a Reed-Solomon encoder/decoder
The present invention is for a Error Correction Unit (ECU) that uses a single stack architecture for the generation, reduction and evaluation of the polynomials involved in the correction of a...
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5363322 |
Data processor with an integer multiplication function on a fractional multiplier
A data processing system (10) which primarily supports fractional multiplication operations has a multiplication logic circuit (20) for executing integer multiplication functions efficiently....
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5349551 |
Device for and method of preforming an N-bit modular multiplication in approximately N/2 steps
The present invention relates to a device for and a method of performing an n-bit modular multiplication of A×B modulo C in approximately n/2 steps, where A denotes a binary multiplier, B denotes...
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5317753 |
Coordinate rotation digital computer processor (cordic processor) for vector rotations in carry-save architecture
A CORDIC processor is provided in carry-save architecture in connection with intense pipelining for vector rotations, particularly given problems in real-time processing. The processor comprises a...
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5285405 |
Inner product calculating circuit
An inner product calculating circuit for executing a calculation of an inner product on the basis of one or more vector data and one or more coefficients. The circuit comprises a selective inverter...
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5255216 |
Reduced hardware look up table multiplier
A method and apparatus for multiplying an N bit number X(t) by an M bit number O, and a method for making such an apparatus for multiplying numbers are described. The N bit number is partitioned...
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5218565 |
Method and a circuit for encoding a digital signal to determine the scalar product of two vectors, and corresponding DCT processing
The invention relates to encoding a digital signal to determine the scalar product of two vectors. For two vectors of the same dimension p, one having dedicated components {ak} and the other having...
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5214599 |
Advanced dimensional processing with division
The invention comprises a multi-dimensional array having an inverted, self-pruning binary tree architecture. The array is capable of doing comparative and computational tasks in one clock cycle of...
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5210710 |
Modulo arithmetic processor chip
A processor chip for adding a first integer having a plurality of groups of bits to a second integer having a plurality of groups of bits modulo a fourth integer having n-bits. The first integer...
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5204832 |
Addition apparatus having round-off function
An addition apparatus adds together two numbers while detecting one of a plurality (n) of possible round-off positions and executing round-off at that position simultaneously with adding together...
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5200912 |
Apparatus for providing power to selected portions of a multiplying device
An apparatus for controlling power delivery from a power source to selected portions of a multiplying device for determining the product of a first number having a first plurality of digits and a...
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5159567 |
Programmable serial multiplier
A programmable serial multiplier performing the multiplication of a multiplicand by a fixed constant coded on r bits is formed from a battery of (r/2)-1 addition cells (11 O -11(r/2)-2)...
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5144574 |
Modular multiplication method and the system for processing data
To markedly improve the computational speed of A×B modulo N computation as compared with the prior-art Baker's method where A denotes a multiplicand; B denotes a multiplier; and N denotes a...
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5136537 |
Method and apparatus for determining the product of two numbers
A method and apparatus for determining the product of a first number and a second number are disclosed. The preferred embodiment of the method includes the steps of: (1) determining a plurality of...
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5128890 |
Apparatus for performing multiplications with reduced power and a method therefor
An apparatus for performing multiplications with reduced power includes an arithmetic logic unit and a decode block for performing an equivalent of a multiply instruction. A frequently-encountered...
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5111422 |
Circuit arrangement for calculating product sums
By using a basic cell (g), an overall array (ga) for forming n products from pairs of multidigit binary numbers Amn, Bkn and for adding these n products is formed, with the formation and summation...
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5047973 |
High speed numerical processor for performing a plurality of numeric functions
Division and square root calculations are performed using an operand routing circuit (16) for receiving an operand N, and operand D and a seed value S and directing the operands and seed value to a...
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5034912 |
Signal processing circuit for multiplication
A multiplication processing circuit requiring no digital-analog converter includes a circuit for multiplying a digital multiplication coefficient by a digital multiplicand and outputting the result...
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5025408 |
Bit serial multiplier with parallel-in-serial-out carry and partial product shift registers
A bit serial multiplier suitable for pipelined operations. This multiplier uses a conventional bit serial multiplier cell using Booth's algorithm and stored carry architecture, but modified in...
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