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7406595 |
Method of packet encryption that allows for pipelining
A method of packet encryption and decryption that allows for pipelining. The first step is to identify the packets in a message to be encrypted. Then, a unique number is assigned to each packet. A...
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7274369 |
Digital image compositing using a programmable graphics processor
Digital Image compositing using a programmable graphics processor is described. The programmable graphics processor supports high-precision data formats and can be programmed to complete a...
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7062633 |
Conditional vector arithmetic method and conditional vector arithmetic unit
It is decided whether a first source data from the memory 101 is a data which is to be subjected to arithmetic or not by a state flag detection means 150 , the result of the decision is retained...
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6748521 |
Microprocessor with instruction for saturating and packing data
A data processing system is provided with a digital signal processor which has an instruction for saturating multiple fields of a selected set of source operands and storing the separate saturated...
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6671708 |
Processor and image processing device
An image processing apparatus according to the present invention comprises a general arithmetic circuit 101 comprising a program control circuit 103 , a first address generator 104 , a first...
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6282556 |
High performance pipelined data path for a media processor
A pipelined data path architecture for use, in one embodiment, in a multimedia processor. The data path architecture requires a maximum of two execution pipestages to perform all instructions...
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6052705 |
Video signal processor with triple port memory
A digital video signal processor using parallel processing includes an input serial-access memory having memory cells in which data is inputted into successive ones of the memory cells in response...
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6049816 |
Pipeline stop circuit for external memory access
A pipeline stop circuit for an external memory access which is capable of effectively performing a pipeline operation by temporarily stopping a pipeline operation, which is being operated, until...
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5964866 |
Elastic self-timed interface for data flow elements embodied as selective bypass of stages in an asynchronous microprocessor pipeline
The invention relates to a processor having a data flow unit for processing data in a plurality of steps. In one version, the data flow unit includes a plurality of consecutive stages which include...
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5963461 |
Multiplication apparatus and methods which generate a shift amount by which the product of the significands is shifted for normalization or denormalization
A computer instruction execution unit includes different execution paths for different categories of instructions. Different execution paths share circuitry. The slower execution paths are...
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5905881 |
Delayed state writes for an instruction processor
An apparatus for and method of providing a data processing system that delays the writing of an architectural state change value to a corresponding architectural state register for a predetermined...
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5862065 |
Method and circuit for fast generation of zero flag condition code in a microprocessor-based computer
An adder circuit in parallel with a zero flag generation circuit. In a preferred embodiment, an arithmetic logic unit (ALU) circuit in a microprocessor based computer system includes an adder...
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5825680 |
Method and apparatus for performing fast division
A method and apparatus for performing division in accordance with certain bandwidth requirements particular to an implementation is described. A pseudo pipelined approach for performing division...
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5812845 |
Method for generating an object code for a pipeline computer process to reduce swapping instruction set
A computer of a pipeline type is provided in which a processing of exchanging data stored in two data storing portions can be performed at a high speed by adding a comparatively simple circuit...
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5787026 |
Method and apparatus for providing memory access in a processor pipeline
The invention provides a method and apparatus for providing operand reads in a processor pipeline. According to one aspect of the invention, a method is described for executing an instruction in a...
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5666300 |
Power reduction in a data processing system using pipeline registers and method therefor
In a data arithmetic logic unit (54), power consumption is reduced by eliminating unnecessary write backs to the destination register (82) following a MAC (multiply/accumulate) operation. A series...
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5594679 |
Adaptive video signal processing apparatus
A processing apparatus which adaptively performs image compensation and encoding/expansion and decoding processing such as discrete cosine transformation (DCT)/inverse discrete cosine...
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5572453 |
Pipeline signal processor
This invention discloses an improved signal processor comprising first to third arithmetic units forming a pipeline structure, first to third control information hold circuits each of which holds...
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5560039 |
Apparatus and method for a four address arithmetic unit
An instruction execution unit having an instruction format with four addresses. Two of the addresses may be defined as sources for operands. Two of the four addresses may be defined as a...
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RE35311 |
Data dependency collapsing hardware apparatus
A multi-function ALU (arithmetic/logic unit) for use in digital data processing facilitates the execution of instructions in parallel, thereby enhancing processor performance. The proposed...
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5490100 |
Cumulative summation unit
A summation unit device suitable for the cumulative summation of integer and/or floating point format data presented to an input thereof. The device is particularly useful as an adjunct to a...
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5367691 |
Pipe-staggered apparatus and method utilizing carry look-ahead signal processing
An apparatus (100, 200) and method (300, 400) include an improved architecture for data processing that maintains data throughput while maintaining a reasonable circuit complexity. The method...
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5329283 |
Synthetic aperture radar digital signal processor
A digital signal processor optimized for synthetic aperture radar image formation provides two separate stages of arithmetic processing along independent in-phase and quadrature channels. The first...
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5270962 |
Multiply and divide circuit
A multiply and divide circuit having full bit level pipeline capability uses an array of bit level carry-save adders with each carry-save bit adder having a corresponding absolute value bit...
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5187795 |
Pipelined signal processor having a plurality of bidirectional configurable parallel ports that are configurable as individual ports or as coupled pair of ports
A signal processor comprising a split pipelined parallel processor which processes data signals from external signal sources and provides signal processing functions utilizing a plurality of data...
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5142489 |
Digital signal processor with improved pipeline processing
A digital signal processor (DSP) makes a conditional judgment based on a value held in a flag register in accordance with the result of an arithmetic operation, selectively outputs data...
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5031135 |
Device for multi-precision and block arithmetic support in digital processors
A device for multi-precision and block arithmetic support in a digital processor including a multiplier for multiplying two signed, unsigned or signed and unsigned binary numbers and having a...
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5005150 |
Digital signal processors
A digital signal processor includes a parallel multiplier having first and second input ports, in which the first input port has conductors for many more bits than does the second input port. First...
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4931974 |
Sixteen-bit programmable pipelined arithmetic logic unit
For use in calculating discrete, fast fourier transformations, an arithmetic logic unit includes a number of multiplexers and registers, which, in combination, form a configurable pipeline,...
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4774686 |
Serial digital signal processing circuitry
A serial-bit digital processing system uses registers and latches to synchronize samples and justify sign-bits. Nominally each processing block in the system includes a sign extend register...
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4761753 |
Vector processing apparatus
A vector operation processing apparatus utilizes a plurality of vector registers in a pipeline computer architecture. The vector registers store ordered data elements which are processed in a...
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4754412 |
Arithmetic logic system using the output of a first alu to control the operation of a second alu
An arithmetic logic system for performing a variety of arithmetic and logical functions on pixel input streams such as averaging down the input image stream, computation of absolute values, and...
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4700319 |
Arithmetic pipeline for image processing
The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the form A m B n +C o D P +E q F r ...
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4658355 |
Pipeline arithmetic apparatus
In a pipeline arithmetic apparatus, an arithmetic operation is divided into a plurality of stages and processed in an overlapping manner in each of the stages. Arithmetic circuits are provided each...
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4639886 |
Arithmetic system having pipeline structure arithmetic means
An arithmetic system includes an arithmetic unit of a pipeline structure for executing arithmetic operations for instructions which require different arithmetic cycles. The arithmetic unit executes...
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4598365 |
Pipelined decimal character execution unit
The present invention relates to an execution unit of a computing system which executes data manipulation type instructions and arithmetic type instructions on data words having a plurality of...
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4594655 |
(k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
Equipping a secondary data flow facility with additional capability, to emulate for certain operations the simultaneous processing of the prerequisite instruction and the dependent instruction,...
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4539635 |
Pipelined digital processor arranged for conditional operation
A pipelined digital processor includes a common data and control bus and a source (100 or 105) of instructions and data words. An arithmetic section (110) processes one data word with another data...
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4525796 |
Pipelined operation unit for vector data
In an operation unit wherein a series of data is sequentially applied, a predetermined operation is performed in synchronism with the input data in a pipelined manner, and the predetermined...
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4295125 |
Method and means for pipeline decoding of the high to low order pairwise combined digits of a decodable set of relatively shifted finite number of strings
An apparatus for ensuring continuous flow through a pipeline processor as it relates to the serial decoding of FIFO Rissanen/Langdon arithmetic string code of binary sources. The pipeline decoder...
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4270181 |
Data processing system having a high speed pipeline processing architecture
A data processing system having a pipeline processing architecture for performing a sequence of operations upon each group of data, one of which is a conditional group, comprising a main pipeline...
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4156922 |
Digital system for computation of the values of composite arithmetic expressions
A digital system for computing of the values of composite arithmetic expressions, such as ##EQU1## X IJ WHERE N, K 1 , K 2 , ....., K N ARE ARBITRARY INTEGERS, ON NUMBERS X IJ IN A BINARY SYSTEM...
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4128890 |
Integrated arithmetic unit and digital networks using the unit
The invention relates to an arithmetic unit fabricated by large scale integration techniques and to an improved digital network of increased accuracy in which the unit finds application. The...
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4075688 |
System for addressing and address incrementing of arithmetic unit sequence control system
Control for overlapping instruction execution in an arithmetic unit is provided by stepping a sequence of instructions through a plurality of registers connected in cascade and separately decoding...
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4025771 |
Pipe line high speed signal processor
Control for overlapping instruction execution in an arithmetic unit is provided by stepping a sequence of instructions through a plurality of registers connected in cascade and separately decoding...
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3900723 |
Apparatus for controlling computer pipelines for arithmetic operations on vectors
Apparatus is provided for controlling the arithmetic units of a computer pipeline to accomplish arithmetic operations on operands of a plurality of operand vectors to derive resultants. The...
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3875391 |
Pipeline signal processor
A signal processor including a programmable arithmetic controller and a pipeline arithmetic unit controlled by such controller is disclosed. The arithmetic unit includes a plurality of serially...
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3787673 |
PIPELINED HIGH SPEED ARITHMETIC UNIT
A digital computer central processing unit is disclosed having an arithmetic unit which forms an element of an instruction processing pipeline. The arithmetic unit has within it a plurality of...
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