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7596678 |
Method of shifting data along diagonals in a group of processing elements to transpose the data
A transpose of data appearing in a plurality of processing elements comprises shifting the data along diagonals of the plurality of processing elements until the processing elements in the diagonal...
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7571203 |
Processing device for a pseudo inverse matrix and V-BLAST system
Disclosed is a V-BLAST system for a MIMO communication system. In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix...
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7490120 |
Method and structure for producing high performance linear algebra routines using a selectable one of six possible level 3 L1 kernel routines
A method (and structure) for improving at least one of speed and efficiency when executing level 3 dense linear algebra subroutines on a computer. An optimal matrix subroutine is selected from...
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7483937 |
Parallel processing method for inverse matrix for shared memory type scalar parallel computer
A Matrix decomposition (LU decomposition) is carried out on a block E and H. Then, a block B is updated using an upper triangular portion of the block E, and a block D is updated using a lower...
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7454454 |
Method and apparatus for efficient calculation of a matrix power series
The present invention provides a method and system for computing a matrix power series according to one embodiment of the present invention. Memory structures for storing a partial sum, current and...
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7363200 |
Apparatus and method for isolating noise effects in a signal
A matrix includes samples associated with a first signal and samples associated with a second signal. The second signal includes a first portion associated with the first signal and a second...
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7296048 |
Semiconductor circuit for arithmetic processing and arithmetic processing method
There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by...
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7236998 |
System and method for solving a large system of dense linear equations
A method and system for solving a large system of dense linear equations using a system having a processing unit and one or more secondary processing units that can access a common memory for...
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7219119 |
Procedure for computing the Cholesky decomposition in a parallel multiprocessor system
The invention relates to a procedure for computing the Cholesky decomposition of a positive definite matrix into a product of a lower and an upper triagonal matrix having a dimension of L in a...
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7200631 |
Method and apparatus for determining an inverse square root of a given positive-definite hermitian matrix
Generally, a method and apparatus are provided for computing a matrix inverse square root of a given positive-definite Hermitian matrix, K. The disclosed technique for computing an inverse square...
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7137005 |
Method of watermarking digital data
A method of introducing a non-perceptional signal (watermark) to a digital media data is disclosed. The method is based on the representation of source digital data using a special matrix,...
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7134031 |
Performance control within a multi-processor system
A multi-processing system 2 measures the degree of parallelism achieved in executing program instructions and uses this to dynamically control the clock speeds and supply voltage levels applied...
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7092526 |
Method and system for performing subword permutation instructions for use in two-dimensional multimedia processing
The method and system provides a set of permutation primitives for current and future 2-D multimedia programs which are based on decomposing images and objects into atomic units, then finding the...
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7089159 |
Method and apparatus for matrix reordering and electronic circuit simulation
A matrix reordering method performs reordering of elements of a coefficient matrix created based on coefficients of linear simultaneous equations whose solutions are to be produced by parallel...
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7049626 |
Misalignment-tolerant electronic interfaces and methods for producing misalignment-tolerant electronic interfaces
A nanoscale or partial nanoscale interface within an electronic device, and a method for producing such interfaces without the need for precise nanoscale alignment of nanoscale elements of a first...
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7003542 |
Apparatus and method for inverting a 4×4 matrix
An apparatus and method for inverting a 4×4 source matrix. A source matrix is divided into four 2×2 sub-matrices. A plurality of sub-matrix products are subsequently calculated from the...
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6947961 |
Arithmetic unit and receiver unit
There are provided an arithmetic unit and a receiver unit which execute an arithmetic operation at a high speed and allow reduction of the size thereof. An input section inputs data of the data...
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6922715 |
Computer implemented method and program for estimation of characteristic values of matrixes using statistical sampling
The present invention discloses a computer system and program product. A computer system including an algorithm for computing a characteristic value of a matrix comprising steps of; providing a...
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6907513 |
Matrix processing method of shared-memory scalar parallel-processing computer and recording medium
In accordance with a parallel matrix processing method adopted in a shared-memory scalar computer, a matrix to be subjected to LU factorization is divided into a block D of the diagonal portion and...
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6859818 |
Method and apparatus for permuting input data and recording medium having stored thereon a program for executing permutation
Permuted data (u 1 ′, u 2 ′, . . . , u m ′) of input data (u 1 , u 2 , . . . , u n ) expressed by the relationship
[ u 1 ′ u 2 ′ ⋮ u m ′ ] = P [ u 1 u 2 ⋮ u n ] ,
are...
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6859817 |
Solving systems of nonlinear equations using interval arithmetic and term consistency
A computer-based system for solving a system of nonlinear equations specified by a vector function, f, wherein f(x)=0 represents ƒ 1 (x)=0, ƒ 2 (x)=0, ƒ 3 (x)=0, . . . , ƒ n (x)=0, wherein x is...
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6834293 |
Vector scaling system for G.728 annex G
A method, by a processing device, for scaling an M-bit integer input vector containing one or more vector elements. The method comprises receiving a maximum permitted left shift (MLS) value for the...
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6826585 |
Method and apparatus for solving simultaneous linear equations
In a simultaneous-linear-equations solving method of calculating the numerical solutions of simultaneous linear equations having a coefficient matrix, all the elements of coefficient matrix...
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6694343 |
Method for solving a large sparse triangular system of linear equations
A computer-based method and system comprising three data structures: partially ordered data structure (or simply ordered data structure), contiguous list v, and vector p, is used for solving a...
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6643677 |
Digital arithmetic integrated circuit
A digital signal processor (DSP) of high speed and high precision is disclosed. The DSP (i.e., digital arithmetic integrated circuit) comprises: an arithmetic data storing memory ( 11 ) for storing...
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6578061 |
Method and apparatus for data permutation/division and recording medium with data permutation/division program recorded thereon
In a method for permuting and dividing 16 pieces of k-bit data held in 4k-bit long registers T 0 . T 1 , T 2 and T 3 , k being an integer, the data of each register T i is ANDed with a desired...
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6574651 |
Method and apparatus for arithmetic operation on vectored data
A method of multiplying 32-bit values includes decomposing each multiplicand into its 16-bit components. This approach leads to a processor core design which permits re-use of much of the logic in...
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6477203 |
Signal processing distributed arithmetic architecture
An apparatus computes an inner product vector of a matrix and a vector. The matrix has a first set of coefficients and the vector has a second set of coefficients. At least one input register is...
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6470368 |
Using tiling to improve performance in a sparse symmetric direct matrix solver
One embodiment of the present invention provides a system for efficiently perform a modification (cmod) operation in solving a system of linear algebraic equations involving a sparse coefficient...
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6446105 |
Method and medium for operating a vector computer
Method is provided for calculating a matrix by using a vector computer with at least one vector processor and a plurality of memory banks. The method controls procedure of the calculation so that...
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6408321 |
Method and apparatus for mapping components of descriptor vectors to a space that discriminates between groups
The method of the present invention transforms descriptor vectors that characterize items partitioned into groups into a space that discriminates between those groups in a well defined optimal...
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6397236 |
Hybrid technique for performing a column modification operation in a sparse symmetric direct matrix solver
A hybrid system for efficiently performing a cmod operation in solving a system of linear algebraic equations involving a sparse coefficient matrix. The system operates by identifying supernodes in...
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6356600 |
Non-parametric adaptive power law detector
A system for detecting unknown broadband signals in noise consisting of non-stationary narrowband components and a stationary colored broadband component includes a sensor which collects data in...
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6341298 |
Signal equalization
A method, in a data transmission system, for optimizing an equalizer used to equalize a signal transmitted through a distorting channel, where the method comprises the calculation of a maximal...
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6243726 |
Electronic calculating apparatus utilizing input and display of expressions in textbook and single line formats
Objects of the present invention are to realize that a plurality of mathematical expressions are inputted and displayed within the same screen in textbook book format, and that a plurality of...
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6181831 |
Spatial frequency-domain video signal processing
A method of generating an output array of image spatial frequency coefficients from input arrays of image spatial frequency coefficients overlapped by the required array, the spatial frequency...
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6115812 |
Method and apparatus for efficient vertical SIMD computations
An apparatus and method for performing vertical parallel operations on packed data is described. A first set of data operands and a second set of data operands are accessed. Each of these sets of...
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6061521 |
Computer having multimedia operations executable as two distinct sets of operations within a single instruction cycle
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU may be coupled either through a coprocessor bus or a local CPU bus to a conventional...
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6009511 |
Apparatus and method for tagging floating point operands and results for rapid detection of special floating point numbers
A superscalar microprocessor appends a tag value to each floating point number. The tag value indicates whether the corresponding floating point number is a normal floating point number or a...
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6009505 |
System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot
A multimedia extension unit (MEU) is provided for performing various multimedia-type operations. The MEU can be coupled either through a coprocessor bus or a local CPU bus to a conventional...
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5996070 |
Microprocessor capable of executing condition execution instructions using encoded condition execution field in the instructions
A 3-bit condition execution field in an condition execution instruction stores an encoded value obtained by encoding a condition stored in an general purpose flag indicating to execute the...
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5987488 |
Matrix processor
A matrix computation processor comprises a control unit and a data memory, and a plurality of computation units. The plurality of computation units are controlled by the control unit by means of a...
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5983230 |
Ordered sparse accumulator and its use in efficient sparse matrix computation
A data structure, called an ordered sparse accumulator (Ordered SPA), permits sequencing in numeric order by index and dynamic alteration of the nonzero structure of the active column in sparse...
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5969975 |
Data processing apparatus registers
A data processing system is provided including an arithmetic logic unit 20, 22, 24 receiving input operands from M X-bit registers to produce output data words stored within N Y-bit registers,...
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5920491 |
Computer process for prescribing an assembly load to provide pre-tensioning simulation in the design analysis of load-bearing structures
A computer implemented process simulates the application of a tension force in an element of an assembly. The process defines a finite element model for the element, and creates a pre-tension...
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5905666 |
Processing system and method for performing sparse matrix multiplication by reordering vector blocks
A method, system, and data structure are provided which facilitate matrix multiplication with advantageous computational efficiency. The invention, as variously implemented as a processing system,...
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5886902 |
Method for optimizing items represented in permutation spaces
In a computer implemented method, possible arrangements of items, such as components to be placed on a semiconductor die, are described in a permutation space expressed as a data structure stored...
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5884089 |
Method for calculating an L1 norm and parallel computer processor
A parallel computer processor that performs L1 norm calculations includes a plurality of processing elements and a data pipeline which couples the processing elements. The data vectors for which...
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5841684 |
Method and apparatus for computer implemented constant multiplication with multipliers having repeated patterns including shifting of replicas and patterns having at least two digit positions with non-zero values
A method for designing a constant multiplier system comprises identifying a repeated pattern in a minimal signed digit expression of a multiplier, designing a first accumulator stage to compute the...
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5825677 |
Numerically intensive computer accelerator
A matrix processing unit is described which permits high speed numerical computation. The processing unit is a vector processing unit which is formed from a plurality of processing elements. The...
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