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7483936 |
Calculating unit
A calculating unit including a number of bit slices which is less than the number of positions of the operand to be processed. Each bit slice has a logic element and a communication bus between the...
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7472051 |
Dependable microcontroller, method for designing a dependable microcontroller and computer program product therefor
A microcontroller comprising a central processing unit and a further fault processing unit suitable for performing validation of operations of said central processing unit. The further fault...
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7397399 |
Method and device for transcoding N-bit words into M-bit words with M smaller N
The present invention concerns a method for transcoding a N bits word into a M bits word with M<N. The invention is applicable in various fields and more particularly in the display field. The...
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7047271 |
DSP execution unit for efficient alternate modes for processing multiple data sizes
In one embodiment, a digital signal processor (DSP) processes both n-bit data and (n/2)-bit data. The DSP includes multiple processing paths. A first processing path processes n-bit data. A second...
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7043518 |
Method and system for performing parallel integer multiply accumulate operations on packed data
A multiply accumulate unit (“MAC”) that performs operations on packed integer data. In one embodiment, the MAC receives 2 32-bit data words which, depending on the specified mode of operation,...
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7039906 |
Compiler for enabling multiple signed independent data elements per register
A compiler for data processing outputs lower-level code for packing multiple signed data elements per register into a processor's registers using the rules set forth herein, and when executed, the...
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6854001 |
Apparatus and method for simultaneously displaying a number along with its number of significant figures
A computing device ( 40 ) comprises an electrical circuit and a software application. A display screen ( 138 ) and an input device ( 140 ) are electrically coupled to the electrical circuit. The...
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6681236 |
Method of performing operations with a variable arithmetic
The process for performing operations with a variable arithmetic does not call for any shifting of the data in the different registers that come into play in the operation. The input registers can...
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6629231 |
System and method for efficient register file conversion of denormal numbers between scalar and SIMD formats
There is disclosed a pipelined floating point unit comprising: a) a first plurality of pipelined functional units for processing operands conforming to a single instruction-multiple data stream...
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6564238 |
Data processing apparatus and method for performing different word-length arithmetic operations
A digital signal processing system performs different word-length arithmetic operations (e.g., 24-bit arithmetic and 16-bit arithmetic) using the same hardware. The digital signal processing system...
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6557096 |
Processors with data typer and aligner selectively coupling data bits of data buses to adder and multiplier functional blocks to execute instructions with flexible data types
A signal processor with an instruction set architecture (ISA) for flexible data typing, permutation, and type matching of operands. The signal processor includes a data typer and aligner to support...
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6523057 |
High-speed digital accumulator with wide dynamic range
A high-speed, wide dynamic range, digital accumulator includes a first adder stage in which an input addend is added to a value of a least significant part of an output of an accumulator from a...
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6463525 |
Merging single precision floating point operands
Where it is desired to perform a double precision operation using single precision operands, first and second single precision operands are loaded into first and second respective rows of a...
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6460135 |
Data type conversion based on comparison of type information of registers and execution result
In a microprocessor, a type information comparator compares type information of an execution result of an instruction with type information of the type information register corresponding to the...
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6311199 |
Sign extension unit
A sign extension unit has first and second sign extenders to extend a sign bit, i.e., the most significant bit of input data to the higher side of the input data. The input data is divided into...
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6253299 |
Virtual cache registers with selectable width for accommodating different precision data formats
A structure and method for processing data comprises a processing unit having a base cache, base registers having a base width and being operatively connected to the processing unit, and virtual...
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6163764 |
Emulation of an instruction set on an instruction set architecture transition
A method and apparatus for emulating an instruction on a processor. The instruction operates on an operand in a first data format and the processor operates in a second data format. The operand is...
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6138135 |
Propagating NaNs during high precision calculations using lesser precision hardware
A floating point arithmetic unit provides consistent propagation of NaNs le performing high precision calculations on hardware designed to perform lower precision calculations. In one embodiment,...
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6094719 |
Reducing data dependent conflicts by converting single precision instructions into microinstructions using renamed phantom registers in a processor having double precision registers
In an out-of-order processor having single-precision floating-point registers aliased into double-precision floating-point registers, a single-precision floating-point arithmetic operation having...
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6049865 |
Method and apparatus for implementing floating point projection instructions
A floating point unit (60) capable of executing projection instructions provides performance improvement in multiple precision floating point arithmetic. The projection instructions provide for...
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6044392 |
Method and apparatus for performing rounding in a data processor
A method and apparatus for performing rounding in a data processor (10). In one embodiment, two instructions are used to implement a procedure for rounding operands of finite but arbitrary...
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5809292 |
Floating point for simid array machine
A floating point system and method according to a format that includes a sign bit, an exponent part having a plurality of bits, and a fraction part having a plurality of multi-bit blocks, wherein...
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5740093 |
128-bit register file and 128-bit floating point load and store for quadruple precision compatibility
A technique for providing adaptive 128-bit load and store operations to support architecture extensions for computations on a 128-bit quadruple precision format, in which a single set of load and...
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5631859 |
Floating point arithmetic unit having logic for quad precision arithmetic
A floating point processing system which uses a multiplier unit and an adder unit to perform properly rounded quad precision floating point arithmetic operations using double-extended hardware. The...
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5619439 |
Shared hardware for multiply, divide, and square root exponent calculation
The same hardware is used to implement calculations of the exponents for multiplication, division, and square root in either double or single precision. A multiplexor selects the appropriate bias...
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5602769 |
Method and apparatus for partially supporting subnormal operands in floating point multiplication
A method for fully supporting floating point multiplication using a combination of partial hardware support and partial software support traps to software when a subnormal operand is encountered...
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5523961 |
Converting biased exponents from single/double precision to extended precision without requiring an adder
Exponent conversion logic implements floating point exponent conversion of single/double precision to an extended format (IEEE 754 standard), such as in the floating point unit of an x86 processor....
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5301139 |
Shifter circuit for multiple precision division
A single, double and extended precision shifter circuit for a hardware floating point divide circuit is disclosed. The divide circuit implements the divide function by receiving two floating point...
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5268855 |
Common format for encoding both single and double precision floating point numbers
A technique for encoding multiple floating point formats into a double precision floating point number by padding single word floating point numbers with zeros to form a 64-bit double word in a way...
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5182723 |
Computing method of floating-point represented data
A computing method of floating-point represented data including dividing data x with a n (n>M) bit length into high rank data X' and low rank data α with a mutual m bit length, a mantissa part...
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4953119 |
Multiplier circuit with selectively interconnected pipelined multipliers for selectively multiplication of fixed and floating point numbers
A multiplier which processes 32 bit operands to provide two 16 bit by 16 bit fixed point products or one 32 bit floating point product during each clock pulse. Two 16 bit by 16 bit fixed point...
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4901268 |
Multiple function data processor
A data processor includes a reconfigurable arithmetic logic unit (ALU), which includes three ALU portions. One ALU portion includes two 16-bit input ports and a 16-bit output port. The other two...
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4901267 |
Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio
The present invention optimizes the number and ratio of cycles required among the divide/square root unit, multiplier unit and ALU. An intermediate latch with its own clock is provided at the...
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4884231 |
Microprocessor system with extended arithmetic logic unit
A microprocessor for processing operand bits has a 16 bit primary arithmetic logic unit (ALU) and shifter and a 24 bit auxiliary ALU and shifter operating in conjunction with the primary ALU. Some...
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4847802 |
Method and apparatus for identifying the precision of an operand in a multiprecision floating-point processor
An arithmetic logic unit (ALU) and a plurality of operand registers wherein each of the operand registers includes a tag cell for storing a bit identifying the precision of the operand stored...
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4839846 |
Apparatus for performing floating point arithmetic operations and rounding the result thereof
An operation unit capable of performing round processing at a high speed in a floating point operation. A circuit for detecting an overflow on the condition of a signal representing all 1's in an...
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4788655 |
Condition code producing system
A condition code producing system for an arithmetic unit which is controlled by a micro program and operate on binary floating point data produces a condition code having a plurality of bits and...
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4780842 |
Cellular processor apparatus capable of performing floating point arithmetic operations
A processor apparatus which is capable of performing floating point arithmetic. The processor apparatus includes a plurality of individual processing cells which are interconnected from left to...
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4768160 |
Arithmetic unit with simple overflow detection system
An arithmetic unit with a simple overflow detection system performs arithmetic operations between first and second data. The first data is exclusively divided into a fixed value portion and a...
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4760551 |
Operation unit for floating point data with variable exponent-part length
An operation unit has a significant digit number judging circuit in which to detect as to whether or not a significant digit number of exponent part variable length data obtained as an arithmetic...
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4758975 |
Data processor capable of processing floating point data with exponent part of fixed or variable length
A data processor for latching in a floating point register floating point data having exponent parts of fixed and variable lengths, which are transferred from a main storage or an arithmetic unit...
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4758973 |
Apparatus for processing floating-point data having exponents of a variable length
A floating-point data processing apparatus operates to generate exponent data of fixed length from floating-point data composed of (a) a sign bit indicating a mantissa sign, (b) a first exponent...
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4748580 |
Multi-precision fixed/floating-point processor
A single-chip fixed/floating-point arithmetic processor, a three port ALU, a plurality of storage registers R, S, F0 and F1, a constant store circuit and an output data register F. Two of the...
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4675809 |
Data processing system for floating point data having a variable length exponent part
An execution processing device for executing variable length floating-point data of exponent part designated by two or more kinds of representation systems and fixed length floating-point data of...
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4617641 |
Operation unit for floating point data having a variable length exponent part
A floating-point number operating unit utilizes a floating-point representation comprising a variable exponent part and a variable mantissa part and having a fixed length as a whole. The exponent...
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4161784 |
Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands
A scientific processing unit includes a microprogrammable arithmetic processing apparatus for performing floating point arithmetic operations with operands in long and short form. The apparatus...
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3742198 |
APPARATUS FOR UTILIZING A THREE-FIELD WORD TO REPRESENT A FLOATING POINT NUMBER
Apparatus and method embodying a novel representation of a floating point number. The novel representation utilizes a computer word having two fields of fixed length one of which is subdivided into...
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3434114 |
VARIABLE FLOATING POINT PRECISION
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3056550 |
Variable-exponent computers
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