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7627802 Efficient parallel cyclic redundancy check calculation using modulo-2 multiplications  
A system and method for cyclic redundancy checks (CRC) having a CRC polynomial of width (W) for use in a digital signal processing system is disclosed. The system includes receiving a message...
7120248 Multiple prime number generation using a parallel prime number search algorithm  
A process is provided for searching in parallel for a plurality of prime number values simultaneously includes the steps of: randomly generating a plurality of k random odd numbers (wherein k is...
6637002 Decoder for error correcting block codes  
A decoder for decoding block error correction codes is described. The decoder includes a first search circuit to find roots of an error location polynomial corresponding to an error location and a...
6570670 Method and apparatus to enable job streaming for a set of commonly shared resources  
A method and apparatus for prioritizing the use of multifunctional printing system's basic processing resources to permit job streaming. The printing system employs a controller with an improved...
6401194 Execution unit for processing a data stream independently and in parallel  
A vector processor provides a data path divided into smaller slices of data, with each slice processed in parallel with the other slices. Furthermore, an execution unit provides smaller arithmetic...
6327605 Data processor and data processing system  
A data processor includes an arithmetic portion incorporated in a floating point unit, in which the arithmetic portion includes a plurality of multipliers supplied mantissa part of floating point...
5963461 Multiplication apparatus and methods which generate a shift amount by which the product of the significands is shifted for normalization or denormalization  
A computer instruction execution unit includes different execution paths for different categories of instructions. Different execution paths share circuitry. The slower execution paths are...
5764556 Method and apparatus for performing floating point addition  
A numeric processor system is provided with a floating point adder subsystem having a set of parallel dedicated numeric processors, each of the numeric processors comprising a plurality of...
5602768 Method and apparatus for reducing the processing time required to solve square root problems  
The invention discloses a method and apparatus for solving a wide range of numerical problems that use N processing elements operating in parallel. To find the solution for a given problem relating...
5339266 Parallel method and apparatus for detecting and completing floating point operations involving special operands  
A method and apparatus for detecting and completing floating point operations involving special floating point operands is performed in parallel, via a circuit (24), to the operation of at least...
5268855 Common format for encoding both single and double precision floating point numbers  
A technique for encoding multiple floating point formats into a double precision floating point number by padding single word floating point numbers with zeros to form a 64-bit double word in a way...
5267186 Normalizing pipelined floating point processing unit  
A floating point processor for performing arithmetic operations on floating point numbers includes a first arithmetic operation unit configured to operate on normalized numbers and a second...
5136536 Floating-point ALU with parallel paths  
A method and apparatus for improving the speed of a floating-point arithmetic logic unit (ALU) by arranging the logic to provide two parallel paths, each performing four functions. Six different...
4943940 Floating point add/subtract and multiplying assemblies sharing common normalization, rounding and exponential apparatus  
A fully combinatorial floating point arithmetic apparatus is provided comprising separate fully combinatorial add/subtract and multiply assemblies which share a common normalization, rounding and...
4916651 Floating point processor architecture  
A floating point processor (10) is provided having a multiplier (48) and an ALU (54) for performing arithmetic calculations simultaneously. The output of the multiplier (48) and ALU (54) are stored...
4901235 Data processing system having unique multilevel microcode architecture  
A data processing system which includes a central processor unit which has an arithmetic logic unit (ALU) for performing fixed point arithmetic operations and a separate floating point unit (FPU)...
4888682 Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers  
A pipelined paralled vector processor decreases the time required to process the elements of a single vector stored in a vector register. Each vector register of a plurality of vector registers is...
4884190 High performance parallel vector processor having a modified vector register/element processor configuration  
A parallel vector processor includes a plurality of vector registers, each vector register being subdivided into a plurality of smaller registers. A vector is stored in each vector register, the...
4766564 Dual putaway/bypass busses for multiple arithmetic units  
A data processing system includes multiple floating point arithmetic units, for example, an adder and a multiplier. Two putaway busses and two bypass busses are connected to a register file and...
4683547 Special accumulate instruction for multiple floating point arithmetic units which use a putaway bus to enhance performance  
A data processing system includes a multiple floating point arithmetic unit with a putaway and a bypass bus, which includes a new instruction for handling multiple multiply or divide instructions....
4612628 Floating-point unit constructed of identical modules  
A floating-point unit constructed of at least two identical modules. Each module contains registers for storing floating-point data, a sign and exponent processing unit for processing the sign and...
4488252 Floating point addition architecture  
Parallel shifter architecture in an arithmetic unit of a digital computer for processing floating point mantissas. An arithmetic-logic unit (ALU) in series with shifting means functions in...
4429370 Arithmetic unit for use in a data processing system for computing exponent results and detecting overflow and underflow conditions thereof  
A data processing system using unique procedures for handling various arithmetic operations. Thus, in floating point arithmetic mantissa calculations the system uses a novel technique for inserting...
4075704 Floating point data processor for high speech operation  
A digital data processor includes a plurality of memory registers, a floating point adder and a floating point multiplier intercoupled by a plurality of simultaneously operable parallel buses...
Matches 1 - 24 out of 24