Matches 1 - 43 out of 43
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7451171 Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root  
Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root operations. Exemplary embodiments include a method including receiving a...
7430576 Floating point square root provider with embedded status information  
A system for providing a floating point square root comprises an analyzer circuit configured to determine a first status of a first floating point operand based upon data within the first floating...
7406589 Processor having efficient function estimate instructions  
High-precision floating-point function estimates are split in two instructions each: a low precision table lookup instruction and a linear interpolation instruction. Estimates of different...
7346642 Arithmetic processor utilizing multi-table look up to obtain reciprocal operands  
Methods for determining the square root, reciprocal square root, or reciprocal of a number performed by a processor of a computer system. The methods produce high precision estimates without using...
7167887 Circuitry for carrying out square root and division operations  
The invention provides circuitry for carrying out a square root operation and a division operation. The circuitry utilizes common iteration circuitry for carrying out a plurality of iterations and...
7139786 Method and apparatus for efficiently performing a square root operation  
One embodiment of the present invention provides a system that performs a carry-save square root operation that calculates an approximation of a square root, Q, of a radicand, R. The system...
6912559 System and method for improving the accuracy of reciprocal square root operations performed by a floating-point unit  
The accuracy of approximating the reciprocal and the reciprocal square root of a number (N) is improved. Approximating the reciprocal of N includes: (a) estimating the reciprocal of N to produce an...
6847985 Floating point divide and square root processor  
An iterative mantissa calculator calculates a quotient mantissa for a divide mode or a result mantissa for a square-root mode. The calculator includes at least first and second summing devices. In...
6820107 Square root extraction circuit and floating-point square root extraction device  
A square root extraction circuit and a floating-point square root extraction device which simplify a circuit structure and improve an operation speed are provided. Portions for generating square...
6779012 Computer method and apparatus for division and square root operations using signed digit  
Computer method and apparatus for performing a square root or division operation generating a root or quotient. A partial remainder is stored in radix-2 or radix-4 signed digit format. A decoder is...
6654777 Single precision inverse square root generator  
A floating point inverse square root circuit is disclosed. The circuit is configured to receive a floating point value comprised of a sign bit, an exponent field, and a mantissa field. The inverse...
6625632 Method and apparatus for square root generation using bit manipulation and instruction interleaving  
The invention provides improved methods and systems for generation of square roots of vector and administrative operands. The methods utilize bit-manipulation operations to halve intermediate...
6567831 Computer system and method for parallel computations using table approximation  
A method optimizes function evaluations performed by of a VLIW processor through enhanced parallelism by evaluating the function by table approximation using decomposition into a Taylor series.
6385713 Microprocessor with parallel inverse square root logic for performing graphics function on packed data elements  
An optimized, superscalar microprocessor architecture for supporting graphics operations in addition to the standard microprocessor integer and floating point operations. A number of specialized...
6349319 Floating point square root and reciprocal square root computation unit in a processor  
A method of computing a square root or a reciprocal square root of a number in a computing device uses a piece-wise quadratic approximation of the number. The square root computation uses the...
6341300 Parallel fixed point square root and reciprocal square root computation unit in a processor  
A parallel fixed-point square root and reciprocal square root computation uses the same coefficient tables as the floating point square root and reciprocal square root computation by converting the...
6175907 Apparatus and method for fast square root calculation within a microprocessor  
An apparatus and method for calculating a square root of an operand in a microprocessor are provided. The microprocessor has a plurality of square root instructions, each of which specifies a...
6108772 Method and apparatus for supporting multiple floating point processing models  
A numerical processing method on a computer system in which an instruction having at least one operand and a type control is retrieved, and the operand is converted to a precision specified by the...
6078938 Method and system for solving linear systems  
A system and method of using a computer processor (34) to generate a solution to a linear system of equations is provided. The computer processor (34) executes a Jacobi iterative technique to...
6067613 Rotation register for orthogonal data transformation  
A data processing apparatus (71) includes a data processor bus (103), the rotation register (208) and a register selection circuit. The rotation register (208) is embodied by a plurality of data...
6016538 Method, apparatus and system forming the sum of data in plural equal sections of a single data word  
This invention is a technique for summing plural sections of a single data word. The technique uses a repeated process forming larger and larger partial sums. Initially the single data word is...
5999960 Block-normalization in multiply-add floating point sequence without wait cycles  
Described is a floating point processor comprising a multiply section and an add section, for performing a multiplication-add operation comprised of a multiplication operation prior to an addition...
5954789 Quotient digit selection logic for floating point division/square root  
Quotient digit selection logic is modified so as to prevent a partial remainder equal to the negative divisor from occurring. An enhanced quotient digit selection function prevents the working...
5931895 Floating-point arithmetic processing apparatus  
A floating-point arithmetic processing apparatus has a circuit for generating a limit value for normalization shift by subtracting an exponent of the minimum value of a normalized number from a...
5798955 High-speed division and square root calculation unit  
A calculation unit speedily calculates a division or square root according to an iteration algorithm with a partial remainder expressed with the sum of a sum digit and carry digit. The calculation...
5768171 Method and apparatus for improving the precision or area of a memory table used in floating-point computations  
A method and apparatus for calculating a value of a function f(x) for a given operand x. A memory, such as a Read Only Memory, is used to stored precalculated values for some bits of the function...
5671171 Shared rounding hardware for multiplier and divider/square root unit using conditional sum adder  
A floating point mantissa final addition and rounding unit uses a conditional sum adder to reduce a redundant carry-save format 106-bit mantissa to a non-redundant properly rounded 53-bit...
5671170 Method and apparatus for correctly rounding results of division and square root computations  
A floating point arithmetic unit for correctly rounding a quotient or a square root of high precision numbers to the floating point number closest to the exact result is disclosed. The invention is...
5619439 Shared hardware for multiply, divide, and square root exponent calculation  
The same hardware is used to implement calculations of the exponents for multiplication, division, and square root in either double or single precision. A multiplexor selects the appropriate bias...
5602768 Method and apparatus for reducing the processing time required to solve square root problems  
The invention discloses a method and apparatus for solving a wide range of numerical problems that use N processing elements operating in parallel. To find the solution for a given problem relating...
5539684 Method and apparatus for calculating floating point exponent values  
A data processing system (10) has a circuit for determining floating point exponents for divide operations and square root operations. The circuit has two input multiplexers (26 and 28) which...
5537345 Mathematical function processor utilizing table information  
An input register holds, as an input operand to be square rooted, a floating-point number with an exponential radix is 2. An approximation of the reciprocal of a square root is retrieved from a...
5515308 Floating point arithmetic unit using modified Newton-Raphson technique for division and square root  
A floating point processing system which uses a multiplier unit and an adder unit to perform floating point division and square root operations using both a conventional and a modified form of the...
5404324 Methods and apparatus for performing division and square root computations in a computer  
An apparatus for performing floating-point division and square root computations according to an IEEE rounding standard includes input data alignment circuitry, core iteration circuitry, remainder...
5386375 Floating point data processor and a method for performing a floating point square root operation within the data processor  
A method and apparatus used for performing a floating pointing operation has the ability to calculate a square root of a number. An approximation to the inverse of the square root of the number is...
5305248 Fast IEEE double precision reciprocals and square roots  
A method and apparatus implement reciprocal and square root calculations using Chebyshev polynomial approximation by scaling the mantissas of IEEE floating point numbers based on splitting them...
5305247 Method and processor for high-speed convergence factor determination  
A high-speed processor utilizes combinational logic and range limitation for a modified input value to increase efficiency in convergence factor determination for convergent division and square...
5206823 Apparatus to perform Newton iterations for reciprocal and reciprocal square root  
The apparatus of the present embodiment relates to iterative numerical techniques adapted for use in digital circuitry, such as floating point multipliers and floating point adder-subtractor units....
5204829 Interleaving operations in a floating-point numeric processor  
A pipelined floating point multiplier is disclosed having the capability of interleaving floating point multiplication with iterative floating point operations (calculations), such as division and...
4999801 Floating point operation unit in division and square root operations  
A floating point operation unit comprises an exponent operation circuit, a sign operation circuit and a mantissa operation circuit. The mantissa operation circuit comprises a fixed point...
4901267 Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio  
The present invention optimizes the number and ratio of cycles required among the divide/square root unit, multiplier unit and ALU. An intermediate latch with its own clock is provided at the...
4477879 Floating point processor architecture which performs square root by hardware  
There is shown and described a floating point processor having improved architecture and configuration. The floating point processor (FPP) performs addition, subtraction, multiplication, division...
4336599 Circuit for performing a square root calculation  
There is disclosed a circuit which is capable of performing a square root function in a floating point processor in such a manner that the speed of operation is increased by approximately 50%.
Matches 1 - 43 out of 43