Matches 101 - 150 out of 159 < 1 2 3 4 >
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5844830 Executing computer instrucrions by circuits having different latencies  
A computer instruction execution unit includes different execution paths for different categories of instructions. Different execution paths share circuitry. The slower execution paths are...
5825678 Method and apparatus for determining floating point data class  
A new Test FP Data Class operation is provided which utilizes a 12-bit mask to determine to which of the 12 possible data classes a floating point number belongs and sets a condition code...
5805486 Moderately coupled floating point and integer units  
A moderately coupled floating point and integer units of a processor allows for rapid transfer of data between the two units. The integer unit is comprised of a plurality of integer registers...
5805475 Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture  
A floating point numbers load-store unit includes a translator for converting between the single-precision and double-precision representations, and Special-Case logic for providing Special-Case...
5781464 Apparatus and method for incrementing floating-point numbers represented in diffrent precision modes  
An incrementer for performing floating-point calculations is capable of incrementing a floating-point number represented in one of several different precision modes. The incrementer includes...
5768169 Method and apparatus for improved processing of numeric applications in the presence of subnormal numbers in a computer system  
An apparatus for storing data in a computer memory, the number originating from one of a plurality of floating point data formats. Each data format from which the number originates has a first...
5764548 Fast floating-point to integer conversion  
Input signals in floating-point format are converted into output signals in integer format while handling saturation cases appropriately. Saturation exists when the value of an input signal is...
5734879 Saturation instruction in a data processor  
A data processing system (55) and method thereof includes one or more data processors (10). Data processor (10) is capable of performing both vector operations and scalar operations. Using a single...
5732005 Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation  
A single-precision floating-point register array for a floating-point execution unit that performs double-precision operations by emulation is provided. The register array comprises a plurality of...
5687359 Floating point processor supporting hexadecimal and binary modes using common instructions with memory storing a pair of representations for each value  
A computer system having multiple floating point modes and common instructions for each mode in order to implement operations in a mode independent manner. A computer system includes two floating...
5678016 Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization  
A method and apparatus are disclosed for managing the execution of a floating-point store instruction within a data processing system including a memory and a superscalar processor having a number...
5668984 Variable stage load path and method of operation  
A floating point processing system and method of operation are disclosed. Single word precision denormalized operands and also misaligned operands are detected while such operands are being loaded...
5666301 Multiplier carrying out numeric calculation at high speed  
Luminance value data including data of R, G, and B and data α representing transparency, each of 8 bits, and a coefficient expressed by floating-point data are directly applied to an operation...
5583805 Floating-point processor having post-writeback spill stage  
An apparatus for handling special cases outside of normal floating-point arithmetic functions is provided that is used in a floating-point unit used for calculating arithmetic functions. The...
5574928 Mixed integer/floating point processor core for a superscalar microprocessor with a plurality of operand buses for transferring operand segments  
A processor core for supporting the concurrent execution of mixed integer and floating point operations includes integer functional units (110) utilizing 32-bit operand data and a floating point...
5548545 Floating point exception prediction for compound operations and variable precision using an intermediate exponent bus  
Exponents are first combined together, in a way that varies with the type of floating point operation. A single intermediate exponent result is placed on an intermediate exponent bus. This...
5487022 Normalization method for floating point numbers  
A floating point normalization circuit and method decodes the exponent generating a coded multibit output corresponding to the maximum decrease in the exponent within the minimum expressible...
5481489 Method of and apparatus for discriminating NaN  
When processing a binary floating-point number in the IEEE form, whether or not the data is NaN can be discriminated irrespective of a precision thereof. The binary floating-point number having...
5463574 Apparatus for argument reduction in exponential computations of IEEE standard floating-point numbers  
An apparatus for executing argument reduction in the computation of F(x)=2**x-1 (with │x│<1), determining the value of xi and computing (x-xi) according to the IEEE 754 standard...
5452241 System for optimizing argument reduction  
A method for approximating mathematical functions using polynomial expansions is implemented in a numeric processing system. A partial remainder operation is set forth for high accuracy reduction...
5400271 Apparatus for and method of calculating sum of products  
An apparatus for and a method of calculating a sum of products by which calculation of a sum of products can be performed with a high degree of accuracy. The apparatus includes a data memory for...
5392228 Result normalizer and method of operation  
A result normalizer (58) for use with an adder (56) generates a mask in two stages that indicates the location of the leading one in the adder result. In the first stage, a leading zero anticipator...
5339266 Parallel method and apparatus for detecting and completing floating point operations involving special operands  
A method and apparatus for detecting and completing floating point operations involving special floating point operands is performed in parallel, via a circuit (24), to the operation of at least...
5272654 System for converting a floating point signed magnitude binary number to a two's complement binary number  
A system for converting a floating point n-bit signed magnitude binary number to a fixed point two's complement binary number having m bits wherein m is greater than n, first converts the n bit...
5257214 Qualification of register file write enables using self-timed floating point exception flags  
A floating point processor in which floating point register file write enables are self-timed from the exception flags from the respective floating point processing units. This self-timing is...
5253193 Computer method and apparatus for storing a datum representing a physical unit  
A method and apparatus of computation with physical units is described. The method and apparatus stores numbers in a computer system by storing a value and an exponent in a datum, the exponent...
5204825 Method and apparatus for exact leading zero prediction for a floating-point adder  
A leading zero predictor (LZP) in parallel with the full subtraction operation correctly predicts the exact number of leading zeros of a subtraction result. Once the full subtraction operation is...
5181186 TPC computers  
A tri-property code has been adopted and accordingly combinational and sequential circuits for implementing some arithmetic and logical operations are designed individually then combined into a...
5161117 Floating point conversion device and method  
A high-speed floating point conversion apparatus and method are disclosed, with special reference to selectable conversion of "source" IEEE format numbers to any of the "destination" IBM, DEC, or...
5144570 Normalization estimator  
A normalization circuit (24) which comprises a signed digit subtracter (25) coupled to operand registers (14, 19). The signed digit subtracter (25) subtracts the operands and inputs a signed digit...
5038309 Number conversion apparatus  
A first number conversion circuit for converting input numbers in the form of an integer, a floating-point number and a FRACT number into Modulo 256 format for use in connection with a graphic...
5029123 Information processing device capable of indicating performance  
In an information processing device for use in indicating an operation number of floating point operation elements, such as either vector elements of each vector instruction or scalar instructions,...
5021985 Variable latency method and apparatus for floating-point coprocessor  
A programmable latency (a programmable number of clock cycles) needed for an operation completion. The required latency for a pipe is determined from a formula including the system clock cycle time...
4951238 Processor for executing arithmetic operations on input data and constant data with a small error  
A process for carrying out modulo reduction of floating-point data uses a predetermined constant. A subtraction operation of more significant bits of the predetermined constant from a mantissa part...
4870608 Method and apparatus for floating point operation  
Method and apparatus for floating point operation for calculating an approximate solution in a given argument of a function. An operation unit for carrying out floating point logical operation and...
4858166 Method and structure for performing floating point comparison  
Comparison of two floating point numbers is performed using a unique algorithm, which in one embodiment is implemented very efficiently in hardware, resulting in a very significant improvement in...
4811272 Apparatus and method for an extended arithmetic logic unit for expediting selected floating point operations  
Apparatus and method for expediting the alignment of the fraction portion of operands in floating point operations. The alignment is performed in the arthmetic logic unit where the argument of the...
4807172 Variable shift-count bidirectional shift control circuit  
A shift control circuit comprising an arithmetic circuit for producing a string of a predetermined number of data bits, a logic circuit for detecting the positive or negative sign of the bit string...
4796218 Arithmetic circuit capable of executing floating point operation and fixed point operation  
An arithmetic circuit comprises a pair of input registers for holding a pair of given numbers, and a radix point adjustment circuit coupled to the input registers for aligning the radix points of...
4791403 Log encoder/decorder system  
A high speed form of finite precision binary arithmetic coding comprises encoding/decoding performed in the logarithm domain, resulting in facilitated computation based on additions and...
4789955 Operation unit with an error amount calculating circuit for output data thereof  
An operation unit includes a first unit for calculating input data and for outputting an error data indicating an error generated as a result of the calculation by using such a mantissa data at a...
4789956 Maximum negative number detector  
Prior to normalizing floating point number, a maximum negative number detector is employed. In order to determine whether a number is a maximum negative number, the inventive scheme examines the...
4782457 Barrel shifter using bit reversers and having automatic normalization  
A barrel shifter for a floating point processing unit can be optimized by having an automatic normalization feature. A multi-stage shifting unit is employed with external circuitry to verify that...
4773033 Binary data identification circuit  
A binary data identification circuit including first and second potential terminals set to first and second logical potential levels, a series circuit including first to (n-1)th transfer gates...
4675809 Data processing system for floating point data having a variable length exponent part  
An execution processing device for executing variable length floating-point data of exponent part designated by two or more kinds of representation systems and fixed length floating-point data of...
4660143 Programmable realtime interface between a Block Floating Point processor and memory  
The programmable interface gives a Block Floating Point processor the capability of performing various real-time signal algorithms on collected radar data in an external batch memory. Normally,...
4654785 Information processing system  
An information processing system having a plurality of arithmetic units such as a general instruction arithmetic unit and a floating point instruction arithmetic unit comprises means provided for...
4603323 Method for extending the exponent range of an IBM 370-type floating point processor  
A method for extending the exponent range in an IBM System/370-type floating point arithmetic processor. Very large or very small numbers are represented by a pair of words having sign, exponent,...
4528640 Method and a means for checking normalizing operations in a computer device  
A method and a means are disclosed for the throughchecking of the normalizer operations of an arithmetic unit of a data processing system involving both integer and floating-point formats in single...
4476523 Fixed point and floating point computation units using commonly shared control fields  
A data processing system using separate fixed point and floating point computation units and a single control store means for controlling the operations of both units, the units being responsive to...
Matches 101 - 150 out of 159 < 1 2 3 4 >