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7596472 |
Device for synthesis of a composite digital signal with explicit control of the first three moments thereof
The device determines the weighting coefficients to be applied to N digital source signals to form a composite signal. The first- to third-order moments of the composite signal must respectively...
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7464127 |
Fast fourier transform apparatus
A data transform system performs FFT and IFFT computations with respect to N data points. The data transform system performs radix-R (R is an integer) butterfly computation in parallel by use of M...
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7454452 |
Fast fourier transform operation with reduced cache penalty
A data processing apparatus having data cache performs an N-point radix-R Fast Fourier Transform. If the data set is smaller than the data cache, the data processing apparatus performs the Fast...
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7200194 |
Receiver signal dynamic range compensation based on received signal strength indicator
A method for processing a received signal at a mobile receiver of a wireless communications system is disclosed. The method comprises demodulating the received signal to obtain an analog base band...
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7197095 |
Inverse fast fourier transform (IFFT) with overlap and add
A system for efficiently filtering interfering signals in a front end of a GPS receiver is disclosed. Such interfering signals can emanate from friendly, as well as unfriendly, sources. One...
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7164723 |
Modulation apparatus using mixed-radix fast fourier transform
An FFT (Fast Fourier Transform) processor is disclosed which is a core block of an OFDM (Orthogonal Frequency Division Multiplexing) or DMT (Discrete Multi-tone) MODEM. The FFT processor...
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6631167 |
Process and device for transforming real data into complex symbols, in particular for the reception of phase-modulated and amplitude-modulated carriers transmitted on a telephone line
The post-processing of the transformation processing of an interleaved type is temporally nested with regards to two successive symbols, and includes storage in two separately addressable memories...
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6408319 |
Electronic device for computing a fourier transform and corresponding control process
An electronic device for computing a Fourier transform having a pipeline architecture includes at least one processing stage with a radix equal to 4. Each processing stage includes elementary...
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6366936 |
Pipelined fast fourier transform (FFT) processor having convergent block floating point (CBFP) algorithm
A pipelined FFT (fast Fourier transform) processor including a CBFP (convergent block floating point) algorithm, includes an inverse multiplexer for inverse-multiplexing an 8K-/2K-point input data,...
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6330580 |
Pipelined fast fourier transform processor
A pipelined Fast Fourier Transform Processor includes, besides a memory arrangement, a cascade of a first arithmetic unit, a scratch memory and a second arithmetic unit. One of both arithmetic...
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6324561 |
Process and device for computing a fourier transform having a "pipelined" architecture
For each input block of N data bits received as an input to a stage for computing a Fourier transform, only three quarters of the data bits of the input block are stored in a main storage. A...
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6098088 |
Real-time pipeline fast fourier transform processors
A real-time pipeline processor, which is particularly suited for VLSI implementation, is based on a hardware oriented radix-2 2 algorithm derived by integrating a twiddle factor decomposition...
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6061705 |
Power and area efficient fast fourier transform processor
A fast Fourier transform (FFT) processor is constructed using discrete Fourier transform (DFT) butterfly modules having, in preferred example embodiments, sizes greater than 4. In a first example...
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5845093 |
Multi-port digital signal processor
A digital signal processor on an integrated circuit uses a multi-port data flow structure characterized by four ports, referred to as an acquisition port, two data ports, and a coefficient port....
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5473556 |
Digit reverse for mixed radix FFT
A digit reversing system is disclosed for handling mixed radix FFT operations with arbitrary arrangements of radices. In a first step, all bits in an integer field of size log 2 N are position...
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5313413 |
Apparatus and method for preventing I/O bandwidth limitations in fast fourier transform processors
A Quasi Radix-16 Butterfly comprises an radix-4 butterfly processor and on-board memory with external memory addressing changes from a conventional radix-4 butterfly processor. On-chip cache memory...
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5303172 |
Pipelined combination and vector signal processor
A digital array signal processor and an associated method are described for implementing the fast Fourier transform radix-4 butterfly algorithm. The digital array signal processor is an integrated...
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5293330 |
Pipeline processor for mixed-size FFTs
A method is described for performing fast Fourier transforms (FFTs) of various sizes simultaneously in one pipeline processor. The processor consists of several stages of butterfly computational...
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5233551 |
Radix-12 DFT/FFT building block
Using classic Fast Fourier Transform (FFT) rules, a radix-12 FFT is composed of a first tier of 2 multiplierless radix-6 transformers followed by multiplierless radix-2 transformers, or by its...
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5091875 |
Fast fourier transform (FFT) addressing apparatus and method
Apparatus for generating memory addresses for accessing and storing data in an FFT (Fast Fourier Transform) computation is provided. The FFT computation is typically performed by computing a...
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5029079 |
Apparatus and method for flexible control of digital signal processing devices
A control apparatus for use with a digital signal processing device and associated memory units is described. The control apparatus determines, along with the electrical configuration of the...
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4868776 |
Fast fourier transform architecture using hybrid n-bit-serial arithmetic
A fast Fourier transform circuit, including an illustrative radix-eight discrete Fourier transform (DFT) kernel that operates on an n-bit-serial data format, for an efficient serial-like, pipelined...
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4791590 |
High performance signal processor
A monolithic high performance processor for computing digital signal processing algorithms based on the Fast Fourier Transform. The monolithic processor employs an array of bit-serial multipliers...
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4768159 |
Squared-radix discrete Fourier transform
A radix-N 2 or radix-N 4 discrete Fourier transform (DFT) processor having cascaded stages alternately comprising N 2 -sample memories and radix-N DFT's. Data is written into and read from the...
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4694416 |
VLSI programmable digital signal processor
Method and apparatus are provided for performing a plurality of digital signal processing functions wherein each said function is a unique combination of identical subfunctions. A plurality of...
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4689762 |
Dynamically configurable fast Fourier transform butterfly circuit
A decimation-in-frequency fast-Fourier-transform butterfly circuit for performing a radix-four butterfly operation includes a first group of adders (86, 88, 90, and 92), a second group of adders...
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