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7631027 |
Efficient multichannel filtering for CDMA modems
An efficient, multichannel filter for CDMA modems permits multiple serial, digital bit streams to be filtered by digital signal processing techniques including sample weighting and summing...
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7603401 |
Method and system for on-line blind source separation
A method and apparatus is disclosed for performing blind source separation using convolutive signal decorrelation. For a first embodiment, the method accumulates a length of input signal (mixed...
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7590675 |
Digital filter, design method thereof, design device, and digital filter design program
An original filter is connected to an adjustment filter in the longitudinal way. The original filter has a first filter coefficient of a symmetric numeric string. The adjustment filter has a...
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7590676 |
Programmable logic device with specialized multiplier blocks
A specialized multiplier block in a programmable logic device incorporates multipliers and adders, and is configurable as one or more types of finite impulse response (FIR) filter including a...
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7587441 |
Systems and methods for weighted overlap and add processing
Systems and methods for providing a weighted overlap and add (WOLA) architecture and/or for providing polyphase WOLA FFT processing that may be employed, for example, for separation or...
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7584236 |
Movable tap finite impulse response filter
A finite impulse response (FIR) filter includes a coefficient generator that generates M coefficients, where M is an integer greater than one, M storage elements each storing one of the M...
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7584235 |
Variable passband autoregressive moving average filter
A variable passband ARMA filter has as inputs a signal to be filtered, a reverse version of the signal to be filtered and a variable coefficient to produce as an output a filtered signal. The...
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7565389 |
Method for determining filter coefficients of a digital filter and digital filter
In a method for determining filter coefficients of a digital filter, particularly in UMTS, the predetermined filter coefficients bv are divided by a same scaling factor s and then quantized in that...
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7548941 |
Digital filter using memory to emulate variable shift register
A digital filter uses memory to emulate a variable shift register. Data samples are stored in a memory. The data samples are read from the memory, multiplied with corresponding coefficients stored...
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7529788 |
Digital filter design method and device, digital filter design program, and digital filter
A digital filter is designed by combining unit filters (L 10 ′, H 10 ′) having a predetermined asymmetric numerical sequence as filter coefficients (H 1 to H 3 ). Thus, it is possible to...
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7509364 |
Partial output finite impulse response filter
Apparatus and methods are provided to implement an efficient partial output finite impulse response (FIR) filter. In one embodiment, the filter operates by first receiving a set of samples from a...
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7493354 |
FIR filter tap architecture for highly dense layout
An area-efficient finite impulse response filter having permuted bit-order functional elements that provide substantially straight and direct interconnects with minimized length between adjacent...
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7492848 |
Method and apparatus for efficient multi-stage FIR filters
An interpolation filter without a FIFO memory is configured as a cascade arrangement of simpler interpolation sub-filters that are operated in reverse order. The interpolation sub-filter that...
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7461113 |
Reduced complexity adaptive filter
A FIR filter for use in an adaptive multi-channel filtering system, includes a first memory for storing data, and a second memory for storing filter coefficients. The second memory stores only...
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7454453 |
Methods, systems, and computer program products for parallel correlation and applications thereof
A fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X 0 -X M−1 ) with encoding coefficients (C 0 -C M−1 ), wherein each of...
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7412471 |
Discrete filter having a tap selection circuit
A digital signal processing circuit includes a chain of processing units having a selectable number of taps and a tap selection circuit. The tap selection circuit is coupled to the chain of...
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7409418 |
Linearly scalable finite impulse response filter
An improved Finite Impulse Response (FIR) filter is presented which provides linear scalability and implementation without the need for delay lines. A multiprocessor architecture includes a...
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7409417 |
Polyphase filter with optimized silicon area
A polyphase filter including M taps, each of the M taps including a filter coefficient. The filter also includes a multiplier-accumulator (MAC) shared by the M taps, a plurality of multiplexors for...
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7395291 |
Multiplierless correlators for HIPERLAN/2 and IEEE 802.11A wireless local area networks
A sliding correlator for timing synchronization in HIPERLAN/2 and IEEE 802.11a wireless local area networks by correlating the received signal with a known waveform is disclosed. The disclosed...
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7386581 |
Performance FIR filter
A single bit FIR filter that minimizes computation time by pre-storing outputs or portions of outputs for accumulation and output.
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7353243 |
Reconfigurable filter node for an adaptive computing machine
A reconfigurable filter node including an input data memory adapted to store a plurality of input data values, a filter coefficient memory adapted to store a plurality of filter coefficient values,...
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7353244 |
Dual-multiply-accumulator operation optimized for even and odd multisample calculations
According to some embodiments, a dual multiply-accumulate operation optimized for even and odd multisample calculations is disclosed.
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7330865 |
Digital filter and its designing method
A method for designing a digital filter for outputting a signal that is the sum of the products of multiplication of the signals at the taps of delay units ( 11 - 16 ) by the filter factors given...
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7286006 |
Sign-sign least means square filter
In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value...
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7263542 |
Inverse filtering method, synthesis filtering method, inverse filter device, synthesis filter device and devices comprising such filter devices
An inverse filtering method, comprising: generating a first filtered signal based on an input signal; and combining the first filtered signal with the input signal for obtaining a residual signal....
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7254598 |
Finite impulse response filter and digital signal receiving apparatus
An A/D conversion section performs oversampling on an analog signal at a rate M times a symbol rate to convert the analog signal into a digital signal. A FIR filtering section has two delay-element...
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7251274 |
Multichannel adaptive equaliser
An equalizer device is used for digital communications systems having a plurality of receive channels. The equalizer device in normal operation comprises a transversal filter for each receive...
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7248629 |
Efficient FIR filter for high-speed communication
A method for reducing a propagation delay of a digital filter. The digital filter has an input path and an output path and includes a set of delay elements and a number of taps. The taps couples...
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7225214 |
Digital filter realization
A digital filter realization is proposed that consists of only one multiplier, i. e. which operates with a higher clock rate and changes coefficient at the multiplier each clock cycle, but in which...
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7222144 |
Weight measurement apparatus, method of eliminating noise and method of designing digital filter
A filtering technique which makes it possible to easily and appropriately eliminate a noise without increasing a scale of a circuit necessary for a filtering process even if a noise frequency is...
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7188135 |
Analog adaptive FIR filter having independent coefficient sets for each filter tap
A finite impulse response filter having tap weight rotation is provided, where each tap has a corresponding coefficient selector. Each coefficient selector includes N coefficients, where N is the...
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7167883 |
Filter with multipliers operating in ones complement arithmetic
A finite impulse response filter, including a plurality of taps arranged to receive and process a sequence of input data samples so as to generate a filter output. Each tap consists of a multiplier...
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7152087 |
Finite impulse response filter
A filter, in particular, a finite impulse response (FIR) filter having a variable data input and output rate is disclosed. The FIR filter includes a first-in first-out (FIFO) architectural buffer,...
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7127481 |
Movable tap finite impulse response filter
Adaptive Finite Impulse Response Filter control includes structure and steps for receiving an input signal, filtering the input signal with an FIR filter having a plurality of filter stages, and...
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7120656 |
Movable tap finite impulse response filter
A Finite Impulse Response (FIR) filter is provided including a coefficient generator to generate first and second coefficients, a first control conductor, and a second control conductor. A...
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7107301 |
Method and apparatus for reducing latency in a digital signal processing device
A digital signal processing device for processing an input signal includes delay generation circuitry and processing circuitry. The delay generation circuitry receives the input signal and includes...
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RE39283 |
Method for selective filtering
A method for digital clock recovery and selective filtering includes prescribing or calculating first coefficients of a prototype of a selective filter at a characteristic frequency fc for a given...
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7107302 |
Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units
A computation core includes a computation block, an addressing block and an instruction sequencer, which are coupled to a memory through a memory interface. The computation block includes a...
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7099420 |
Block interpolation filter structure using lookup table
The present invention based on the LUT enables to perform a filtering at a low speed on a place where a high-speed process is necessary. Particularly, the LUT structure having a block structure is...
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7085795 |
Apparatus and method for efficient filtering and convolution of content data
An apparatus and method for efficient filtering and convolution of content data are described. The method includes organizing, in response to executing a data shuffle instruction, a selected...
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7080108 |
Discrete filter having a tap selection circuit
A digital signal processing circuit includes a chain of processing units having a selectable number of taps and a tap selection circuit. The tap selection circuit is coupled to the chain of...
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7054896 |
Method for implementing a multiplier-less FIR filter
A method for implementing a multiplier-less FIR filter is disclosed, in which the FIR filter performs the convolution of
H ( z ) = ∑ k = 0 N - 1 h k z - k ,
where h k is...
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7043513 |
Clock balanced segmentation digital filter provided with optimun area of data path
The present invention generally relates to provide a clock balanced segmentation digital filter, which is provided with an optimum area of a data path. The digital filter includes a controlling...
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7028061 |
FIR filter and setting method of coefficient thereof
An FIR filter and setting method of filter coefficients thereof enabling the prevention of breakdown of equi-ripple of weighted approximation error and preservation of gain of the pass band into...
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7028062 |
FIR filter, method of operating the same, semiconductor integrated circuit including FIR filter, and communication system for transmitting data filtered by FIR filter
The FIR filter separately receives input data consisting of transmitting information and composed of bit strings, and additional data which is added in order to transmit the input data. The input...
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7024440 |
Method and system for processing a discrete time input signal where the clock rate of a discrete time output signal is a multiple of the clock rate of input signal samples
A method and system of efficiently processing a discrete time input signal having a plurality of input signal samples that occur at a first clock rate into a discrete time output signal having a...
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7016926 |
Low power CSD linear phase FIR filter architecture using vertical common subexpression and filter design method therefor
A method for implementing a low power and high-speed digital filter having reduced number of adders is disclosed. The method comprises the steps of determining vertical common CSD (Canonical Signed...
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7013319 |
Digital filter methods and structures for increased processing rates
Digital filters are provided that include a converter and a data processor. The converter converts successive strings of M successive data elements that occur at a system rate F s in an input data...
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7010030 |
Software definable block adaptive decision feedback equalizer
A block decision feedback equalizer is designed by deriving, from first principles, a block exact decision feedback equalizer and then systematically applying simplifying assumptions to obtain...
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6999540 |
Programmable driver/equalizer with alterable analog finite impulse response (FIR) filter having low intersymbol interference and constant peak amplitude independent of coefficient settings
A programmable driver/equalizer with an alterable FIR enables the equalization of serial links or other transmission systems to adapt to a variety of transmission media, specifically, intersymbol...
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