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7512644 Rate multiplication method and rate multiplier  
The present invention discloses a rate multiplication method for counting a sequence of original pulse signals and outputting a target pulse signal. In this method a comparison data and original...
7454450 Mixed-signal system for performing Taylor series function approximations  
A mixed-signal system for performing Taylor series function approximations is disclosed. The mixed-signal system includes a digital-to-analog converter (DAC), multiple resistor-to-resistor (R2R)...
7395286 Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register  
A divide-by-N clock frequency divider producing N non-overlapping clocks each with precise 1/N duty ratio is implemented by a counter, a token generator and N-bit shift register. Every N clock...
7366345 Method of setting up multi-dimensional DDA variables  
A method, an apparatus, and a computer program product render a multi-dimensional digital image using raytracing in a multi-dimensional space. Variables of a multi-dimensional digital differential...
7343387 Algorithm for configuring clocking system  
A system and method for configuring an automatic test system to produce a plurality of clocks from a reference clock includes a user interface and software. The user interface receives a plurality...
7328229 Clock divider with glitch free dynamic divide-by change  
The circuit of this invention performs clock division with dynamic divide-by value change capability. This circuit provides low area and low latency. The clock divider is conventional except for...
7317294 Pulse generator and method thereof  
A pulse generator and method thereof. The pulse generator may include a first switching unit receiving a plurality of receiving a plurality of time interval indicators and a first selection signal....
7272620 Frequency divider with low harmonics  
A frequency divider has two or more storage elements connected in a loop. One of the outputs of each storage element is connected to one of the inputs of another storage element. Each storage...
7225092 Method and apparatus for measuring and adjusting the duty cycle of a high speed clock  
An apparatus, a method, and a computer program are provided to measure the duty cycle of a clocking signal in a processor. Traditionally, variations in the duty cycles of clocks within...
7197522 Bi-quad digital filter configured with a bit binary rate multiplier  
The invention is directed to a bi-quad filter circuit configured with sigma-delta devices that operate as binary rate multipliers (BRMs). Unlike conventional bi-quad filter circuits, the invention...
7124154 Clock divider  
A low speed clock divider that behaves like a high speed clock divider is provided. The clock divider includes a software-configurable low-speed component for waveform generation and a high-speed...
7124153 Frequency converter and methods of use thereof  
An all-digital frequency conversion apparatus is provided that achieves frequency conversion using a simple phase detector and integer and fractional phase feedback information from a digital...
7103622 Direct digital synthesizer with output signal jitter reduction  
A method and apparatus for reducing unwanted harmonics in direct digital synthesizer (DDS) output. The method comprises the steps of providing a set of k phase-shifted clock signals, examining, in...
7072920 Method and apparatus for digital frequency conversion  
A general method is provided to achieve frequency conversion in an all-digital frequency conversion device that produces an output signal having a selectable phase and frequency that is...
7027598 Residue number system based pre-computation and dual-pass arithmetic modular operation approach to implement encryption protocols efficiently in electronic integrated circuits  
A pre-computation and dual-pass modular operation approach to implement encryption protocols efficiently in electronic integrated circuits is disclosed. An encrypted electronic message is received...
7027597 Pre-computation and dual-pass modular arithmetic operation approach to implement encryption protocols efficiently in electronic integrated circuits  
A pre-computation and dual-pass modular operation approach to implement encryption protocols efficiently in electronic integrated circuits is disclosed. An encrypted electronic message is received...
6978016 Circuits for calculating modular multiplicative inverse  
The modular exponentiation function used in public key encryption and decryption systems is implemented in a standalone engine having at its core modular multiplication circuits which operate in...
6956793 Phase clock selector for generating a non-integer frequency division  
A frequency divider circuit uses a base counter to frequency divide a clock signal with period T by an integer value N and employs a cyclic rotational select circuit to select among multiple...
6807552 Programmable non-integer fractional divider  
A non-integer fractional divider is disclosed. According to the present invention, the non-integer fractional divider comprises means for dividing a reference clock signal having a period ‘P’...
6725245 High speed programmable counter architecture  
A high speed programmable counter architecture is disclosed. In accordance with an embodiment of the present invention, the high speed programmable counter includes an n bit high speed prescaler...
6661298 Method and apparatus for a digital clock multiplication circuit  
A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer...
6529052 Frequency multiplier based on exclusive-or gate and frequency divider  
An electronic device which includes a periodic signal generator ( 12 ) and a frequency multiplier circuit ( 14 ) for multiplying the frequency of the periodic signal. The multiplier circuit is...
6441656 Clock divider for analysis of all clock edges  
A method for dividing a high frequency clock signal for analysis of all clock edges has been developed. The method includes receiving a high frequency clock signal and dividing it up into multiple...
6407596 Apparatus and method for a clock period subdivider  
An electronic circuit generates additional clock edges from a reference clock signal utilizing switch-capacitor techniques. The electronic circuit includes a first capacitance circuit and a second...
6356123 Non-integer frequency divider  
A non-integer frequency divider that is capable of dividing an original clock frequency by a non-integer number into a desired target clock frequency. By this non-integer frequency divider, a...
6351756 Clock signal multiplier circuit for a clock signal generator circuit  
The present invention provides a multiplying circuit comprising: an oscillation control circuit for alternately activating first and second oscillation control signals for every clocks of an input...
6346833 Frequency multiplier circuit  
A frequency multiplier circuit outputs a desired frequency, wherein a frequency of a reference clock is divided by 4 by a frequency divider, the frequency of a unit clock is divided by 2 by another...
6249235 Sampling frequency conversion apparatus and fractional frequency dividing apparatus for sampling frequency  
The invention provides a sampling frequency conversion apparatus which converts a sampling frequency to another frequency using another oscillator employed in the system as the source oscillator. A...
6112217 Method and apparatus for generating clock signals  
A method and an apparatus for generating clock signals is described, by which a period of time can be subdivided into a desired number of essentially equal-length segments. The method and the...
6076096 Binary rate multiplier  
A rate multiplier for rate multiplying a pulse train comprising: an accumulator, a multiplexer for selecting one of a first and a second number of different signs to feed to the accumulator, and a...
6064740 Method and apparatus for masking modulo exponentiation calculations in an integrated circuit  
Circuitry which performs modular mathematics to solve the equation C=M k mod n and n is performed in a manner to mask the exponent k's signature from timing or power monitoring attacks. The...
6003053 Pulse signal generation circuit and pulse signal generation method  
A pulse signal generation circuit comprises a frequency setting register which is at least (n+1) bits long for setting a value of 2 n or smaller as a frequency value of a pulse signal to be...
5948046 Multi-divide frequency division  
A multi-divide frequency divider, includes a chain of serially-connected frequency divider units, each responding to a first state of received control signals by using the reference clock signal to...
5854755 Clock frequency multiplication device  
A clock frequency multiplication device comprising a first multiplier for generating an oscillating frequency every first half of a period of an input clock signal where the input clock signal is...
5841684 Method and apparatus for computer implemented constant multiplication with multipliers having repeated patterns including shifting of replicas and patterns having at least two digit positions with non-zero values  
A method for designing a constant multiplier system comprises identifying a repeated pattern in a minimal signed digit expression of a multiplier, designing a first accumulator stage to compute the...
5822229 Circuit arrangement for frequency multiplication  
A circuit arrangement for frequency multiplication is described, by means of which a digital output signal is produced, the pulse repetition rate of which is obtained from one of the output signals...
5719798 Programmable modulo k counter  
A modulo-k counter or frequency divider that produces an output pulse for every k clock pulses. The counter is programmable and synchronous, and is faster than any other programmable frequency...
5633814 Non-modulo power of 2 frequency divider  
A frequency divider/counter circuit utilizing at clock and a clear signal to divide the clock by an odd value. A first adder receives the clock and the clear signal, and has a carry-in input, and...
5625806 Self configuring speed path in a microprocessor with multiple clock option  
A microprocessor having an option to select one of multiple clock frequencies as an internal clock frequency. The microprocessor reconfigures the speed paths of internal function circuit on the...
5473553 Frequency dividing device  
The invention relates to a device for dividing an input signal of frequency f1 by a parametrized number of ratio M/m in order to supply an output signal of frequency f2. This device performs a...
5422835 Digital clock signal multiplier circuit  
A digital clock signal multiplier circuit for generating an on-chip clock signal having a higher frequency than a system clock signal. A variable delay line, coupled to receive the system clock...
5287296 Clock generators having programmable fractional frequency division  
A clock generator is described for generating an output clock frequency from an input clock frequency where the frequencies of the clocks are not integrally related. The division process is...
5267182 Diophantine synthesizer  
A frequency synthesizer with at least two main Phase Locked Loops (PLLs) and a signal combiner, where each PLL's input is driven by a reference source of frequency F refj , and each PLL has...
5255213 Apparatus for providing selectable fractional output signals  
A circuit for producing output signals which indicate a fraction of a series of input signals including apparatus for furnishing a first value equivalent to the value of a numerator of the...
5235531 Method and arrangement for dividing the frequency of an alternating voltage with a non-whole-numbered division factor  
In a synchronous data network such as a synchronous digital hierarchy, frequency generators in every network node must be followed up by synchronous signals having, for example, a frequency of...
5088057 Rational rate frequency generator  
A rational rate generator circuit is disclosed where the output signal frequency, f o , is rationally related to the input signal frequency, f i , by: f o =f i (P/Q). This rational rate generator...
5023822 Pulse ratio system  
A programmable system for providing a programmable ratio of output pulses to input pulses. The programmable system receives pulses from an electric power meter and outputs a programmable number of...
5010359 Method and apparatus for photometry from plural points of automatic exposure camera  
A method and apparatus for effecting photometry from plural points of an automatic exposure camera includes the provision of photometric means which determines the brightness of a relatively...
4996699 Digitally settable frequency divider, especially for a frequency synthesizer  
A frequency divider circuit, especially for use in frequency synthesizers, in which the frequency divider is provided with whole-number division factors, permits intergrator, differentiator and/or...
4991188 Digital frequency divider  
A digital frequency divider capable of providing output pulses of frequency f out related by Y/X to the frequency of the input pulses f in , where X and Y are positive whole numbers and...
Matches 1 - 50 out of 163 1 2 3 4 >