|
Match
|
Document |
Document Title |
|
|
7637735 |
Procedure for regulating a combustion process
In a procedure for regulating a combustion process in an installation while air is being supplied, material is converted by the combustion process, with at least one flame being formed, and the...
|
|
|
7620819 |
System and method for classifying regions of keystroke density with a neural network
We develop a system consisting of a neural architecture resulting in classifying regions corresponding to users' keystroke patterns. We extend the adaptation properties to classification phase...
|
|
|
7558740 |
System and method for scheduling and train control
A scheduling system and method for moving plural objects through a multipath system described as a freight railway scheduling system. The scheduling system utilizes a cost reactive resource...
|
|
|
7539624 |
Automatic train control system and method
A scheduling system and method for moving plural objects through a multipath system described as a freight railway scheduling system. The scheduling system utilizes a cost reactive resource...
|
|
|
7430546 |
Applications of an algorithm that mimics cortical processing
An information processing system having neuron-like signal processors that are interconnected by synapse-like processing junctions that simulates and extends capabilities of biological neural...
|
|
|
7389208 |
System and method for dynamic knowledge construction
A system and method responsive to input stimuli is provided by incorporating a computer software program, hardware processing engine, or a specialized ASIC chip processor apparatus to capture...
|
|
|
7340328 |
Scheduling system and method
A scheduling system and method for moving plural objects through a multipath system described as a freight railway scheduling system. The scheduling system utilizes a cost reactive resource...
|
|
|
7272585 |
Operation circuit and operation control method thereof
A product-sum operation circuit includes a pulse width/digital conversion circuit ( 9 ) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a...
|
|
|
7222002 |
Vibration engine monitoring neural network object monitoring
The present invention provides an aircraft engine vibration system that provides information about engine health. Embodiments of the present invention monitor for excessive vibration, monitor for...
|
|
|
7143072 |
Method and a system for calculating the values of the neurons of a neural network
A neural network having layers of neurons divided into sublayers of neurons. The values of target neurons in one layer are calculated from sublayers of source neurons in a second underlying layer....
|
|
|
7053895 |
Image processing apparatus, image processing method, control program and recording medium
An image processing apparatus which processes input image data of Y lines, each consisting of X pixels, using an SIMD processor, comprises a calculation unit including N (X>N>1, Y>N>1)...
|
|
|
6947916 |
IC for universal computing with near zero programming complexity
A computing machine capable of performing multiple operations using a universal computing unit is provided. The universal computing unit maps an input signal to an output signal. The mapping is...
|
|
|
6842745 |
Programmable chaos generator and process for use thereof
A chaotic signal generator includes a set of elements connected together for generating chaotic signals. The connection scheme may correspond to the circuit generally referred to as Chua's circuit,...
|
|
|
6836767 |
Pipelined hardware implementation of a neural network circuit
In a first aspect, a pipelined hardware implementation of a neural network circuit includes an input stage, two or more processing stages and an output stage. Each processing stage includes one or...
|
|
|
6678670 |
Non-integer order dynamic systems
A circuit implementing a non-integer order dynamic system includes a neural network that receives at least one input signal and generates therefrom at least one output signal. The input and output...
|
|
|
6625588 |
Associative neuron in an artificial neural network
An associative artificial neuron and method of forming output signals of an associative artificial neuron includes receiving a number of auxiliary input signals; forming from the auxiliary input...
|
|
|
6606614 |
Neural network integrated circuit with fewer pins
A neural network integrated circuit comprises many neuron circuits each with a distance resister that is compared in a competition for the closest-hit with all the other neurons. Such closest-hit...
|
|
|
6539368 |
Neural processor, saturation unit, calculation unit and adder circuit
The present invention relates to the field of computer science and can be used for neural network emulation and digital signal processing. Increasing of the neural processor performance is achieved...
|
|
|
6519577 |
Digital signal filter using weightless neural techniques
A number of consecutive samples in unit distance code (here Gray code) are effectively stacked and supplied to respective sum and threshold devices 20 corresponding to each bit position, to...
|
|
|
6507828 |
Neuron circuit and related techniques
A neuron circuit including means for synaptic modification is described. The circuit emulates the electrical behaviors of the neuron membrane, dendrite, and synapse, using principles based on the...
|
|
|
6505182 |
Recognition engine with time referenced neurons
Detection is implemented by a multiplier, a lookup table or other apparatus with two inputs, one of which typically receives an input signal from a sensor, and the other a reference or weighting...
|
|
|
6502083 |
Neuron architecture having a dual structure and neural networks incorporating the same
The improved neuron is connected to input buses which transport input data and control signals. It basically consists of a computation block, a register block, an evaluation block and a daisy chain...
|
|
|
6501294 |
Neuron circuit
A neuron circuit that can be served as a building block for a neural network implemented in an integrated circuit is disclosed. The neuron circuit includes a synapse circuit block and a neuron body...
|
|
|
6453309 |
Method for correcting errors in parallel A/D conversion, corrector and parallel A/D converter
The invention pertains to a method and corrector (IC 6 ) for correcting an error in a parallel analog-to-digital conversion. Such a correctable error is caused by uncertainties in the reading of...
|
|
|
6424956 |
Stochastic encoder/decoder/predictor
An artificial intelligence system is provided which makes use of a dual subroutine to adapt weights. Elastic Fuzzy Logic (“ELF”) System is provided in which classical neural network learning...
|
|
|
6405185 |
Massively parallel array processor
Image processing for multimedia workstations is a computationally intensive task requiring special purpose hardware to meet the high speed requirements associated with the task. One type of...
|
|
|
RE37488 |
Heuristic processor
A heuristic processor incorporates a digital arithmetic unit arranged to compute the squared norm of each member of a training data set with respect to each member of a set of centers, and to...
|
|
|
6317658 |
Neurocomputing control distribution system
A method, system and computer-readable medium for controlling a control subsystem of a vehicle. The control subsystem includes at least one propulsion, aerodynamic, or other control effector. The...
|
|
|
6282530 |
Digital neural node
Disclosed is a digital neural node according to the invention. The digital neural node, electrically coupled to n information processing units (n is an integer larger than 1), includes n data...
|
|
|
6236976 |
System and process for job scheduling using limited discrepancy search
Assignment of attributes to elements subject to constraints is achieved using a system that has a systematic engine and a nonsystematic engine. The systematic engine includes a schedule developer...
|
|
|
6199057 |
Bit-serial neuroprocessor architecture
A neuroprocessor architecture employs a combination of bit-serial and serial-parallel techniques for implementing the neurons of the neuroprocessor. The neuroprocessor architecture includes a...
|
|
|
6154735 |
Resource scheduler for scheduling railway train resources
A resource scheduler for scheduling railway train resources over a track system with a high degree of optimization. The scheduler is implemented in an expert system that employs simulated annealing...
|
|
|
6151594 |
Artificial neuron and method of using same
An artificial neuron, which may be implemented either in hardware or software, has only one significant processing element in the form of a multiplier. Inputs are first fed through gating functions...
|
|
|
6078190 |
Threshold logic with improved signal-to-noise ratio
The threshold value logic has a non-inverting circuit path (S) that and an inverting circuit path (S') are connected to at least one comparative weighting subcircuit (BC, BS). The non-inverting...
|
|
|
6061673 |
Learning methods in binary systems
This invention provides learning methods in binary systems by modifying the connected states of the circuit among each basic binary gate in binary combined logical and sequential circuits composed...
|
|
|
6058386 |
Device for designing a neural network and neural network
The invention relates to a device for designing a neural network, in which to determine the number of neurons (21 . . . 24) in the intermediate layer, the domain of the input signal (X1, X2) in...
|
|
|
6041322 |
Method and apparatus for processing data in a neural network
A digital artificial neural network (ANN) reduces memory requirements by storing sample transfer function representing output values for multiple nodes. Each nodes receives an input value...
|
|
|
6041321 |
Electronic device for performing convolution operations
An electronic device for performing convolution operations comprises shift registers for receiving binary input values representative of an original matrix, synapses for storing weights correlated...
|
|
|
5995954 |
Method and apparatus for associative memory
A method and apparatus for an electronic artificial neural network, which serves as an associative memory that has a complete set of N-dimensional Hadamard vectors as stored states, suitable for...
|
|
|
5875439 |
Nonrecurrent binary code recognizer
A nonrecurrent version of the Neural Network Binary Code Recognizer is disclosed. This Nonrecurrent Binary Code Recognizer, which decodes an input vector of n analog components into a decoded...
|
|
|
5857178 |
Neural network apparatus and learning method thereof
A neural network apparatus includes a neural network including at least two neuron layers each having a plurality of neurons and at least one synapse layer having a plurality of synapses each...
|
|
|
5835682 |
Dynamical system analyzer
A dynamical system analyser (10) incorporates a computer (22) to perform a singular value decomposition of a time series of signals from a nonlinear (possibly chaotic) dynamical system (14)....
|
|
|
5812993 |
Digital hardware architecture for realizing neural network
A digital neural network architecture including a forward cascade of layers of neurons, having one input channel and one output channel, for forward processing of data examples that include many...
|
|
|
5806054 |
Neuron MOSFET module structure for binary logic circuits
A neuron MOSFET based module for use in the design and layout of binary logic circuits. In a first embodiment, the module is composed of four neuron MOSFETs arranged symmetrically to form a unit...
|
|
|
5799134 |
One dimensional systolic array architecture for neural network
A circuit for implementing a neural network comprises a one dimensional systolic array of processing elements controlled by a microprocessor. The one dimensional systolic array can implement...
|
|
|
5784536 |
Neural processor comprising means for normalizing data
A neural processor includes neural calculation apparatus (30, NQ, RQ) which normalize an input data X with respect to another input data Y. It performs a division of X by Y in order to determine a...
|
|
|
5771337 |
Cell for electronic diffusion network making it possible to create receptive fields in pseudo-axonal networks and network applying same
A cell for an electronic diffusion network that can be connected with neighboring cells for the transmission of information via linking elements (8n, 8rn, 8sn) having a nonlinear conduction...
|
|
|
5768476 |
Parallel multi-value neural networks
In a parallel multi-value neural network having a main neural network 16 and a sub neural network 18 coupled with the main neural network 16 in parallel for an input signal, the main neural network...
|
|
|
5764860 |
Learning method for multi-level neural network
A learning method supervised by a binary teacher signal for a binary neural network comprises at least an error signal generator 10 for weighting factor updating, which generates an error signal...
|
|
|
5751913 |
Reconfigurable neural network and difference-square neuron
A reconfigurable neural network includes several switches each having at least two conductive leads, data flow direction of the conductive leads is programmed to select one of the conductive leads...
|