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7620819 |
System and method for classifying regions of keystroke density with a neural network
We develop a system consisting of a neural architecture resulting in classifying regions corresponding to users' keystroke patterns. We extend the adaptation properties to classification phase...
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7272585 |
Operation circuit and operation control method thereof
A product-sum operation circuit includes a pulse width/digital conversion circuit ( 9 ) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a...
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7035835 |
High-precision current-mode pulse-width-modulation circuit
A current-mode pulse-width-modulation (PWM) circuit converts analog current signals into pulse signals. The PWM circuit includes a first I-V converter and one or more second I-V converters, each of...
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6671678 |
Multi-functional arithmetic apparatus with multi value states
A multi-functional arithmetic apparatus with multi value-states comprise a gating array, which is composed of gating elements arranged in n row by m column. Each gating element has at least two...
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6625588 |
Associative neuron in an artificial neural network
An associative artificial neuron and method of forming output signals of an associative artificial neuron includes receiving a number of auxiliary input signals; forming from the auxiliary input...
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6539368 |
Neural processor, saturation unit, calculation unit and adder circuit
The present invention relates to the field of computer science and can be used for neural network emulation and digital signal processing. Increasing of the neural processor performance is achieved...
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6523018 |
Neural chip architecture and neural networks incorporated therein
The neural semiconductor chip first includes: a global register and control logic circuit block, a R/W memory block and a plurality of neurons fed by buses transporting data such as the input...
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6513023 |
Artificial neural network with hardware training and hardware refresh
A neural network circuit is provided having a plurality of circuits capable of charge storage. Also provided is a plurality of circuits each coupled to at least one of the plurality of charge...
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6507828 |
Neuron circuit and related techniques
A neuron circuit including means for synaptic modification is described. The circuit emulates the electrical behaviors of the neuron membrane, dendrite, and synapse, using principles based on the...
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6505182 |
Recognition engine with time referenced neurons
Detection is implemented by a multiplier, a lookup table or other apparatus with two inputs, one of which typically receives an input signal from a sensor, and the other a reference or weighting...
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6405184 |
Process for producing fault classification signals
A method for generating fault classification signals which identify faulty loops which develop in a multiphase energy supply network observed in the event of a fault from a protective device with a...
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5956702 |
Time-series trend estimating system and method using column-structured recurrent neural network
Each neural element of a column-structured recurrent neural network generates an output from input data and recurrent data provided from a context layer of a corresponding column. One or more...
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5781702 |
Hybrid chip-set architecture for artificial neural network system
A self-contained chip set architecture for ANN systems, based on back-propagation model with full-connectivity topology, and on-chip learning and refreshing, based on analog chip set technology...
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5696883 |
Neural network expressing apparatus including refresh of stored synapse load value information
A self-organizable neural network expressing unit includes a plurality of neuron units electronically expressing nerve cell bodies, and a plurality of synapse expressing units electronically...
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5680515 |
High precision computing with charge domain devices and a pseudo-spectral method therefor
The present invention enhances the bit resolution of a CCD/CID MVM processor by storing each bit of each matrix element as a separate CCD charge packet. The bits of each input vector are separately...
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5644253 |
Multiple-valued logic circuit
There are provided n operation circuits in a multiple-valued logic circuit which receives plural multiple-valued input logic signals corresponding to respective numeral values and outputs a...
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5634067 |
Systolic array processor
A systolic array processor is provided which is adapted to virtually constitute a number of analog type pipelining processors which operate in a parallel manner on an analog type shift register...
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5600843 |
Ring systolic array system for synchronously performing matrix/neuron computation using data transferred through cyclic shift register connected in cascade of trays
A parallel data processing system comprises a plurality of data processing units each having at least one input and storing data of a matrix and a plurality of trays each having a first input and...
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5553197 |
Devices for use in neural processing
A device for use in neural processing comprises a plurality of probabilistic RAMs (pRAMs). The output of the pRAMs are connected in common to means for accumulating their output signals and for...
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5548684 |
Artificial neural network viterbi decoding system and method
An artificial neural network (ANN) decoding system decodes a convolutionally-encoded data stream at high speed and with high efficiency. The ANN decoding system implements the Viterbi algorithm and...
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5479578 |
Weighted summation circuitry with digitally controlled capacitive structures
An array of weighted summation circuits, N in number, each generate a weighted sum response to the same plurality of input signals, M in number. Each weighted summation circuit includes at least...
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5475794 |
Semiconductor neural network and operating method thereof
A semiconductor neural network includes a coupling matrix having coupling elements arranged in a matrix which couple with specific coupling strengths internal data input lines to internal data...
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5412256 |
Neuron for use in self-learning neural network
A neuron for use in a self-learning neural network comprises a current input node at which a plurality of synaptic input currents are summed using Kirchoff's current law. The summed input currents...
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5355438 |
Weighting and thresholding circuit for a neural network
An analog circuit which performs weighting and thresholding for a neural network. Each neuron of the neural network includes an operational amplifier receiving an input signal, the output of which...
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5319738 |
Neural network device
This invention has an object to provide a practical neural network device. The first neural network device of this invention comprises an input circuit for performing predetermined processing of...
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5295091 |
Analog implementation of a pattern classifier
A method of and system for classifying a pattern wherein there is provided a node, the negative of a predetermined threshold signal is applied to the node, a plurality of digital signals in...
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5293457 |
Neural network integrated circuit device having self-organizing function
An extension directed integrated circuit device having a learning function on a Boltzmann model, includes a plurality of synapse representing units arrayed in a matrix, a plurality of neuron...
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5274743 |
Learning system for a neural net of a suitable architecture, physically insertable in the learning process
The subject of the invention is a learning system for a neural net physically insertable in the learning process, which comprises a detecting member for presenting to said neural net the basic...
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5264734 |
Difference calculating neural network utilizing switched capacitors
A difference calculating neural network is disclosed having an array of synapse cells arranged in rows and columns along pairs of row and column lines. The cells include a pair of floating gate...
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5255349 |
Electronic neural network for solving "traveling salesman" and similar global optimization problems
This invention is a novel high-speed neural network based processor for solving the "traveling salesman" and other global optimization problems. It comprises a novel hybrid architecture employing a...
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5235672 |
Hardware for electronic neural network
This application discloses hardware suitable for use in a neural network system. It makes use of Z-technology modules, each containing densely packaged electronic circuitry. The modules provide...
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5224066 |
Method and apparatus for parallel implementation of neural networks
Long and short term memory equations for neural networks are implemented by means of exchange of signals which carry information in the form of both binary and continuously modulated energy...
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5212766 |
Neural network representing apparatus having self-organizing function
A neutral network representing apparatus includes a plurality of neuron expressing units and a plurality of synapse load expressing units. Each of the synapse load expressing units couples two...
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5177746 |
Error correction circuit using a design based on a neural network model
An error correction circuit is provided which uses NMOS and PMOS synapses to form neural network type responses to a coded multi-bit input. Use of MOS technology logic in error correction circuits...
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5168551 |
MOS decoder circuit implemented using a neural network architecture
A decoder circuit based on the concept of a neural network architecture has a unique configuration using a connection structure having CMOS inverters, and PMOS and NMOS bias and synapse...
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5167008 |
Digital circuitry for approximating sigmoidal response in a neural network layer
A plurality of neural circuits are connected in a neural network layer for generating their respective digital axonal responses to the same plurality of synapse input signals. Each neural circuit...
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5151970 |
Method of generating, in the analog regime, weighted summations of digital signals
A method is disclosed for operating electronic apparatus for generating a weighted summation of digital input signals as manifested in electric signal form, each sample of which digital input...
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5140531 |
Analog neural nets supplied digital synapse signals on a bit-slice basis
Plural-bit digital input signals to be subjected to weighted summation in a neural net layer are bit-sliced; and a number N of respective first through N th weighted summations of the bits of the...
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5129042 |
Sorting circuit using neural network
A sorting circuit for arranging data in sequence according to the magnitudes of the data values, uses the concept of a neural network. The sorting circuit is constructed of shift registers,...
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5115492 |
Digital correlators incorporating analog neural network structures operated on a bit-sliced basis
Plural-bit digital input signals to be subjected to weighted summation are bit-sliced; and a number N of respective first through N th weighted summations of the bits of the digital input signals...
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5113484 |
Rank filter using neural newwork
A rank filter is provided which can be used for improving an image signal degraded by noise, while at the same time maintaining edge information. The rank filter is implemented by using a neural...
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5075868 |
Memory modification of artificial neural networks
An artificial neural network, which has a plurality of neurons each receiving a plurality of inputs whose effect is determined by adjust able weights at synapses individually connecting the inputs...
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5072130 |
Associative network and signal handling element therefor for processing data
A signal processing network circuit which may be used, for example, as a filter or an associative memory has elements (101, 102, 103, 104) each having a respective input conductor (85, 86, 87, 88)...
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5068662 |
Neural network analog-to-digital converter
An asynchronous, rapid, neural network analog-to-digital converter. This converter requires only two different resistance values in R2R resistor ladders, and does not require both positive and...
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5063521 |
Neuram: neural network with ram
A random access memory (RAM) circuit is provided wherein an input signal matrix forming an identifiable original pattern is learned and stored such that a distorted facsimile thereof may be applied...
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5053645 |
Threshold logic circuit
In a threshold logic circuit, digital input signals are weighted and summed up and then the sum of weighted digital signals is compared with a threshold value. The threshold logic circuit comprises...
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5047655 |
Programmable analog neural network
The neural network of the invention, of the type with a Cartesian matrix, has a first column of addition of the input signals, and at each intersection of the M lines and N columns it comprises a...
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5043913 |
Neural network
Input signals inputted in respective unit circuits forming a synapse array pass through variable connector elements to be integrated into one analog signal, which in turn is converted into a binary...
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5040134 |
Neural network employing leveled summing scheme with blocked array
A novel associative network architecture is described in which a neural network is subdivided into a plurality of smaller blocks. Each block comprises an array of pattern matching cells which is...
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5034918 |
Adaptive associative memory comprising synapes of CMOS transistors
An associative memory for storing an n-bit stored vector in m different states comprises n first amplifiers connected between n input terminals and n output terminals, and m second amplifiers to...
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