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7620863 |
Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits
Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices, thereby enabling the utilization of partially defective...
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7617493 |
Defining memory indifferent trace handles
A handle for a trace is provided that is memory indifferent. The handle is created using contents of the trace rather than memory location of the trace. This enables the trace to be easily...
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7617303 |
Systems and method for optimizing access provisioning and capacity planning in IP networks
The present invention provides a method for avoiding demand forecast errors in a network topology model having a plurality of nodes, by monitoring and controlling the quantity of a selected port...
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7617088 |
Interpage prologue to protect virtual address mappings
In a computer which translates instructions from a target instruction set to a host instruction set, a method for determining validity of a translation of a target instruction linked to an earlier...
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7610569 |
Chip design verification apparatus and data communication method for the same
A method of verifying a chip design includes: a software side operation step of transmitting output data generated by an operation of a software block to an interface unit, determining whether...
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7610443 |
Method and system for accessing audiovisual data in a computer
A method and system for accessing audiovisual data in a computer, which has a hard disk, a hard disk controller and a device driver. The hard disk is divided into a partition region and a...
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7610108 |
Method and apparatus for attenuating error in dynamic and steady-state processes for prediction, control, and optimization
A method for providing independent static and dynamic models in a prediction, control and optimization environment utilizes an independent static model ( 20 ) and an independent dynamic model ( 22...
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7606696 |
Programmable extended compression mask for dynamic trace
This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace...
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7603713 |
Method for accelerating hardware emulator used for malware detection and analysis
A method and system for accelerating malware emulator by using an accelerator. The accelerator allows for a potentially malicious component (i.e., process) containing dummy processes to be executed...
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7596654 |
Virtual machine spanning multiple computers
In one embodiment, a virtual NUMA system may be formed from multiple computer systems coupled to a network such as InfiniBand, Ethernet, etc. Each computer includes one or more software modules...
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7590912 |
Using a chip as a simulation engine
The chip is placed in self simulation mode. When the trace logic does not have any more data to output it changes the state of the advance signal. The clock generator detects this state change and...
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7581229 |
Systems and methods for supporting device access from multiple operating systems
A host operating system can take ownership of a device. The host can project the presence of a device proxy (VDP) into a guest operating system. The VDP provides a set of device functions...
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7581139 |
Distinguishing between two classes of trace information
A method of tracing activity of a data processor generates a trace data stream during a normal background mode and a foreground mode while servicing a real time interrupt during an emulation halt....
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7577559 |
Apparatus for transcoding encoded content
An apparatus for transcoding encoded content, the encoded content being encoded using a first coding algorithm, with a first interface for communicating with a content sink, the first interface...
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7577558 |
System and method for providing compact mapping between dissimilar memory systems
A memory mapping system for providing compact mapping between dissimilar memory systems and methods for manufacturing and using same. The memory mapping system can compactly map contents from one...
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7574341 |
Speculative expectation based event verification
A computer implemented method of verifying events generated by an agent includes detecting a stimulus at an input of the agent and determining whether generation of an event by the agent in...
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7571293 |
Emulation of point-in-time data copying operations
A host computer system (host) includes an application that generates I/O commands for a first type of point-in-time (PIT) copy operation, and an I/O subsystem coupled to a data storage system...
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7571087 |
Computer storage exception handling apparatus and method for virtual hardware system
In a design system using virtual hardware models, a filtering manager for filtering execution results and determining which software instructions are candidates for restructuring. In some examples,...
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7565408 |
Information handling system including a local real device and a remote virtual device sharing a common channel
A remote management system is coupled to a target information handling system so that a virtual device on the remote system can transmit information such as software, data, applications and...
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7562320 |
Asic based conveyor belt style programmable cross-point switch hardware accelerated simulation engine
An ASIC based hardware accelerated simulation engine accelerates logic verification of integrated circuit designs utilizing a field of ASIC chips interconnected by direct connections. Communication...
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7562276 |
Apparatus and method for testing and debugging an integrated circuit
An integrated circuit (IC) comprises an embedded processor. An embedded in-circuit emulator (ICE) emulates at least one function of the embedded processor, performs at least one of testing and...
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7562170 |
Programmable extended compression mask for dynamic trace
This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace...
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7555423 |
Emulation processor interconnection architecture
The present system and methods are directed to the interconnection of clusters of emulation processors comprising emulation processors in a software-driven hardware design verification system. The...
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7555422 |
Preserving emulation capability in a multi-core system-on-chip device
A system comprises a multi-core silicon-on-chip (SOC) device. The SOC device includes a core module, a test data shift path, a core power control module, and an emulation control module. The core...
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7555421 |
Device emulation for testing data network configurations
A system and method for providing a virtual implementation of a large scale network of devices. The invention emulates an entire network of network devices using the configuration information...
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7555420 |
Method and system for network emulation
A system and method for emulation of a network link include an application programming interface (API) for testing distributed applications by way of a network emulator. According to aspects of the...
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7552426 |
Systems and methods for using synthetic instructions in a virtual machine
The present invention compensates for the shortcomings in x86 processor architectures by providing a set of “synthetic instructions” that cause a trap and thereby provide an opportunity for the...
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7548842 |
Scalable system for simulation and emulation of electronic circuits using asymmetrical evaluation and canvassing instruction processors
A scalable system for verifying electronic circuit designs in anticipation of fabrication by compiling a hardware description to instructions for canvassing processors and instructions for circuit...
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7543086 |
Method for controlling universal serial bus (USB) device between incompatible operating system platforms
The present invention relates to a method for assisting an application, executed in a processing platform where a first operation system is installed, in controlling a USB device plugged in a...
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7536616 |
JTAG testing arrangement
JTAG test equipment arranged to establish an asynchronous data transmission connection with a JTAG-compatible device under test for the transmission of test data between test access ports (TAP) in...
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7536291 |
System and method to support simulated storage operations
The present invention includes a system for simulating the performing of data storage operations. The system may include a storage manager component, at least one media management component...
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7536288 |
Method, system and program product supporting user tracing in a simulator
According to a method of specifying a trace array for simulation of a digital design, one or more entities within a simulation model are specified with one or more statements in one or more...
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7533315 |
Integrated circuit with scan-based debugging and debugging method thereof
An integrated circuit comprises a test interface, an embedded in-circuit emulator, a circuit-under-debugging, and a memory. The embedded in-circuit emulator is used for software debugging via the...
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7533211 |
Cross-bar switching in an emulation environment
A system and method are disclosed for crossbar switching in an emulation environment. The switch is designed to coordinate scheduling between different crossbars in the system and to be dynamically...
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7519767 |
Emulated tape-based storage media
A system, method and a computer program product for emulating a tape-based storage system to provide data storage. The system includes a data storage medium storing a data set which represents the...
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7516061 |
Method and system for using stored data items in native data formats in emulated e-mode programs
An embodiment of the invention is a technique for enabling an emulator that emulates an e-mode program to utilize stored data items whose values are stored in native data format in native memory....
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7505890 |
Hard disk drive emulator
A hard disk drive (HDD) emulator comprises a dynamic random access memory, a controller that refreshes content of the dynamic random access memory, and an input/output port coupled to the...
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7505889 |
Transcoding media system
A proxy subsystem for a media renderer comprises a network interface, a content transfer subsystem coupled to the network interface, a format transcoder coupled to the content transfer subsystem...
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7502728 |
Code coverage testing in hardware emulation
Code coverage questions are addressed by a code coverage method that instruments an electronic module source design file with coverage probes and gives hierarchical names to the probes, then...
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7502727 |
Tracing user change of program counter during stop event
This invention tracks emulation changes in the program counter of the central processing unit of a data processor during emulation halt. The sequence includes: pausing the central processing unit...
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7500082 |
Automating the testing of software or hardware components by dynamically creating virtual storage devices on a simulated system bus in a physical computer system
Disclosed is a method for automating testing tasks which would otherwise have to be done manually using actual hardware by providing the capability to dynamically create many types of storage...
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7499848 |
Scripting support for an emulator
An emulation system that allows a user to create a script is provided. The emulation system emulates a handheld computing device, such as a calculator, on an electronic device such as a personal...
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7496495 |
Virtual operating system device communication relying on memory access violations
Attempts by drivers of a virtualized legacy computer game to communicate with nonexistent legacy game system hardware are converted into calls to actual hardware of the host computer game system....
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7496494 |
Method and system for multiprocessor emulation on a multiprocessor host system
A method (and system) for executing a multiprocessor program written for a target instruction set architecture on a host computing system having a plurality of processors designed to process...
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7493544 |
Extending test sequences to accepting states
State spaces are traversed to produce test cases, or test coverage. Test coverage is a test suite of sequences. Accepting states are defined. Expected costs are assigned to the test graph states....
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7487344 |
Implementing a microprocessor boot configuration prom within an FPGA
A method and apparatus are provided for storing the boot configuration PROM of a microprocessor in an FPGA. The boot interface of the microprocessor, such as an I2C interface, leads to the FPGA...
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7487075 |
System and method to simulate a plurality of networked programmable logic controllers
A system and method for simulating a plurality of networked program logic controllers includes, in one aspect of the invention, determining if a configuration of networked program logic controllers...
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7483825 |
Method for the creation of a hybrid cycle simulation model
Disclosed is a method for constructing a Hybrid Cycle Simulation model comprising Compiled Data Units (CDUs) for use in design verification. The simulation model may contain a plurality of 1-cycle...
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7480610 |
Software state replay
A tool for emulation systems that obtains the state values for only discrete partitions of a circuit design. When a partition is being emulated, the emulation system obtains the input values for...
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7480609 |
Applying distributed simulation techniques to hardware emulation
A system for applying distributed software simulation techniques to hardware emulation may include a first hardware emulator mounted on a first expansion board at a first host, and a second...
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