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7613599 |
Method and system for virtual prototyping
An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are...
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7610108 |
Method and apparatus for attenuating error in dynamic and steady-state processes for prediction, control, and optimization
A method for providing independent static and dynamic models in a prediction, control and optimization environment utilizes an independent static model ( 20 ) and an independent dynamic model ( 22...
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7606165 |
What-if analysis for network diagnostics
A network troubleshooting framework is described. In an implementation, a method includes generating a first estimation of network performance by a simulator based on network settings obtained from...
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7594210 |
Timing variation characterization
A method includes grouping cells with similar topological characteristics into a family of cells, the topological characteristics being defined in part by topological layouts of transistors in the...
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7584444 |
System and method for external-memory graph search utilizing edge partitioning
A method and system is provided for generator successor nodes in an external-memory search of a graph having a plurality of nodes and outgoing edges of the plurality of nodes. The method and system...
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7581199 |
Use of state nodes for efficient simulation of large digital circuits at the transistor level
An integrated circuit design simulation method is provided that takes advantage of the fact that, when an instance of a circuit module has been simulated under a given set of input conditions, and...
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7571398 |
Method for the determination of the quality of a set of properties, usable for the verification and specification of circuits
A method is specified for determining the quality of a quantity of properties describing a machine, including a step for determining the existence of at least one sub-quantity of interrelated...
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7571088 |
Simulation of connected devices
Simulating device interactions. A method may be practiced in a computing system for simulating interconnected devices. The method of simulating device interactions may be done in performing an...
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7567893 |
Clock simulation system and method
A simulation system, a computer product to implement a simulation method, and a method of simulating a digital circuit that has at least one element and at least one clock signal having clock...
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7561999 |
Verification apparatus, verification method, and program
A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an...
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7555689 |
Generating responses to patterns stimulating an electronic circuit with timing exception paths
Improved responses can be generated to scan patterns (e.g., test patterns) for an electronic circuit design having timing exception paths by more accurately determining the unknown values that...
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7555417 |
Selectively reducing the number of cell evaluations in a hardware simulation
An electrical circuit comprising a plurality of cells can be simulated to produce simulation results by sorting cells between active status cells and inactive status cells and reducing the...
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7552409 |
Engineering change order process optimization
A method for reaching signoff closure in an ECO (engineering change order) process involves the use of violation context data from the signoff tool as the basis for design layout modifications in...
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7552043 |
Method, system and program product for selectively removing instrumentation logic from a simulation model
According to a method of simulation processing, a simulation model is received that includes a plurality of design entity instances modeling a digital system and one or more instrumentation entity...
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7549136 |
System and method for approximating intrinsic capacitance of an IC block
A system, method, and computer program product for approximating intrinsic capacitance of an integrated circuit (IC) block such as, for example, a compliable memory instance. Estimates of N-well...
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7539961 |
Library-based solver for modeling an integrated circuit
A system and method for modeling an IC (integrated circuit) employs a mesh model and a grid model for separating impedance effects between nearby and far-away pairs of mesh elements. Models for...
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7536287 |
System and method of interactive situation simulation
An authoring, execution, and participation software system and corresponding method for the capture and execution of real-world events (e.g., crises) involving individuals such as senior private...
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7535250 |
Output impedance calibration circuit with multiple output driver models
A method and circuitry for calibration of the output impedance of output driver circuits in an integrated circuit is disclosed. The output drivers within an area on the integrated circuit are...
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7529655 |
Program product for defining and recording minimum and maximum event counts of a simulation utilizing a high level language
According to one method of simulation processing, instrumentation code, such as an runtime executive (rtx), receives one or more statements describing an count event and identifying the count event...
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7526745 |
Method for specification and integration of reusable IP constraints
A hardware-block constraint specification method includes defining a plurality of hardware-block constraint categories according to at least one of type of constraint and constraint operating mode...
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7526741 |
Microfluidic design automation method and system
The present invention generally relates to microfluidics and more particularly to the design of customized microfluidic systems using a microfluidic computer aided design system. In one embodiment...
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7523384 |
Method and device for monitoring and fault detection in industrial processes
A method for monitoring of and fault detection in an industrial process, comprising at least a first sub-process and at least one second sub-process arranged in a process chain, comprising, for the...
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7519524 |
Program product for providing a configuration specification language supporting incompletely specified configuration entities
In a hardware definition language (HDL) file among one or more files, one or more design entities containing a functional portion of a digital system are specified. The one or more design entities...
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7512911 |
Method for creating a parameterized cell library dual-layered rule system for rapid technology migration
A parameterized cell library including variable names corresponding to characteristics of components on an integrated circuit design may reference variable values stored in a first rule layer via...
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7512531 |
Method and apparatus for specifying reactive systems
A method for specifying reactive systems using Dynamic State Machines (DSMs) is disclosed. The method extends statecharts in three areas. One is the integration of a group of related finite state...
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7509599 |
Method and apparatus for performing formal verification using data-flow graphs
An equivalency testing system, for formally comparing an RTLM and HLM, is presented. RTLM and HLM are first converted into DFGs RTLM DFG and HLM DFG . RTLM DFG and HLM DFG are then put into...
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7506286 |
Method and system for debugging an electronic system
Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging...
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7506284 |
Event driven switch level simulation method and simulator
A method for simulating an integrated circuit includes performing a power supply voltage tuning operation to find a power supply voltage at which a simulation of the integrated circuit at an...
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7502728 |
Code coverage testing in hardware emulation
Code coverage questions are addressed by a code coverage method that instruments an electronic module source design file with coverage probes and gives hierarchical names to the probes, then...
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7500210 |
Chip area optimization for multithreaded designs
A method for circuit design includes performing a timing analysis of a design of a processing stage in an integrated electronic circuit, and specifying a cycle time of the circuit. Responsively to...
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7493580 |
Critical path estimating program, estimating apparatus, estimating method, and integrated circuit designing program
A computer-readable recording medium on which is recorded a program, which is used by a computer for estimating a critical path among a plurality of paths given as paths within an integrated...
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7487484 |
Method, system and storage medium for determining circuit placement
A method for determining placement of circuitry during integrated circuit design. The method includes accessing a net list identifying circuitry connections. A plurality of individual net weights...
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7487480 |
Method for estimating aggregate leakage of transistors
A method of estimating a leakage for a plurality of transistors in an integrated circuit that accounts for narrow channel effects includes determining an expected total leaking transistor width for...
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7487477 |
Parametric-based semiconductor design
A parametric-based design methodology interlocks the design of library elements used in a semiconductor product design with the testing protocol used for the resulting semiconductor products such...
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7484195 |
Method to improve time domain sensitivity analysis performance
A method for performing sensitivity analysis on a circuit design is provided. The method initiates with identifying a partition of the circuit design. The method includes determining whether the...
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7483825 |
Method for the creation of a hybrid cycle simulation model
Disclosed is a method for constructing a Hybrid Cycle Simulation model comprising Compiled Data Units (CDUs) for use in design verification. The simulation model may contain a plurality of 1-cycle...
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7480882 |
Measuring and predicting VLSI chip reliability and failure
This embodiment replaces the use of LBIST to get a pass or no-pass result. A selective signature feature is used to collect the top failing paths, by shmooing the chip over a cycle time. These...
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7480879 |
Substrate noise tool
System and method for analyzing substrate noise is disclosed, which is capable of accepting inputs of increasing complexity and granularity. During the early phases, the tool can accept coarse...
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7480609 |
Applying distributed simulation techniques to hardware emulation
A system for applying distributed software simulation techniques to hardware emulation may include a first hardware emulator mounted on a first expansion board at a first host, and a second...
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7480608 |
Method and system for reducing storage requirements of simulation data via KEYWORD restrictions
Disclosed herein is a method of managing data results of simulation processing of a hardware description language (HDL) model based upon keywords. In accordance with the method, a restriction list...
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7478352 |
Method for creating box level groupings of components and connections in a dynamic layout system
A system and method for automatically generating a dynamic layout of a top-level canvas with an internal box layout structure providing a storage element, and a processing element capable of...
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7478028 |
Method for automatically searching for functional defects in a description of a circuit
A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional...
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7478027 |
Systems, methods, and media for simulation of integrated hardware and software designs
Systems, methods and media for simulation of integrated hardware and software designs are disclosed. More particularly, hardware and/or software for synchronizing cycle timers of an integrated...
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7472055 |
Method and system for deterministic control of an emulation
An emulation-based event-wait simulator including an application module to configure and command verification processes on a design under test (DUT). An event dispatcher is in communication with...
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7467365 |
Sanity checker for integrated circuits
This invention discloses a method for sanity checking integrated circuit (IC) designs based on one or more predefined sub-circuits with at least one predefined checking criteria, the method...
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7464018 |
Stalling CPU pipeline to prevent corruption in trace while maintaining coherency with asynchronous events
A method of preventing trace data first-in-first-out buffer overflow in a pipelined data processor stops new instructions when a trace data first-in-first-out buffer is in danger of overflowing....
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7454727 |
Method and Apparatus for Solving Sequential Constraints
Relates to automatic conversion of assumption constraints, used in circuit design verification, that model an environment for testing a DUT/DUV, where the assumptions specify sequential behavior....
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7454325 |
Method, system and program product for defining and recording threshold-qualified count events of a simulation by testcases
According to one method of simulation processing, a count event counter for a count event is created within instrumentation of a hardware description language (HDL) simulation model of a design and...
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7451426 |
Application specific configurable logic IP
An application specific configurable logic IP module includes (1) a system level configuration controller; (2) at least one standardized interconnect communicatively coupled to the system level...
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7448008 |
Method, system, and program product for automated verification of gating logic using formal verification
Automated verification methodology parsing scripts auto generate testbench hardware design language, such as VHDL or Verilog, from the design source VHDL or Verilog. A formal verification model is...
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