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8700377 Accelerated analog and/or RF simulation  
A method and system for performing analog and RF simulation is disclosed that balances the need for accuracy with the desire for increased simulation speed by using two different circuit...
8700378 Symbolic expression propagation to support generating reconfiguration code  
A graphical model is received and includes a plurality of entities and connectivity information between the entities. The entities include properties, behavioral descriptions, and optionally...
8701066 Extracting capacitance and resistance from FinFET devices  
Some embodiments of the invention provide a method for verifying an integrated circuit (IC) design. The method receives a process description file that specifies a process technology for building...
8694302 Solving a hierarchical circuit network using a Barycenter compact model  
Any primitive cells or blocks can be represented physically by a Barycenter compact model (or Barycenter model), and any black box model can also be physically represented by a Barycenter compact...
8694950 Methods, systems, and articles of manufacture for implementing electronic circuit designs with electrical awareness  
Disclosed are a method, system, and computer program product for implementing electronic circuit designs with electrical awareness. The method or the system updates the schematic level tool(s) and...
8689220 Job scheduling to balance energy consumption and schedule performance  
A computer program product including computer usable program code embodied on a computer usable medium, the computer program product comprising: computer usable program code for identifying job...
8688429 System for comparing real-time data and modeling engine data to predict arc flash events  
A system for making real-time predictions about an arc flash event on an electrical system is disclosed. The system includes a data acquisition component, an analytics server and a client terminal....
8689018 Apparatus, method, and system for predictive power delivery noise reduction  
An apparatus and method is described herein for reducing noise in a power distribution network for an interface. The power distribution network is characterized. And based on that characterization,...
8682631 Specifications-driven platform for analog, mixed-signal, and radio frequency verification  
A design specifications-driven platform (100) for analog, mixed-signal and radio frequency verification with one embodiment comprising a client (160) and server (150) is presented. The server...
8682466 Automatic virtual metrology for semiconductor wafer result prediction  
A method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method...
8682634 Analyzing a patterning process using a model of yield  
Techniques are presented that include accessing results of forward simulations of circuit yield, the results including at least circuit yield results including simulated device shapes. Using the...
8682625 Methods, systems, and computer-readable media for improving accuracy of network parameter in electromagnetic simulation and modeling  
Method, system, and computer readable medium are disclosed for analyzing electrical properties of a circuit. The method may comprise: providing a network model including at least one network...
8683400 System and method for fault sensitivity analysis of mixed-signal integrated circuit designs  
A apparatus and method for conducting fault sensitivity analysis of the analog portions of a mixed signal circuit design includes simulating the fault free circuit design, inserting a fault into...
8682637 System, method and computer program product for comparing results of performing a plurality of operations with results of simulating the plurality of operations  
In accordance with embodiments, there are provided mechanisms and methods for comparing results of performing a plurality of operations with results of simulating the plurality of operations. These...
8676559 System and method for providing efficient schematic review  
A system and method for providing schematic reviews is provided. The method includes providing a schematic design, selecting a signal, where the signal is a graphical representation, previewing the...
8670969 Circuit simulation system with repetitive algorithmic choices that provides extremely high resolution on clocked and sampled circuits  
A method for eliminating the Fourier analysis noise floor generated by a circuit simulator is disclosed. This is accomplished by making the simulator behavior during each Fourier analysis sample...
8671372 Verification support computer product, apparatus, and method  
A verification support program that causes a computer to execute identifying from a finite state machine model related to a circuit-under-test, an input count of transitions to a transition-end...
8670970 Characterizing performance of an electronic system  
In one embodiment of the present invention, the performance of an electronic circuit having a clock path between a clock source cell and a clock leaf cell is characterized over a simulation...
8666723 System and methods for generating and managing a virtual device  
Certain embodiments of the present invention are configured to permit development and validation of a device driver or a device application program by using improved virtual devices. Such improved...
8666722 Efficient data compression for vector-based static timing analysis  
In a STA method, after accessing data sets regarding the IC, vectors of the data sets for STA can be generated. Each vector can include a base value and a plurality of tokens, wherein each token is...
8666689 Phase noise analysis of oscillator circuit designs  
In one embodiment of the invention, a method and a system for phase noise analysis of oscillators is provided using frequency aware perturbation projection vector techniques. The method and system...
8661398 Analysis of stress impact on transistor performance  
Roughly described, a method for approximating stress-induced mobility enhancement in a channel region in an integrated circuit layout, including approximating the stress at each of a plurality of...
8660832 Method for configuring a test arrangement, test method and test arrangement  
The invention relates to a method for configuring a test arrangement for a device to be tested, which is one component of a system containing, several components. The components of the system are...
8661387 Placing transistors in proximity to through-silicon vias  
Roughly described, the invention involves ways to characterize, take account of, or take advantage of stresses introduced by TSV's near transistors. The physical relationship between the TSV and...
8661402 Method and apparatus for AMS simulation of integrated circuit design  
A method to create an integrated circuit that includes digital and analog components comprising: displaying on a computer system display, user input to the computer system that specifies parameter...
8655634 Modeling loading effects of a transistor network  
A system, method and program product for modeling load effects of a load CCC (channel connected component) in a transistor network. A system is disclosed that includes an analysis system that...
8655635 Creating and controlling a model of a sensor device for a computer simulation  
Various embodiments of a system and method for creating and controlling a model of a sensor device for a computer simulation are disclosed. Sensor information specifying physical properties of the...
8656339 Method for analyzing sensitivity and failure probability of a circuit  
A method, implemented in a processor, of determining a likelihood of failure of a circuit to be made in accordance with a circuit design, and a computer-readable storage medium storing instructions...
8650512 Elastic modulus mapping of an integrated circuit chip in a chip/device package  
Computer-implemented methods are disclosed for providing an elastic modulus map of an integrated circuit (IC) chip of a chip/device package, for identifying a probable failure site of the...
8650019 Linking untimed data-path and timed control-path models  
Approaches for creating a timed hybrid simulation model for a circuit design specification. An untimed, high-level language (HLL) data-path model is input, along with an HLL data-path interface...
8650522 Determining mutual inductance between intentional inductors  
Various methods for analyzing mutual inductance in an integrated circuit layout are disclosed. In one exemplary embodiment, for example, circuit design information indicative of a first inductor...
8645886 Integrated circuit power management verification method  
A method for verifying power management of an integrated circuit design includes estimating a current load requirement of clocked modules in the circuit design based on the clock frequency and a...
8642287 Cell-impedance sensors  
Methods and apparatus for designing and measuring a cell-electrode impedance sensor to detect chemical and biological samples, including biological cells. The method of designing a cell-electrode...
8645116 Hybrid simulation system and method  
A hybrid simulation model includes a real model, a bus interface and an acceleration model. The real model simulates a group of instructions. The acceleration model includes a trace generation...
8645883 Integrated circuit simulation using fundamental and derivative circuit runs  
A system that simulates an integrated circuit is formed of a plurality of devices. The system initially performs a fundamental circuit simulation run using original parameters for the plurality of...
8638792 Packet switch based logic replication  
A method and system for compiling a representation of a source circuit including one or more source subchannels associated with portions of source logic driven by a plurality of clock domains are...
8639488 Ultrasonic modelling  
A method of producing a temperature model of a surface of an object using ultrasonic transducers comprises the steps of iteratively adjusting a temperature model by using measured travel times of...
8640069 Noise analysis model and noise analysis method including disposing resistors and setting points in a semiconductor  
Provided is a noise analysis model and a noise analysis method that can analyze effects of substrate noise on each of elements included in a circuit to be analyzed. The noise analysis model...
8639487 Method for multiple processor system-on-a-chip hardware and software cogeneration  
An automated system-on-chip (SOC) hardware and software cogeneration design flow allows an SOC designer, using a single source description for any platform-independent combination of reused or new...
8630835 Simulation device, simulation method, and recording medium storing program  
Provided are a device model, a recording medium storing a program, a simulation circuit, device, and method that calculate a local temperature increase in an element. The device model according to...
8626480 Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors  
A system, method and computer program product for implementing a quiescent current leakage specific model into semiconductor device design and circuit design flows. The leakage model covers all...
8626481 Signal tagging during simulation  
Approaches for simulating a circuit design. A block diagram of the circuit design is displayed. Each block has at least one input and at least one output, and at least one of the input or output of...
8627243 Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing  
Methods for optimizing conductor patterns for conductors formed by ECP and CMP processes. A method includes receiving layout data for an IC design where electrochemical plating (ECP) processes form...
8626474 Simulation tool for high-speed communications links  
A link simulation tool for simulating high-speed communications link systems is provided. Communications links may include link subsystems such as transmit (TX) circuitry, receive (TX) circuitry,...
8626482 Equivalent circuit simulation system and method  
A simulation system for producing equivalent circuits reads data corresponding to a tabular W element format in a storage device, and adds data of the tabular W element format file using...
8620638 Method of performing a simulation of a design under test and a circuit for enabling testing of a circuit design  
A method of performing a simulation of a design under test is disclosed. The method comprises implementing an input block having an adjustable output width; coupling test data to the input block;...
8620612 Equivalent circuit of inductance element, method of analyzing circuit constant, circuit constant analysis program, device for analyzing circuit constant, circuit simulator  
A circuit constant analysis method for an equivalent circuit of an inductance element includes determining values of various elements constituting the equivalent circuit from measured values of...
8615724 Circuit assembly yield prediction with respect to form factor  
Embodiments of the invention include systems and methods for automatically predicting production yield for a circuit assembly according to attributes of its components and defect data mapped...
8615728 Analysis of stress impact on transistor performance  
Roughly described, a method for approximating stress-induced mobility enhancement in a channel region in an integrated circuit layout, including approximating the stress at each of a plurality of...
8612199 Netlist partitioning for characterizing effect of within-die variations  
Techniques are presented for determining effects of process variations on the leakage of an integrated circuit having multiple devices. The operation of the circuit is simulated using a first set...