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8788986 System and method for capacity planning for systems with multithreaded multicore multiprocessor resources  
A method for expressing a hierarchy of scalabilities in complex systems, including a discrete event simulation and an analytic model, for analysis and prediction of the performance of multi-chip,...
8788255 Delay analysis processing of semiconductor integrated circuit  
A delay analysis device composed of a storage device and a data processing device analyzes a chip fabricating a semiconductor integrated circuit. Delay calculation is performed via an RC simulation...
8776003 System and method for employing side transition times from signoff-quality timing analysis information to reduce leakage power in an electronic circuit and an electronic design automation tool incorporating the same  
The disclosure provides leakage power recovery that considers side transition times of multi-input cells. In one embodiment, a leakage power recovery system is disclosed that includes: (1) a power...
8775147 Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components  
An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for...
8775149 Method and system for implementing parallel execution in a computing system and in a circuit simulator  
A method and mechanism for implementing a general purpose scripting language that supports parallel execution is described. In one approach, parallel execution is provided in a seamless and...
8768677 Coupled analysis simulation apparatus and coupled analysis simulation method  
A coupled analysis simulation apparatus includes a coupled analysis processing unit configured to perform coupled analysis by performing electromagnetic field analysis and circuit analysis in...
8769359 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test  
A method for providing ordered capture clocks to detect or locate faults within N clock domains and faults crossing any two clock domains in an integrated circuit or circuit assembly in scan-test...
8768679 System and method for efficient modeling of NPskew effects on static timing tests  
A computer-implemented method that simulates NPskew effects on a combination NFET (Negative Field Effect Transistor)/PFET (Positive Field Effect Transistor) semiconductor device using slew...
8768678 Scheduling processes in simulation of a circuit design based on simulation costs and runtime states of HDL processes  
One or more embodiments provide a load balancing solution for improving the runtime performance of parallel HDL simulators. During compilation each process is analyzed to determine a simulation...
8769448 Circuit design simulation  
In one embodiment, a method is provided for processing a circuit design having first and second sets of ports configured to couple to respective first and second sets of ports of a device on a...
8769452 Parasitic extraction in an integrated circuit with multi-patterning requirements  
Systems and methods are provided for extracting parasitics in a design of an integrated circuit with multi-patterning requirements. The method includes determining resistance solutions and...
8762122 Methods for synchronized transient-envelope and event-driven simulation of electronic circuits  
In one embodiment of the invention, a method of simulating a circuit is disclosed including simulating an analog component of the circuit over a first simulation time period with a first envelope...
8762123 Method and system for implementing circuit simulators  
A system and method for performing circuit simulation is described. The present approach provides methods and systems that create reusable and independent measurements for use with circuit...
8762904 Optimizing logic synthesis for environmental insensitivity  
Roughly described, a method for synthesizing a circuit design from a logic design includes developing candidate solutions for a particular signal path, a first candidate solution identifying a...
8754891 Method for image processing and an apparatus thereof  
An image processing method includes the following steps. An input data including a number of original data are received. The original data are converted into a number of converted emulation voltage...
8751210 Suspending procedures in simulation of a circuit design  
When a wait statement is encountered in an HDL simulation, the simulation kernel executes functions corresponding to other processes while waiting for the wait to mature. However, the preservation...
8751211 Simulation using parallel processors  
A method for design simulation includes partitioning a verification task of a design into a first plurality of atomic Processing Elements (PEs) having execution dependencies, each execution...
8744830 Systems and methods for electrical fault restoration  
Certain embodiments of the invention may include systems and methods for providing electrical fault restoration. According to an example embodiment of the invention, a method can include sectioning...
8745559 Systems and methods for creating frequency-dependent netlist  
A method includes creating a technology file including data for an integrated circuit including at least one die including at least one metal layer to be formed using at least one of a single...
8744831 Simulation apparatus, simulation method and recording medium for recording simulation program  
According to one embodiment, a simulation apparatus includes a hardware model execution unit that executes a hardware model, a software model execution unit that executes a software model, a...
8745571 Analysis of compensated layout shapes  
The disclosure relates to the analysis of compensated layout shapes. A method in accordance with an embodiment includes: analyzing a semiconductor layout using a bucket structure, the layout...
8738347 Method for extracting IBIS simulation model  
A method for extracting an accurate IBIS simulation model of a semiconductor device including a plurality of semiconductor chips comprises: extracting an AC characteristics model of a first output...
8738335 Solving a circuit network in hierarchical, multicore, and distributed computing environment  
Any primitive cells or blocks can be represented physically by a Barycenter compact model, and any black box model can also be physically represented by a Barycenter compact model physically. A...
8739086 Compiler for closed-loop 1×N VLSI design  
Embodiments that design integrated circuits using a 1×N compiler in a closed-loop 1×N methodology are disclosed. Some embodiments create a physical design representation based on a behavioral r...
8738350 Mixed concurrent and serial logic simulation of hardware designs  
A method of simulating a design described in HDL is provided. In this method, modules of the design can be partitioned into first modules for simulation by a serial simulation engine and second...
8738348 Method and system for implementing parallel execution in a computing system and in a circuit simulator  
A method and mechanism for implementing a general purpose scripting language that supports parallel execution is described. In one approach, parallel execution is provided in a seamless and...
8731893 Circuit simulation of MOSFETs  
An arithmetic device calculates the surface potential of a silicon layer by performing computation based on a mathematical expression and device parameters stored in a storage device. Likewise, the...
8731737 Microcontroller having a computing unit and a logic circuit, and method for carrying out computations by a microcontroller for a regulation or a control in a vehicle  
A microcontroller having a computing unit and a logic circuit. The microcontroller carries out computations for a regulation or control in a vehicle. The computing unit is connected to the logic...
8732649 Backward analysis for determining fault masking factors  
A method and a system for determining the observability of faults in an electronic circuit include a processor that simulates, in a simulation phase, a behavior of the electronic circuit using a...
8731894 Indexing behaviors and recipes of a circuit design  
An executable circuit design is used to generate waveforms, from which behaviors of the circuit are captured. The behaviors and various combinations thereof can then be saved in a database, along...
8726210 Optimizing timing critical paths by modulating systemic process variation  
Systems and methods are provided to optimize critical paths by modulating systemic process variations, such as regional timing variations in IC designs. A method includes determining a physical...
8725484 Adaptive redundancy-extraction for 3D electromagnetic simulation of electronic systems  
Redundancy extraction in electromagnetic simulation of an electronic device/system includes discretizing first and second spaced conductive layers of a computer model of an electronic device/system...
8718999 Circuit simulation method and circuit simulation device  
The present invention provides a circuit simulation method of executing a high-precision circuit simulation. A voltage fluctuation analysis step at a gate level is executed (step S2). The voltage...
8718986 Ion implantation distribution generating method and simulator  
A method of generating an ion implantation distribution by a computer is disclosed. The method includes calculating ion implantation distribution regions in a case of generating the ion...
8718987 Circuit simulation model of capacitor, constructing method of simulation model, method of circuit simulation, circuit simulator  
Provided is a circuit simulation model that can suitably represent capacitor characteristics, thereby realizing accurate circuit design and circuit analysis. A SPICE model is constituted of a...
8719000 Shooting Pnoise circuit simulation with full spectrum accuracy  
An apparatus and method for performing periodic noise (Pnoise) simulation with full spectrum accuracy is disclosed herein. Noise contributions of a circuit under consideration are identified and...
8712751 System and method of verification of analog circuits  
In a particular embodiment, a first digital function module is created that represents a first analog circuit and a second digital function module is created that represents a second analog...
8713489 Simulation parameter correction technique  
A parameter correction method includes: obtaining, from a variability-aware simulation, a simulation result value of a predetermined product performance for a reference candidate value set...
8713492 Data processing apparatus including reconfigurable logic circuit  
There is provided a data processing apparatus (1) including a logic circuit (10) that is reconfigurable in each cycle and a library (2) that stores hardware control information (20). The hardware...
8706467 Compact circuit-simulation output  
Embodiments of a computer system for simulating a circuit are described. During a first mode of the simulation, the computer system stores primary signals and circuit relationships between primary...
8706468 Method and program product for validation of circuit models for phase connectivity  
Circuit component connectivity evaluation and validation method provides comparing and validating the correctness of electrical phase connectivity at connection nodes between conducting components...
8707221 Circuit assembly yield prediction with respect to manufacturing process  
Embodiments of the invention include systems and methods for automatically predicting production yield for a circuit assembly according to attributes of its components and defect data mapped...
8706453 Techniques for processor/memory co-exploration at multiple abstraction levels  
Processor/memory co-exploration at multiple abstraction levels. An architecture description language (ADL) description of a processor/memory system is accessed. The ADL description models on one of...
8706837 System and method for managing switch and information handling system SAS protocol communication  
An SAS domain map is automatically generated at an SAS concentrator switch by a virtual mapping device that presents itself as a target for discovery by SAS devices interfaced with the...
8700377 Accelerated analog and/or RF simulation  
A method and system for performing analog and RF simulation is disclosed that balances the need for accuracy with the desire for increased simulation speed by using two different circuit...
8700378 Symbolic expression propagation to support generating reconfiguration code  
A graphical model is received and includes a plurality of entities and connectivity information between the entities. The entities include properties, behavioral descriptions, and optionally...
8701066 Extracting capacitance and resistance from FinFET devices  
Some embodiments of the invention provide a method for verifying an integrated circuit (IC) design. The method receives a process description file that specifies a process technology for building...
8694302 Solving a hierarchical circuit network using a Barycenter compact model  
Any primitive cells or blocks can be represented physically by a Barycenter compact model (or Barycenter model), and any black box model can also be physically represented by a Barycenter compact...
8694950 Methods, systems, and articles of manufacture for implementing electronic circuit designs with electrical awareness  
Disclosed are a method, system, and computer program product for implementing electronic circuit designs with electrical awareness. The method or the system updates the schematic level tool(s) and...
8689220 Job scheduling to balance energy consumption and schedule performance  
A computer program product including computer usable program code embodied on a computer usable medium, the computer program product comprising: computer usable program code for identifying job...