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8874941 Apparatus and method for designing an architecturally homogeneous power-performance heterogeneous multicore processor using simulated annealing optimization  
For multicore power performance management, a first core has a first architecture and is designed for a first voltage-frequency domain. A second core has the first architecture and that is designed...
8868398 Method for predicting arc flash energy and PPE category within a real-time monitoring system  
A method for simulating an arc flash event on an electrical power system is disclosed. The virtual system model of the electrical system is modified to introduce a short circuiting feature. The...
8868396 Verification and debugging using heterogeneous simulation models  
A method and apparatus for verifying and debugging a circuit design module of a high level programming system is disclosed herein. A circuit design created in a high level programming environment...
8869158 Job scheduling to balance energy consumption and schedule performance  
An energy-aware backfill scheduling method combines overestimation of job run-times and processor adjustments, such as dynamic voltage and frequency scaling, to balance overall schedule performance...
8869081 Automating integrated circuit device library generation in model based metrology  
Various embodiments include computer-implemented methods, computer program products and systems for generating an integrated circuit (IC) library for use in a scatterometry analysis. In some cases,...
8868395 Fast simulation method for integrated circuits with power management circuitry  
In a fast simulation technique, the output node of a power supply module of the integrated circuit can be designated as an ideal power node. At this point, the power supply module can be designated...
8863057 Method for selectively modeling narrow-width stacked device performance  
An approach for methodology enabling a verification of IC designs that compensates for degraded performance due to a physical placement, particularly a stacked physical placement is disclosed. A...
8862453 Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli  
Methods for generating waveforms with realistic transitions, controllable timing jitter, and controllable amplitude noise in a computer-based simulation environment are disclosed. A first method...
8862251 Controller for machine tool and machining-related data processing system provided therewith  
A machining-related data processing system has a configuration in which a controller for machine tool comprising an NC device and an assisting device is connected to a data processing device via a...
8855993 Integrated circuit design simulation matrix interpolation  
Methods and systems perform a simulation on an integrated circuit design by applying a first value to a first variable and a second value to a second variable of the simulation to produce a first...
8849630 Techniques to predict three-dimensional thermal distributions in real-time  
Techniques for monitoring and predicting environmental operating conditions in a data center are provided. In one aspect, a method for real-time, three-dimensional analysis of environmental...
8849644 Parallel simulation using an ordered priority of event regions  
In one embodiment, a plurality of kernels are provided. Each kernel may simulate a partition of a design under test. A plurality of event regions are provided. The regions may be in an ordered...
8849642 Signal definitions or descriptions in graphical modeling environments  
Methods, system and computer program products are disclosed for providing a graphical modeling environment in which a graphical model is generated and executed. In the graphical modeling...
8849643 Table-lookup-based models for yield analysis acceleration  
In one embodiment, the invention is a method and apparatus for table-lookup-based models for yield analysis acceleration. One embodiment of a method for statistically evaluating a design of an...
8850382 Analysis apparatus and method to analyze a printed circuit board  
An analysis apparatus for a printed circuit board. The analysis apparatus includes a processor that executes a process of rewriting physical property data of a wiring layer of a printed circuit...
8838430 Detection of memory access violation in simulations  
An apparatus and method for detecting memory access violations in simulations is disclosed herein. A detection tool is designed to automatically perform a violation check for each memory read or...
8839165 Power/performance optimization through continuously variable temperature-based voltage control  
Methods determine temperature and voltage relationships for integrated circuit library elements to produce a continuous temperature-voltage function. Some of the library elements can be used or...
8831925 Indexing behaviors and recipes of a circuit design  
An executable circuit design is used to generate waveforms, from which behaviors of the circuit are captured. The behaviors and various combinations thereof can then be saved in a database, along...
8832619 Analytical model for predicting current mismatch in metal oxide semiconductor arrays  
A system and method for designing integrated circuits and predicting current mismatch in a metal oxide semiconductor (MOS) array. A first subset of cells in the MOS array is selected and current...
8832611 Process aware metrology  
Systems and methods for process aware metrology are provided. One method includes selecting nominal values and one or more different values of process parameters for one or more process steps used...
8831926 Verification of cyber-physical systems using optimization algorithms  
A computer-implemented method for verifying a model in a product lifecycle management (PLM) system includes defining a model and an envelope of allowable model states and, based on one or more...
8832636 Verification support computer product, apparatus, and method  
A non-transitory, computer-readable recording medium stores therein a verification support program that causes a computer to execute identifying from a finite state machine model related to a...
8826217 Modeling gate size range by using a penalty function in a numerical gate sizing framework  
Systems and techniques are described for optimizing a circuit design by using a numerical solver. The gates sizes are optimized by modeling a set of gate optimization problems and solving the set...
8826208 Computational thermal analysis during microchip design  
Some embodiments include a method for identifying high-temperature regions in a microchip. In some embodiments, the method includes selecting grids on the microchip, wherein each grid includes...
8825464 Method and apparatus for parallelization of sequential power simulation  
One particular implementation takes the form of an apparatus or method for parallelizing a sequential power simulation of an integrated circuit device. The implementation may temporally divide the...
8826219 Method and apparatus used for the physical validation of integrated circuits  
Disclosed herein are methods and devices used for the physical design validation of integrated circuits. One method used for the physical design validation of integrated circuits includes comparing...
8818784 Hardware description language (HDL) incorporating statistically derived data and related methods  
A method of designing a circuit can include modeling one or more circuits in a hardware design language (HDL) (102) and confirming a basic behavior of such models (104). If a basic behavior has...
8818785 Method and apparatus for simulating gate capacitance of a tucked transistor device  
A method for simulating a tucked transistor device having a diffusion region defined in a semiconductor layer, a gate electrode adjacent a first side of the diffusion region, a floating gate...
8818786 Network tearing for circuit simulation  
A circuit is simulated by using system or network tearing to obtain a real solution. The circuit may be an entire integrated circuit, portion of an integrated circuit, or a circuit block. A circuit...
8812287 Autonomous, scalable, digital system for emulation of wired-or hardware connection  
A method and device for preserving the wired-OR nature of the clock signal connection between two devices without a direct analog connection between the lines and in an infinitely scalable fashion....
8812286 Emulation of power shutoff behavior for integrated circuits  
A method for modeling power management in an integrated circuit (IC) includes: specifying a circuit design and a power architecture for the IC, the power architecture including a plurality of power...
8812285 Designing digital processors using a flexibility metric  
Techniques, structures, and systems are disclosed for implementing an efficient design of computer hardware using a top-to-bottom approach. In one aspect, a method for designing a processor...
8811713 Photomask inspection method, semiconductor device inspection method, and pattern inspection apparatus  
A plurality of photomasks used to manufacture the same semiconductor device, each of the photomasks having a plurality of mutually replaceable unit regions set therein, are inspected to detect a...
8812289 Simulation that transfers port values of a design block via a configuration block of a programmable device  
Approaches for simulating an electronic system. In one approach, a software co-simulation platform is configured to produce a first time sequence of values of a plurality of input ports of a design...
8806396 Method and system performing circuit design predictions  
Disclosed is a method, system, and computer program product for performing predictions for an electronic design. Embodiments of the invention allow the ability to efficiently update the model...
8806415 Integrated circuit pad modeling  
A method of modeling an integrated circuit chip includes generating a model of a bond pad using a design tool running on a computer device. The method also includes connecting a first inductor, a...
8805665 Input parameter value set identifying apparatus and method  
For each input variable value set, an indicator value associated with dispersion of actually measured output variable values is calculated from data including, for each input variable value set,...
8806412 Statistical optimization in place-and-route  
Place-and-route (P&R) includes maintaining a set of local arrival time information and local required time information associated with a circuit layout; determining a candidate fix on a critical...
8805664 System and method for simulating branching behavior  
In an embodiment, a method of establishing directed relationships between states in a simulation is disclosed. The directed relationships may allow the simulation to proceed from an initial state...
8798981 Circuit simulation using step response analysis in the frequency domain  
A method for simulating a response of a circuit to an ESD input stimulus applied to the circuit includes the steps of: receiving a description of the circuit into a circuit simulation program, the...
8799850 Simulation-based design state snapshotting in electronic design automation  
Some embodiments provide a system that performs a simulation within an electronic design automation (EDA) application. During operation, the system obtains a design from a user of the EDA...
8798968 Computing device and method for enforcing passivity of scattering parameter equivalent circuit  
A computing device and a method for scattering parameter equivalent circuit reads a scattering parameter file from a storage device. A non-common-pole rational function of the scattering parameters...
8793642 Component selection for circuit assembly  
A method for assembling an electrical circuit includes measuring actual values of components of a given type that are held in a stock, and storing the measured actual values in a computerized...
8793638 Method of optimizing design for manufacturing (DFM)  
The present disclosure describes a method of optimizing a design for manufacture (DFM) simulation. The method includes receiving an integrated circuit (IC) design data having a feature, receiving a...
8788986 System and method for capacity planning for systems with multithreaded multicore multiprocessor resources  
A method for expressing a hierarchy of scalabilities in complex systems, including a discrete event simulation and an analytic model, for analysis and prediction of the performance of multi-chip,...
8788255 Delay analysis processing of semiconductor integrated circuit  
A delay analysis device composed of a storage device and a data processing device analyzes a chip fabricating a semiconductor integrated circuit. Delay calculation is performed via an RC simulation...
8776003 System and method for employing side transition times from signoff-quality timing analysis information to reduce leakage power in an electronic circuit and an electronic design automation tool incorporating the same  
The disclosure provides leakage power recovery that considers side transition times of multi-input cells. In one embodiment, a leakage power recovery system is disclosed that includes: (1) a power...
8775147 Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components  
An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for...
8775149 Method and system for implementing parallel execution in a computing system and in a circuit simulator  
A method and mechanism for implementing a general purpose scripting language that supports parallel execution is described. In one approach, parallel execution is provided in a seamless and...
8768677 Coupled analysis simulation apparatus and coupled analysis simulation method  
A coupled analysis simulation apparatus includes a coupled analysis processing unit configured to perform coupled analysis by performing electromagnetic field analysis and circuit analysis in...