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7620827 |
Methods and apparatus for cooling integrated circuits
A system and method are disclosed which may include measuring a leakage current level of a processor or multiprocessor chip; and storing an indicator value indicative of the leakage current level...
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7617468 |
Method for automatic maximization of coverage in constrained stimulus driven simulation
A computer increases coverage in simulation of a design of a circuit by processing goals for coverage differently depending on whether or not the goals are on input signals of the circuit....
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7617467 |
Electrostatic discharge device verification in an integrated circuit
Processor-implemented techniques for verifying ESD device connectivity in an IC include the steps of: receiving an input dataset including layout parameters corresponding to the integrated circuit;...
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7617085 |
Program product supporting specification of signals for simulation result viewing
According to a method of data processing, a data set including at least one entry specifying a signal group by a predetermined signal group name is received by a data processing system. In response...
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7617084 |
Mechanism and method for simultaneous processing and debugging of multiple programming languages
Disclosed is a method, mechanism, and computer usable medium for simultaneous processing or debugging of multiple programming languages. A particularly disclosed approach provides a method and...
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7613950 |
Detecting floating point hardware failures
A method for testing floating point hardware in a processor while executing a computer program is disclosed. The method includes executing a first set of code of the computer program without...
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7613599 |
Method and system for virtual prototyping
An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are...
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7606695 |
Self-checking simulations using dynamic data loading
A system for evaluating a simulation includes a reference simulator configured to execute a simulation image to obtain golden data, a test simulator configured to execute the simulation image to...
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7606694 |
Framework for cycle accurate simulation
A system for performing cycle accurate simulation of a circuit design can include a plurality of cycle accurate models, wherein each cycle accurate model is a software object representation of a...
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7606693 |
Circuit simulation with decoupled self-heating analysis
A solution of a first set of equations of the time-varying electrical response of a circuit is determined between pairs of adjacent time points t i and t i+1 based on predicted electrical...
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7606692 |
Gate-level netlist reduction for simulating target modules of a design
A method for analyzing a circuit design in preparation for a simulation. The method generally includes the steps of (A) marking each of a plurality of modules between a target module of the modules...
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7606165 |
What-if analysis for network diagnostics
A network troubleshooting framework is described. In an implementation, a method includes generating a first estimation of network performance by a simulator based on network settings obtained from...
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7603646 |
Method and apparatus for power optimization using don't care conditions of configuration bits in lookup tables
Various approaches for generating an implementation of an electronic circuit design are disclosed. In one approach, one or more configuration bits that have don't care conditions are identified for...
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7603639 |
Method, apparatus and computer program product for controlling jitter or the effects of jitter in integrated circuitry
Designing integrated circuitry (“IC”) includes simulating noise of modeled IC operation and applying the noise to buffers of a clock tree of the modeled IC, responsively generating a first...
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7600169 |
Systems and methods of test case generation with feedback
Systems and methods for implementing test case generation with feedback are disclosed. An exemplary system for test case generation with feedback comprises a plurality of knobs identifying test...
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7599826 |
System and method for generating various simulation conditions for simulation analysis
A system for generating various simulation conditions for simulation analysis is disclosed. The system includes: a signal generating module ( 301 ) for generating an N-bit binary sequence...
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7599821 |
Mixed language simulation cycle for analog mixed-signal circuit design and simulation
A method of simulating an analog mixed-signal circuit design using mixed-language descriptions includes initializing a mixed language simulation cycle, processing digital events during delta cycles...
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7596775 |
Method for determining a standard cell for IC design
IC design flow includes RTL design, synthesis, APR, and layout. An IC designer can choose a suitable standard cell for an integrated circuit according to the timing, area, and BCI (best cell index)...
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7596772 |
Methodology and system for setup/hold time characterization of analog IP
A fast methodology and system to characterize setup/hold time for analog IPs are provided. Partial circuits of clock and data paths are simulated instead of the simulation of entire IPs. The...
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7596483 |
Determining timing of integrated circuits
The present invention is directed to determining the timing for a synchronous integrated circuit, the circuit including a multiplicity of clocked elements interconnected by signal paths....
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7596482 |
System and method to analyze and determine ampacity risks on PCB interconnections
Determining ampacity risks in a circuit comprises receiving geometry data of the circuit, initializing boundary conditions, initializing circuit geometry assumptions, modeling the circuit geometry...
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7594208 |
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage
Techniques for optimizing the placement and synthesis of a circuit design on a programmable integrated circuit are provided. The performance of a circuit design is analyzed after it has been...
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7594206 |
Fault detecting method and layout method for semiconductor integrated circuit
The present invention provides a fault detecting method and a layout method for a semiconductor integrated circuit. The fault detecting method performs detection for faults in a semiconductor...
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7590518 |
Circuit analysis utilizing rank revealing factorization
Method of forming a reduced model of a circuit. A circuit parameter is selected, and a plurality of values for the parameter are selected. A circuit or operator equation is solved for the selected...
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7587688 |
User-directed timing-driven synthesis
Users or applications provide optimization information that specifies performance-critical portions of the design. Users can identify performance-critical portions of their designs from a priori...
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7584450 |
Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout
One embodiment provides a system for using a database to quickly identify a manufacturing problem area in a layout. During operation, the system receives a first check-figure which identifies a...
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7581199 |
Use of state nodes for efficient simulation of large digital circuits at the transistor level
An integrated circuit design simulation method is provided that takes advantage of the fact that, when an instance of a circuit module has been simulated under a given set of input conditions, and...
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7580824 |
Apparatus and methods for modeling power characteristics of electronic circuitry
Apparatus and methods for calculating power consumption of circuitry within integrated circuits (ICs), such as programmable logic devices (PLDs) are disclosed and described. A method of estimating...
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7580823 |
Generation and use of integrated circuit profile-based simulation information
The invention includes a method and a system for generating integrated circuit (IC) simulation information regarding the effect of design and fabrication process decisions. One embodiment includes...
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7577932 |
Gate modeling for semiconductor fabrication process effects
In one embodiment, a method for determining a contour simplification of an object for a simulation is provided. An object in a layout of a transistor design to be created with the photolithographic...
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7577557 |
Simulator and simulation method for behaviors of processors
A simulator operable to simulate behaviors of a processor using software is provided. The simulator includes a command input unit, a memory element, a register element, a control element, a...
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7574344 |
Static timing based IR drop analysis
A method for determining a maximum IR drop on a power grid of a circuit is disclosed. The method includes dividing a reference timing signal into multiple bins. Each one of the bins having a...
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7571412 |
Method and system for semiconductor device characterization pattern generation and analysis
A method for generating automatic design characterization patterns for integrated circuits (IC) is provided. The method includes selecting a routing scheme from a file containing the device...
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7571404 |
Fast on-chip decoupling capacitance budgeting method and device for reduced power supply noise
A semiconductor power network decoupling capacitance (decap) budgeting problem is formulated to minimize the total decap to be added to the network subject to voltage constraints on the network...
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7571400 |
Chip design verifying and chip testing apparatus and method
A chip design verifying and chip testing apparatus includes a storing means for storing an application program verifying an operation of a designed chip and testing a manufactured chip having a...
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7571087 |
Computer storage exception handling apparatus and method for virtual hardware system
In a design system using virtual hardware models, a filtering manager for filtering execution results and determining which software instructions are candidates for restructuring. In some examples,...
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7571086 |
Incremental circuit re-simulation system
A netlist description of a circuit is processed to classify some signals of the circuit as essential signals and to classify all other signals of the circuit as non-essential signals. Thereafter...
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7571082 |
Common component modeling
A method and apparatus for producing predictive performance and capacity information employing a type of factory to reduce the ongoing cost of providing simulation models to answer questions raised...
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7568178 |
System simulation and graphical data flow programming in a common environment using wire data flow
Various embodiments of systems and methods are described in which system simulation techniques are combined with graphical programming techniques in a common environment. For example, various...
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7567892 |
Method and system for realizing a logic model design
Techniques directed to realizing and verifying a logic model design are provided by first dividing the logic model design into two or more logic portions. The various model portions can then...
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7567891 |
Hot-carrier device degradation modeling and extraction methodologies
The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of...
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7567890 |
Conversion of model components into references
An automated model componentization feature systematically converts duplicate or otherwise amenable patterns in a model into references. Multiple references are simplified to one unit that contains...
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7565639 |
Integrated assist features for epitaxial growth bulk tiles with compensation
A method for making a semiconductor device is provided which comprises (a) creating a first data set ( 301 ) which defines a first set of tiles ( 303 ) for a trench chemical mechanical polishing...
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7562322 |
Design verification for a switching network logic using formal techniques
Formal techniques are applied to industrial design problems such as verification of a circuit design. Initial decisions may include defining properties to verify the design. An abstraction of the...
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7562320 |
Asic based conveyor belt style programmable cross-point switch hardware accelerated simulation engine
An ASIC based hardware accelerated simulation engine accelerates logic verification of integrated circuit designs utilizing a field of ASIC chips interconnected by direct connections. Communication...
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7562004 |
Determining better configuration for computerized system
A better configuration for a computerized system is determined by performing a first stage and a second stage. In the first stage, the performance of each system configuration, including candidate...
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7562001 |
Creating a behavioral model of a hardware device for use in a simulation environment
Exemplary methods, apparatuses, and products are described for creating a behavioral model of a hardware device for use in a simulation environment. The behavioral model is created by an iterative...
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7562000 |
Electromagnetic simulator systems and methods
The present invention provides methods and apparatuses for an electromagnetic simulator. The method for circuit simulation comprises the steps of discretizing the circuit element into charge...
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7561999 |
Verification apparatus, verification method, and program
A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an...
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7559045 |
Database-aided circuit design system and method therefor
A database-aided circuit design system and method therefor is provided, which can be utilized to detect problems of the product in an early design stage through the early design stage...
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