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8818784 Hardware description language (HDL) incorporating statistically derived data and related methods  
A method of designing a circuit can include modeling one or more circuits in a hardware design language (HDL) (102) and confirming a basic behavior of such models (104). If a basic behavior has...
8818785 Method and apparatus for simulating gate capacitance of a tucked transistor device  
A method for simulating a tucked transistor device having a diffusion region defined in a semiconductor layer, a gate electrode adjacent a first side of the diffusion region, a floating gate...
8818786 Network tearing for circuit simulation  
A circuit is simulated by using system or network tearing to obtain a real solution. The circuit may be an entire integrated circuit, portion of an integrated circuit, or a circuit block. A circuit...
8812287 Autonomous, scalable, digital system for emulation of wired-or hardware connection  
A method and device for preserving the wired-OR nature of the clock signal connection between two devices without a direct analog connection between the lines and in an infinitely scalable fashion....
8812286 Emulation of power shutoff behavior for integrated circuits  
A method for modeling power management in an integrated circuit (IC) includes: specifying a circuit design and a power architecture for the IC, the power architecture including a plurality of power...
8812285 Designing digital processors using a flexibility metric  
Techniques, structures, and systems are disclosed for implementing an efficient design of computer hardware using a top-to-bottom approach. In one aspect, a method for designing a processor...
8811713 Photomask inspection method, semiconductor device inspection method, and pattern inspection apparatus  
A plurality of photomasks used to manufacture the same semiconductor device, each of the photomasks having a plurality of mutually replaceable unit regions set therein, are inspected to detect a...
8812289 Simulation that transfers port values of a design block via a configuration block of a programmable device  
Approaches for simulating an electronic system. In one approach, a software co-simulation platform is configured to produce a first time sequence of values of a plurality of input ports of a design...
8806396 Method and system performing circuit design predictions  
Disclosed is a method, system, and computer program product for performing predictions for an electronic design. Embodiments of the invention allow the ability to efficiently update the model...
8806415 Integrated circuit pad modeling  
A method of modeling an integrated circuit chip includes generating a model of a bond pad using a design tool running on a computer device. The method also includes connecting a first inductor, a...
8805665 Input parameter value set identifying apparatus and method  
For each input variable value set, an indicator value associated with dispersion of actually measured output variable values is calculated from data including, for each input variable value set,...
8806412 Statistical optimization in place-and-route  
Place-and-route (P&R) includes maintaining a set of local arrival time information and local required time information associated with a circuit layout; determining a candidate fix on a critical...
8805664 System and method for simulating branching behavior  
In an embodiment, a method of establishing directed relationships between states in a simulation is disclosed. The directed relationships may allow the simulation to proceed from an initial state...
8798981 Circuit simulation using step response analysis in the frequency domain  
A method for simulating a response of a circuit to an ESD input stimulus applied to the circuit includes the steps of: receiving a description of the circuit into a circuit simulation program, the...
8799850 Simulation-based design state snapshotting in electronic design automation  
Some embodiments provide a system that performs a simulation within an electronic design automation (EDA) application. During operation, the system obtains a design from a user of the EDA...
8798968 Computing device and method for enforcing passivity of scattering parameter equivalent circuit  
A computing device and a method for scattering parameter equivalent circuit reads a scattering parameter file from a storage device. A non-common-pole rational function of the scattering parameters...
8793642 Component selection for circuit assembly  
A method for assembling an electrical circuit includes measuring actual values of components of a given type that are held in a stock, and storing the measured actual values in a computerized...
8793638 Method of optimizing design for manufacturing (DFM)  
The present disclosure describes a method of optimizing a design for manufacture (DFM) simulation. The method includes receiving an integrated circuit (IC) design data having a feature, receiving a...
8788986 System and method for capacity planning for systems with multithreaded multicore multiprocessor resources  
A method for expressing a hierarchy of scalabilities in complex systems, including a discrete event simulation and an analytic model, for analysis and prediction of the performance of multi-chip,...
8788255 Delay analysis processing of semiconductor integrated circuit  
A delay analysis device composed of a storage device and a data processing device analyzes a chip fabricating a semiconductor integrated circuit. Delay calculation is performed via an RC simulation...
8776003 System and method for employing side transition times from signoff-quality timing analysis information to reduce leakage power in an electronic circuit and an electronic design automation tool incorporating the same  
The disclosure provides leakage power recovery that considers side transition times of multi-input cells. In one embodiment, a leakage power recovery system is disclosed that includes: (1) a power...
8775147 Algorithm and architecture for multi-argument associative operations that minimizes the number of components using a latency of the components  
An algorithm and architecture are disclosed for performing multi-argument associative operations. The algorithm and architecture can be used to schedule operations on multiple facilities for...
8775149 Method and system for implementing parallel execution in a computing system and in a circuit simulator  
A method and mechanism for implementing a general purpose scripting language that supports parallel execution is described. In one approach, parallel execution is provided in a seamless and...
8768677 Coupled analysis simulation apparatus and coupled analysis simulation method  
A coupled analysis simulation apparatus includes a coupled analysis processing unit configured to perform coupled analysis by performing electromagnetic field analysis and circuit analysis in...
8769359 Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test  
A method for providing ordered capture clocks to detect or locate faults within N clock domains and faults crossing any two clock domains in an integrated circuit or circuit assembly in scan-test...
8768679 System and method for efficient modeling of NPskew effects on static timing tests  
A computer-implemented method that simulates NPskew effects on a combination NFET (Negative Field Effect Transistor)/PFET (Positive Field Effect Transistor) semiconductor device using slew...
8768678 Scheduling processes in simulation of a circuit design based on simulation costs and runtime states of HDL processes  
One or more embodiments provide a load balancing solution for improving the runtime performance of parallel HDL simulators. During compilation each process is analyzed to determine a simulation...
8769448 Circuit design simulation  
In one embodiment, a method is provided for processing a circuit design having first and second sets of ports configured to couple to respective first and second sets of ports of a device on a...
8769452 Parasitic extraction in an integrated circuit with multi-patterning requirements  
Systems and methods are provided for extracting parasitics in a design of an integrated circuit with multi-patterning requirements. The method includes determining resistance solutions and...
8762122 Methods for synchronized transient-envelope and event-driven simulation of electronic circuits  
In one embodiment of the invention, a method of simulating a circuit is disclosed including simulating an analog component of the circuit over a first simulation time period with a first envelope...
8762123 Method and system for implementing circuit simulators  
A system and method for performing circuit simulation is described. The present approach provides methods and systems that create reusable and independent measurements for use with circuit...
8762904 Optimizing logic synthesis for environmental insensitivity  
Roughly described, a method for synthesizing a circuit design from a logic design includes developing candidate solutions for a particular signal path, a first candidate solution identifying a...
8754891 Method for image processing and an apparatus thereof  
An image processing method includes the following steps. An input data including a number of original data are received. The original data are converted into a number of converted emulation voltage...
8751210 Suspending procedures in simulation of a circuit design  
When a wait statement is encountered in an HDL simulation, the simulation kernel executes functions corresponding to other processes while waiting for the wait to mature. However, the preservation...
8751211 Simulation using parallel processors  
A method for design simulation includes partitioning a verification task of a design into a first plurality of atomic Processing Elements (PEs) having execution dependencies, each execution...
8744830 Systems and methods for electrical fault restoration  
Certain embodiments of the invention may include systems and methods for providing electrical fault restoration. According to an example embodiment of the invention, a method can include sectioning...
8745559 Systems and methods for creating frequency-dependent netlist  
A method includes creating a technology file including data for an integrated circuit including at least one die including at least one metal layer to be formed using at least one of a single...
8744831 Simulation apparatus, simulation method and recording medium for recording simulation program  
According to one embodiment, a simulation apparatus includes a hardware model execution unit that executes a hardware model, a software model execution unit that executes a software model, a...
8745571 Analysis of compensated layout shapes  
The disclosure relates to the analysis of compensated layout shapes. A method in accordance with an embodiment includes: analyzing a semiconductor layout using a bucket structure, the layout...
8738347 Method for extracting IBIS simulation model  
A method for extracting an accurate IBIS simulation model of a semiconductor device including a plurality of semiconductor chips comprises: extracting an AC characteristics model of a first output...
8738335 Solving a circuit network in hierarchical, multicore, and distributed computing environment  
Any primitive cells or blocks can be represented physically by a Barycenter compact model, and any black box model can also be physically represented by a Barycenter compact model physically. A...
8739086 Compiler for closed-loop 1×N VLSI design  
Embodiments that design integrated circuits using a 1×N compiler in a closed-loop 1×N methodology are disclosed. Some embodiments create a physical design representation based on a behavioral r...
8738350 Mixed concurrent and serial logic simulation of hardware designs  
A method of simulating a design described in HDL is provided. In this method, modules of the design can be partitioned into first modules for simulation by a serial simulation engine and second...
8738348 Method and system for implementing parallel execution in a computing system and in a circuit simulator  
A method and mechanism for implementing a general purpose scripting language that supports parallel execution is described. In one approach, parallel execution is provided in a seamless and...
8731893 Circuit simulation of MOSFETs  
An arithmetic device calculates the surface potential of a silicon layer by performing computation based on a mathematical expression and device parameters stored in a storage device. Likewise, the...
8731737 Microcontroller having a computing unit and a logic circuit, and method for carrying out computations by a microcontroller for a regulation or a control in a vehicle  
A microcontroller having a computing unit and a logic circuit. The microcontroller carries out computations for a regulation or control in a vehicle. The computing unit is connected to the logic...
8732649 Backward analysis for determining fault masking factors  
A method and a system for determining the observability of faults in an electronic circuit include a processor that simulates, in a simulation phase, a behavior of the electronic circuit using a...
8731894 Indexing behaviors and recipes of a circuit design  
An executable circuit design is used to generate waveforms, from which behaviors of the circuit are captured. The behaviors and various combinations thereof can then be saved in a database, along...
8726210 Optimizing timing critical paths by modulating systemic process variation  
Systems and methods are provided to optimize critical paths by modulating systemic process variations, such as regional timing variations in IC designs. A method includes determining a physical...
8725484 Adaptive redundancy-extraction for 3D electromagnetic simulation of electronic systems  
Redundancy extraction in electromagnetic simulation of an electronic device/system includes discretizing first and second spaced conductive layers of a computer model of an electronic device/system...