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7629259 |
Method of aligning a reticle for formation of semiconductor devices
A method for aligning a reticle is provided. A first patterned layer with a first alignment grid is formed. Sidewall layers are formed over the first patterned layer to perform a first shrink. The...
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7629221 |
Method for forming capacitor of semiconductor device
Disclosed is a method for forming a capacitor of a semiconductor device. In such a method, a mold insulating layer is formed on an insulating interlayer provided with a storage node plug, and the...
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7608545 |
Semiconductor device
Embodiments relate to a semiconductor device and a method of manufacturing a semiconductor. In embodiments, the method may include a first exposure step of performing an exposure process for...
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7589025 |
Semiconductor processing
Methods are disclosed for providing reduced particle generating silicon carbide. The silicon carbide articles may be used as component parts in apparatus used to process semiconductor wafers. The...
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7579273 |
Method of manufacturing a photodiode array with through-wafer vias
A method for manufacturing a photodiode array includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has a first...
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7563720 |
Boron doped shell for MEMS device
A wafer for use in a MEMS device having two doped layers surrounding an undoped layer of silicon is described. By providing two doped layers around an undoped core, the stress in the lattice...
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7563719 |
Dual damascene process
A dual damascene process. A first photoresist layer with a first opening corresponding to a trench pattern is formed on a dielectric layer. A second photoresist layer with a second opening...
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7557044 |
Nanomachined mechanical components using nanoplates, methods of fabricating the same and methods of manufacturing nanomachines
Disclosed herein is a method of fabricating nano-components using nanoplates, including the steps of: printing a grid on a substrate using photolithography and Electron Beam Lithography; spraying...
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7554108 |
Forming a semiconductor device feature using acquired parameters
In one embodiment, a controller coupled to a focused ion beam tool can execute instructions to acquire parameters for a feature of a semiconductor device, determine a data array using the...
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7553721 |
Flash memory devices and methods of fabricating the same
Flash memory devices and methods for fabricating the same. In one example embodiment, a method of fabricating a flash memory includes various acts. First, a tunnel oxide layer is formed on an...
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7553679 |
Method of determining plasma ion density, wafer voltage, etch rate and wafer current from applied bias voltage and current
Plasma parameters such as plasma ion density, wafer voltage, etch rate and wafer current in the chamber are determined from external measurements on the applied RF bias electrical parameters such...
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7534633 |
LED with substrate modifications for enhanced light extraction and method of making same
The surface morphology of an LED light emitting surface is changed by applying a reactive ion etch (RIE) process to the light emitting surface. Etched features, such as truncated pyramids, may be...
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7521367 |
FIB/RIE method for in-line circuit modification of microelectronic chips containing organic dielectric
A method for circuit modification of an microelectronic chip having at least one conductor in an organic dielectric, includes applying a protective inorganic surface layer on top of the organic...
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7514368 |
Flash memory device
Embodiments relate to a flash memory device and a method of manufacturing a flash memory device, which may increase a coupling coefficient between a control gate and a floating gate by increasing a...
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7504340 |
System and method for providing contact etch selectivity using RIE lag dependence on contact aspect ratio
A system and method is disclosed for providing contact etch selectivity for the etching of a plurality of contact etch holes through a dielectric layer of an integrated circuit. The method...
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7501353 |
Method of formation of a damascene structure utilizing a protective film
Disclosed is a method for the formation of features in a damascene process. According to the method, vias are formed in a dielectric layer and then covered by a layer of high molecular weight...
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7498268 |
Gas delivery system for semiconductor processing
The present invention is directed to improving defect performance in semiconductor processing systems. In specific embodiments, an apparatus for processing semiconductor substrates comprises a...
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7494934 |
Method of etching carbon-containing layer and method of fabricating semiconductor device
A method of etching a carbon-containing layer on a semiconductor substrate using a Si-containing gas and a related method of fabricating a semiconductor device in which a plurality of contact holes...
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7485579 |
Method of manufacturing a semiconductor device
In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an...
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7482278 |
Key-hole free process for high aspect ratio gap filling with reentrant spacer
A new method of depositing PE-oxide or PE-TEOS. An HDP-oxide is provided over a pattern of polysilicon. An etch back is performed to the deposited HDP-oxide, a layer of plasma-enhanced SiN is...
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7482215 |
Self-aligned dual segment liner and method of manufacturing the same
A method of forming a dual segment liner covering a first and a second set of semiconductor devices is provided. The method includes forming a first liner and a first protective layer on top...
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7482192 |
Method of making dimple structure for prevention of MEMS device stiction
A MEMS device having a proof mass resiliently mounted above a substrate has projections formed on adjacent surfaces of the mass and substrate. The device is formed by creating a plurality of holes...
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7481943 |
Method suitable for etching hydrophillic trenches in a substrate
A method suitable for etching hydrophilic trenches into a substrate, such as silicon, is provided. The method comprises etching and sidewall passivation processes for achieving anisotropy....
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7473646 |
Dry etching method and production method of magnetic memory device
Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum...
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7473579 |
Self-aligned wafer level integration system
A polymer-based, self-aligned wafer-level heterogeneous integration system, SA WLIT, for integrating semiconductor integrated circuit (IC) chips to a substrate is presented. The system includes a...
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7473377 |
Plasma processing method
A plasma processing method includes a step of preparing a process subject having an organic layer on a surface thereof, and a step of irradiating the process subject with H 2 plasma to improve...
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7462562 |
Fabrication method of semiconductor device
Fabrication method of semiconductor device to reduce leak current at junction interface of p-type well and n-type well. The method includes forming a first trench portion by selective dry etching...
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7461445 |
Method of manufacturing a magnetic head with a deposited shield
A method for fabricating a non-electroplated shield using combination patterning and devices formed thereby are disclosed. The method includes depositing a metal layer, such as CZT, removing...
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7446050 |
Etching and plasma treatment process to improve a gate profile
A method for improving a polysilicon gate electrode profile to avoid preferential RIE etching in a polysilicon gate electrode etching process including carrying out a multi-step etching process...
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7445726 |
Photoresist trimming process
A photoresist trimming process is described. An etcher equipped with an etching chamber, a wafer holder, a TCP source and a TCP window is provided. After plasma is generated in the etching chamber,...
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7442650 |
Methods of manufacturing semiconductor structures using RIE process
A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio...
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7442624 |
Deep alignment marks on edge chips for subsequent alignment of opaque layers
A method of forming alignment marks on edge chips in a kerf region of a semiconductor workpiece. The alignment marks are formed in at least one material layer of the semiconductor device. The...
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7439183 |
Method of manufacturing a semiconductor device, and a semiconductor substrate
A method of manufacturing a semiconductor device. In the method, a thin film is formed on an Si substrate having face orientation ( 100 ), that part of the thin film, which lies on an...
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7439093 |
Method of making a MEMS device containing a cavity with isotropic etch followed by anisotropic etch
A method of making an etch structure in a substrate involves the steps of providing a mask on a substrate with a pattern that leaves at least one opening leaving the substrate in direct contact...
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7427566 |
Method of making an electronic device cooling system
A method is provided. The method includes forming a conductive layer on an inner surface of a substrate and providing a sacrificial layer over the conductive layer. The method includes forming a...
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7425465 |
Method of fabricating a multi-post structures on a substrate
Micromechanical devices having complex multilayer structures and techniques for forming the devices are described.
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7413915 |
Micro-fluid ejection head containing reentrant fluid feed slots
Methods of micro-machining a semiconductor substrate to form through fluid feed slots therein. One method includes providing a semiconductor substrate wafer having a thickness greater than about...
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7410901 |
Submicron device fabrication
A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids...
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7405159 |
Method of fabricating a semiconductor device package having a semiconductor element with a roughened surface
A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a...
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7405152 |
Reducing wire erosion during damascene processing
A damascene process incorporating a GCIB step is provided. The GCIB step can replace one or more CMP steps in the traditional damascene process. The GCIB step allows for selectable removal of...
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7375038 |
Method for plasma etching a chromium layer through a carbon hard mask suitable for photomask fabrication
Methods for etching chromium and forming a photomask using a carbon hard mask are provided. In one embodiment, a method of a chromium layer includes providing a substrate in a processing chamber,...
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7375028 |
Method for manufacturing a semiconductor device
A semiconductor device may be manufactured by a method that includes forming an etch stop layer on a semiconductor substrate, sequentially forming a first interlayer insulating layer, a first...
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7368396 |
Dry etching methods
A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (referred to collectively as “slots”) in the substrates. The process...
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7368392 |
Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrode
A method of etching metals and/or metal-containing compounds using a plasma comprising a bromine-containing gas. In one embodiment, the method is used during fabrication of a gate structure of a...
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7351664 |
Methods for minimizing mask undercuts and notches for plasma processing system
A method for etching silicon layer of a substrate, which is deposited on a bottom electrode in a plasma processing chamber. The method includes performing a main etch step until at least 70 percent...
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7348204 |
Method of fabricating solid state imaging device including filling interelectrode spacings
A method for fabricating a solid state imaging device comprising photoelectric conversion sections and charge transfer sections having single-layered charge transfer electrodes for transferring...
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7344994 |
Multiple layer etch stop and etching method
A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (hereinafter “slots”) in the substrates. The process includes applying...
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7335590 |
Method of fabricating semiconductor device by forming diffusion barrier layer selectively and semiconductor device fabricated thereby
In a method of fabricating a semiconductor device by selectively forming a diffusion barrier layer, and a semiconductor device fabricated thereby, a conductive pattern and an insulating layer,...
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7329608 |
Method of processing a substrate
The invention is embodied in a plasma flow device or reactor having a housing that contains conductive electrodes with openings to allow gas to flow through or around them, where one or more of the...
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7303997 |
Regionally thinned microstructures for microbolometers
Microbolometers with regionally thinned microbridges are produced by depositing a thin film (0.6 μm) of silicon nitride on a silicon substrate, forming microbridges on the substrate, etching the...
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