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7622395 |
Two-step method for etching a fuse window on a semiconductor substrate
A two-step method for etching a fuse window on a semiconductor substrate is provided. A semiconductor substrate having thereon a fuse interconnect-wire is formed in a dielectric film stack. The...
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7622391 |
Method of forming an electrically conductive line in an integrated circuit
A method of forming a semiconductor structure comprises providing a semiconductor structure comprising a layer of a dielectric material provided over an electrically conductive feature. An opening...
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7622191 |
Titania-based coating for capillary microextraction
A method is presented describing in situ preparation of the titania-based sol-gel PDMS coating and its immobilization on the inner surface of a fused silica microextraction capillary. Sol-gel...
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7615480 |
Methods of post-contact back end of the line through-hole via integration
Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In...
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7611980 |
Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
Single spacer processes for multiplying pitch by a factor greater than two are provided. In one embodiment, n, where n≧2, tiers of stacked mandrels are formed over a substrate, each of the n...
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7605086 |
Corrosion resistant component of semiconductor processing equipment and method of manufacture thereof
A corrosion resistant component of a plasma chamber includes a liquid crystalline polymer. In a preferred embodiment, the liquid crystalline polymer (LCP) is provided on an aluminum component...
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7601586 |
Methods of forming buried bit line DRAM circuitry
A method of forming buried bit line DRAM circuitry includes collectively forming a buried bit line forming trench, bit line vias extending from the bit line forming trench, and memory array storage...
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7582560 |
Method for fabricating semiconductor device
A method for fabricating a semiconductor device includes preparing a substrate comprising a first surface and a second surface formed at a lower position than the first surface, forming an...
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7579255 |
Semiconductor device and method for isolating the same
The present invention relates to a semiconductor device and a method for isolating the same. The semiconductor device includes: a silicon substrate provided with a trench including at least one...
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7576010 |
Method of forming pattern using fine pitch hard mask
A method of forming a first hard mask pattern including a plurality of first line patterns formed on the etch target layer in a first direction and having a first pitch. A third layer is formed on...
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7576008 |
Method for forming buried contact electrode of semiconductor device having pn junction and optoelectronic semiconductor device using the same
Disclosed is a method for manufacturing an optoelectronic semiconductor device having a p-n junction diode, which includes the steps of: (a) etching at least one surface of the p-n junction diode...
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7572734 |
Etch depth control for dual damascene fabrication process
The etch depth during trench over via etch of a dual damascene structure in a dielectric film stack is controlled to be the same over the dense area and the open area of a substrate and solve...
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7572729 |
Method of manufacturing semiconductor device
A method of manufacturing semiconductor devices, including the steps of forming an insulating layer on a semiconductor substrate in which predetermined structures are formed, and etching the...
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7569486 |
Spin on glass (SOG) etch improvement method
A system and method of preventing pattern lifting during a trench etch/clean process is disclosed. A first layer comprising a first dip is formed over a first via pattern. A trench resist layer is...
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7560391 |
Forming of trenches or wells having different destinations in a semiconductor substrate
A method for forming, in a semiconductor substrate, wells and/or trenches having different destinations, including the steps of at least partly simultaneously etching cavities according to the...
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7560388 |
Self-aligned pitch reduction
A method providing features in a dielectric layer is provided. A sacrificial layer is formed over the dielectric layer. A set of sacrificial layer features is etched into the sacrificial layer. A...
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7560387 |
Opening hard mask and SOI substrate in single process chamber
Methods for opening a hard mask and a silicon-on-insulator substrate in a single process chamber are disclosed. In one embodiment, the method includes patterning a photoresist over a stack...
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7553760 |
Sub-lithographic nano interconnect structures, and method for forming same
A method to form interconnect structures including nano-scale, e.g., sub-lithographic, lines and vias for future generation of semiconductor technology using self-assembly block copolymers that can...
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7544623 |
Method for fabricating a contact hole
A method for fabricating a contact hole is provided. A semiconductor substrate having thereon a conductive region is prepared. A dielectric layer is deposited on the semiconductor substrate and the...
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7541291 |
Reduction of feature critical dimensions
A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist...
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7538037 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes forming a predetermined structure including a first inorganic insulating film covering a copper interconnection, an organic insulating...
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7538009 |
Method for fabricating STI gap fill oxide layer in semiconductor devices
A method for fabricating an STI gap fill oxide layer in a semiconductor device is provided. The method can include: forming a shallow trench for forming an STI on a semiconductor substrate; forming...
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7531450 |
Method of fabricating semiconductor device having contact hole with high aspect-ratio
Provided is a method of fabricating a semiconductor device having a contact hole with a high aspect-ratio. The method includes: sequentially forming a lower pattern and an upper layer on a...
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7528066 |
Structure and method for metal integration
An interconnect structure including a gouging feature at the bottom of one of the via openings and a method of forming the same are provided. In accordance with the present invention, the method of...
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7514365 |
Method of fabricating opening and plug
A method of fabricating an opening or plug. In the process of forming the opening, before a photoresist layer is formed over a dielectric layer, a treatment process is performed to form a film on...
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7510973 |
Method for forming fine pattern in semiconductor device
A method for forming a fine pattern in a semiconductor device is provided. In one aspect, the method can construct a fine pattern in semiconductor devices. The fine pattern has a critical dimension...
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7510952 |
Single crystalline structure, method of forming the same, semiconductor device having the single crystalline structure, and method of manufacturing the semiconductor device
A single crystalline structure includes a first insulation interlayer pattern, a first epitaxial layer pattern, a second insulation interlayer pattern, and a second epitaxial layer pattern. The...
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7504339 |
Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuits
A trench structure in a wafer of semiconductor material and the method of forming the trench structure are described. The trench structure is formed on a semiconductor wafer that has a top surface...
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7501347 |
Semiconductor device and manufacturing method of the same
In a semiconductor device, capacitance between copper interconnections is decreased and the insulation breakdown is improved simultaneously, and a countermeasure is taken for misalignment via by a...
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7482275 |
Plasma treatment method and method of manufacturing semiconductor device
An insulation film on a substrate is subjected to a plasma treatment using a gas containing at least either of a CH-based gas and a CO-based gas, whereby variations in the dielectric constant of...
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7476626 |
Etch stop layer for a metallization layer with enhanced etch selectivity and hermeticity
By providing a barrier layer stack including a silicon nitride layer for confining a copper-based metal region, thereby also effectively avoiding any diffusion of oxygen and moisture into the...
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7468302 |
Method of forming trench type isolation film of semiconductor device
A method of forming a trench type isolation film of a semiconductor device, including the steps of sequentially forming a pad oxide film and a nitride film for a hard mask on a semiconductor...
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7456108 |
Manufacturing method for a semiconductor device
A manufacturing method for a semiconductor device, includes: preparing a semiconductor wafer having an active surface and a rear surface; forming a plurality of semiconductor regions, each of which...
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7452814 |
Method of polishing GaN substrate
In a polishing method of a GaN substrate according to this invention, first, while supplying a polishing solution 27 containing abrasives 23 and a lubricant 25, onto a platen 101, the GaN...
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7446041 |
Full sequence metal and barrier layer electrochemical mechanical processing
A method and apparatus for electrochemically processing metal and barrier materials is provided. In one embodiment, a method for electrochemically processing a substrate includes the steps of...
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7442647 |
Structure and method for formation of cladded interconnects for MRAMs
A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor...
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7435687 |
Plasma processing method and plasma processing device
The invention provides a plasma processing method and plasma processing device for manufacturing semiconductor devices in which the number of foreign particles being adhered to the wafer is reduced...
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7427515 |
Electronic element including ferroelectric substance film and method of manufacturing the same
A laminated film structure, method of manufacturing, and a preferable electronic element using the structure. The effective polarization into the electric field can be realized in the direction of...
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7416984 |
Method of producing a MEMS device
A method of producing a MEMS device removes the bottom side of a device wafer after its movable structure is formed. To that end, the method provides the device wafer, which has an initial bottom...
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7410905 |
Method for fabricating thin film pattern, device and fabricating method therefor, method for fabricating liquid crystal display, liquid crystal display, method for fabricating active matrix substrate, electro-optical apparatus, and electrical apparatus
A method for fabricating a thin film pattern on a substrate, includes the steps of: forming a concave part on the substrate that conforms to the thin film pattern; and applying a function liquid...
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7410901 |
Submicron device fabrication
A method for fabricating substrate material to include trenches and unreleased beams with submicron dimensions includes etching a first oxide layer on the substrate to define a first set of voids...
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7399707 |
In situ application of etch back for improved deposition into high-aspect-ratio features
A continuous in situ process of deposition, etching, and deposition is provided for forming a film on a substrate using a plasma process. The etch-back may be performed without separate plasma...
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7393780 |
Dual layer barrier film techniques to prevent resist poisoning
Provided is a process for forming a barrier film to prevent resist poisoning in a semiconductor device by depositing a second nitrogen-free barrier layer on top of a first barrier layer containing...
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7391342 |
Low-cost keypad encoding circuit
A keypad encoding circuit contains a voltage dividing network and an integrated circuit. The voltage dividing network includes a string of resistors that generates an encoding signal voltage. The...
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7375018 |
Method of manufacturing semiconductor device
Etching is performed on an insulating layer 23 and a conductive layer 32 with a photoresist 41 as the mask, to form an opening 51 in the conductive layer 32 . After removing the...
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7354523 |
Methods for sidewall etching and etching during filling of a trench
A method for sidewall etching includes providing a substrate having a trench defined therein, with the trench having fill material disposed over a bottom thereof, along a sidewall thereof, and at...
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7344995 |
Method for preparing a structure with high aspect ratio
The present invention discloses a method for preparing a structure with high aspect ratio, which can be a trench or a conductor. A first mask is formed on a substrate, and a first etching process...
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7341950 |
Method for controlling a thickness of a first layer and method for adjusting the thickness of different first layers
A method for controlling a thickness of a first layer of an electrical contact of a semiconductor device, whereby the semiconductor device comprises a semiconductor layer, a first layer and a...
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7332409 |
Methods of forming trench isolation layers using high density plasma chemical vapor deposition
A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen....
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7332399 |
Method for manufacturing a semiconductor substrate and method for manufacturing a semiconductor in which film thicknesses can be accurately controlled
A method of manufacturing semiconductor substrates. After supporting layers are provided on side walls of grooves formed in a semiconductor substrate, grooves that expose a second semiconductor...
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