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7616291 |
Lithographic processing cell and device manufacturing method
A double processing technique for device manufacture includes performing a first patterning step to form apertures in a resist layer which apertures are filled before the first resist layer is...
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7615480 |
Methods of post-contact back end of the line through-hole via integration
Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In...
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7507669 |
Gap tuning for surface micromachined structures in an epitaxial reactor
A device includes a top layer having at least two opposing faces, and at least two epitaxially deposited layers, each of the at least two epitaxially deposited layers situated on a respective one...
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7462504 |
Surface-emitting type light-emitting diode and fabrication method thereof
A surface-emitting type light-emitting diode includes a substrate, a p-n junction layer elevated on a portion of the substrate to emit light, and a first isolator layer formed on a sidewall of the...
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7435683 |
Apparatus and method for selectively recessing spacers on multi-gate devices
Embodiments of an apparatus and methods for fabricating a spacer on one part of a multi-gate transistor without forming a spacer on another part of the multi-gate transistor are generally described...
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7432120 |
Method for realizing a hosting structure of nanometric elements
Method for manufacturing a hosting structure of nanometric elements comprising the steps of depositing on an upper surface of a substrate, of a first material, a block-seed having at least one side...
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7410863 |
Methods of forming and using memory cell structures
A method of filling vias for a PCRAM cell with a metal is described. A PCRAM intermediate structure including a substrate, a first conductor, and an insulator through which a via extends has a...
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7390743 |
Methods for forming a structured tungsten layer and forming a semiconductor device using the same
A method for forming a structured tungsten layer and a method for forming a semiconductor device using the same. A first tungsten layer is formed with an atomic layer deposition (ALD) method. A...
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7384799 |
Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices
A method for forming a MEMS device using an amorphous silicon layer as a release layer includes etching superjacent films and using the amorphous silicon layer as an etch stop layer. The amorphous...
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7375012 |
Method of forming multilayer film
This disclosure describes system(s) and/or method(s) enabling contacts for individual nanometer-scale-thickness layers of a multilayer film.
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7300886 |
Interlayer dielectric for charge loss improvement
A method of manufacturing a memory device includes forming a first dielectric layer over a substrate and forming a charge storage element over the first dielectric layer. The method also includes...
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7268075 |
Method to reduce the copper line roughness for increased electrical conductivity of narrow interconnects (<100nm)
Embodiments of the present invention provide methods to reduce the copper line roughness for increased electrical conductivity in narrow interconnects having a width of less than 100 nm. These...
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7247569 |
Ultra-thin Si MOSFET device structure and method of manufacture
The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate...
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7180706 |
Magnetic heads and semiconductor devices and surface planarization processes for the fabrication thereof
A magnetic head according to one embodiment includes a pole piece made of a magnetic material; one or more magnetic pedestals formed over the pole piece; an insulator material formed over the pole...
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7179757 |
Replenishment of surface carbon and surface passivation of low-k porous silicon-based dielectric materials
Processing problems associated with porous low-k dielectric materials are often severe. Exposure of low-k materials to plasma during feature etching, ashing, and priming steps has deleterious...
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7112458 |
Method of forming a liquid crystal display
An active layer of a P-type low temperature polysilicon thin film transistor and a bottom electrode of a storage capacitor are first formed. Then, a P-type source/drain is formed and the bottom...
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7084059 |
CMP system for metal deposition
A system for dished metal redevelopment by providing a metal deposition solution at an interface between a moving semiconductor wafer and a moving polishing pad, which deposits metal onto dished...
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7078312 |
Method for controlling etch process repeatability
Plasma etch processes incorporating etch chemistries which include hydrogen. In particular, high density plasma chemical vapor deposition-etch-deposition processes incorporating etch chemistries...
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7033930 |
Interconnect structures in a semiconductor device and processes of formation
Processes for fabricating a semiconductor device are described herein. In one aspect of the invention, an exemplary process includes forming an interface layer overlying the device substrate,...
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7022579 |
Method for filling via with metal
A method of filling vias for a PCRAM cell with a metal is described. A PCRAM intermediate structure including a substrate, a first conductor, and an insulator through which a via extends has a...
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7009811 |
Surface planarization processes for the fabrication of magnetic heads and semiconductor devices
Surface planarization processes for the fabrication of magnetic heads and semiconductor devices are described herein. In one illustrative example, magnetic structures are formed over a substrate...
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6972259 |
Method for forming openings in low dielectric constant material layer
The invention is directed towards a method for forming openings in low-k dielectric layers and a structure for forming an opening thereof. A mask layer comprising at least one metal hard mask layer...
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6943118 |
Method of fabricating flash memory
In a method of fabricating a flash memory, a tunneling dielectric layer, a first conductive layer and a mask layer are sequentially formed on a substrate to form a gate structure. Buried...
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6924238 |
Edge peeling improvement of low-k dielectric materials stack by adjusting EBR resistance
A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined...
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6921718 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate and an electrode disposed on a major surface of the semiconductor substrate. A via hole is formed on a center of the electrode so as to...
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6905975 |
Methods of forming patterned compositions
The invention includes methods by which the size and shape of photoresist-containing masking compositions can be selectively controlled after development of the photoresist. For instance,...
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6884724 |
Method for dishing reduction and feature passivation in polishing processes
Methods and apparatus for planarizing a substrate surface are provided. In one aspect, a method is provided for planarizing a substrate surface including polishing a first conductive material to a...
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6872664 |
Dual gate nitride process
A method of manufacturing a semiconductor device includes providing a wafer substrate having a surface, forming a first nitride layer over the wafer substrate, providing a layer of photoresist over...
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6867139 |
Method of manufacturing semiconductor device
A semiconductor device manufacturing method wherein a via-hole is formed in an second inter-layer insulating film covering a lower layer wiring, throughout a surface of which are then formed a...
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6864179 |
Semiconductor memory device having COB structure and method of fabricating the same
A fabrication method for forming a semiconductor device having COB (capacitor-over-bit line) structure is provided. A lower insulating film is formed on a substrate. Bit line patterns are formed on...
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6855634 |
Polishing method and polishing apparatus
A polishing method able to easily flatten unevenness formed on the surface of a film to be polished and able to efficiently polish the film flat while suppressing damage to an interlayer insulating...
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6833232 |
Micro-pattern forming method for semiconductor device
Disclosed is a micro-pattern forming method for a semiconductor device comprising: sequentially forming first and second insulation films on a semiconductor substrate; forming a photosensitive film...
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6821872 |
Method of making a bit line contact device
A method for making a bit line contact on a substrate is provided. Two gate conductor stacks are formed on a main surface of the substrate in close proximity to each other. A bit line contact...
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6812115 |
Method of filling an opening in a material layer with an insulating material
The filling of sub-0.25 μm trenches with dielectric material may lead to the formation of a void. Typically, the void may be closed by oxidation. When the trench includes non-oxidizable sidewall...
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6809032 |
Method and apparatus for detecting the endpoint of a chemical-mechanical polishing operation using optical techniques
In another aspect of the present invention, a system for detecting an endpoint in a polishing process is provided. The system comprises a polishing tool, a controllable light source, a sensor, and...
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6784077 |
Shallow trench isolation process
A method of forming a silicon oxide, shallow trench isolation (STI) region, featuring a silicon rich, silicon oxide layer used to protect the STI region from a subsequent wet etch procedure, has...
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6780774 |
Method of semiconductor device isolation
Disclosed herein is a method of semiconductor device isolation, which forms a device isolation film on an isolation region of a substrate using a trench process. The method comprises the steps of...
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6774045 |
Residual halogen reduction with microwave stripper
This invention relates to a method for reducing halogen gasses and byproducts in post-etch applications. The method consists of exposing the substrate to O 2 /N 2 plasma and water vapor in a...
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6774042 |
Planarization method for deep sub micron shallow trench isolation process
A method of planarizing wafers using shallow trench isolation is described. The method uses a very hard polishing pad and chemical mechanical polishing with no additional etching required. Trenches...
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6759319 |
Residue-free solder bumping process
A new method of fabricating solder bumps in the manufacture of an integrated circuit device has been achieved. Contact pads are provided overlying a semiconductor substrate. A passivation layer is...
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6750148 |
Method of manufacturing wireless suspension blank
A method of manufacturing a wireless suspension blank wherein three-layered laminate formed of a metallic layer having a spring property and a conductive layer laminated on the metallic layer...
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6746960 |
Electronic techniques for analyte detection
Techniques are used to detect and identify analytes. Techniques are used to fabricate and manufacture sensors to detect analytes. An analyte ( 1810 ) is sensed by sensors ( 1820 ) that output...
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6746888 |
Display and fabricating method thereof
A transmission type display includes a thin film transistor for driving a pixel electrode, which transistor is provided on a substrate, and a conductive shield layer provided at a position over the...
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6734105 |
Method for forming silicon quantum dots and method for fabricating nonvolatile memory device using the same
A method for forming silicon quantum dots and a method for fabricating a nonvolatile memory device using the same, suitable for high speed and high packing density. The method for forming silicon...
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6730603 |
System and method of determining a polishing endpoint by monitoring signal intensity
The present invention provides a polishing endpoint detection system, for use with a polishing apparatus, a method of determining a polishing endpoint of a surface located on a semiconductor wafer,...
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6706635 |
Innovative method to build a high precision analog capacitor with low voltage coefficient and hysteresis
The present invention relates to a method for forming an anlog capacitor on a semiconductor substrate. The method comprises forming a field oxide over a portion of the substrate, and forming a...
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6682820 |
Recession resistant coated ceramic part
A recession resistant coated ceramic part. The ceramic part has a ceramic substrate and a recession resistant coating disposed on the substrate. The coating includes a plurality of layers diffusion...
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6677227 |
Method of forming patterned metalization on patterned semiconductor wafers
A metalization process forms metal contacts having defined profiles for contact between microelectromechanical (MEMS) devices or chemical sensors with semiconductor devices. Gold contacts may be...
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6670274 |
Method of forming a copper damascene structure comprising a recessed copper-oxide-free initial copper structure
A method of forming a planarized final copper structure including the following steps. A structure is provided having a patterned dielectric layer formed thereover. The patterned dielectric layer...
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6660641 |
Method for forming crack resistant planarizing layer within microelectronic fabrication
Within a method for forming a planarizing layer within a microelectronic fabrication, there is employed formed upon a partially photoexposed planarizing layer formed of a partially photoexposed...
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