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6979625 |
Copper interconnects with metal capping layer and selective copper alloys
High reliable copper interconnects are formed with copper or a low resistivity copper alloy filling relatively narrow openings and partially filling relatively wider openings and a copper alloy...
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6977408 |
High-performance non-volatile memory device and fabrication process
An EEPROM device exhibiting high saturation current and low signal propagation delay and a process for fabricating the device that includes the formation of refractory metal silicide regions in the...
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6974659 |
Method of forming a solder ball using a thermally stable resinous protective layer
A method for protecting a semiconductor process wafer surface from contacting thermally degraded photoresist including providing a semiconductor process wafer having a process surface; forming a...
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6972259 |
Method for forming openings in low dielectric constant material layer
The invention is directed towards a method for forming openings in low-k dielectric layers and a structure for forming an opening thereof. A mask layer comprising at least one metal hard mask layer...
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6969682 |
Single workpiece processing system
A system for processing wafers includes a robot moveable within an enclosure to load and unload workpieces into and out of workpiece processors. A processor includes an upper rotor having alignment...
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6960527 |
Method for fabricating non-volatile memory device having sidewall gate structure and SONOS cell structure
First and second vertical structures are formed on first and second surface regions of a silicon substrate. Each of the first and second vertical structures includes a tunneling layer pattern, a...
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6953751 |
Micro device and process for producing it
A micro device comprising a SU-8 photoresist layer adhered to a thin layer of, for example, silicon nitride, silicon oxide, metal, and diamond. The SU-8 layer is clamped on the thin layer by using...
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6951818 |
Method of manufacturing an electronic device
A vertical interconnect ( 15 ) in an electronic device ( 10 ) is manufactured non-photolithographically. This is done by modifying a surface ( 20,30 ) of either a metal layer ( 3 ) or an...
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6951821 |
Processing system and method for chemically treating a substrate
A processing system and method for chemically treating a substrate, wherein the processing system comprises a temperature controlled chemical treatment chamber, and an independently temperature...
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6949472 |
Method for high kinetic energy plasma barrier deposition
A novel method for depositing a barrier layer on a single damascene, dual damascene or other contact opening structure. The method eliminates the need for pre-cleaning argon ion bombardment of the...
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6949467 |
Forming method of contact in semiconductor device and manufacturing method of PMOS device using the same
The present invention provides a manufacturing method of a contact for use in a semiconductor device and a manufacturing method of a PMOS device using the same, which can obtain an electrical...
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6946398 |
Method for fabricating a micro machine
The method for fabricating a micro machine comprises the step of burying an oxide film 54 in a first semiconductor substrate 6, the step of bonding the first semiconductor substrate to the...
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6943119 |
Flash process for stacking poly etching
In accordance with the objectives of the invention a new Method and recipe is provided for etching of stacked layers of polysilicon. The invention provides for an added flash step after the...
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6943118 |
Method of fabricating flash memory
In a method of fabricating a flash memory, a tunneling dielectric layer, a first conductive layer and a mask layer are sequentially formed on a substrate to form a gate structure. Buried...
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6943117 |
UV nanoimprint lithography process using elementwise embossed stamp and selectively additive pressurization
A UV nanoimprint lithography process for forming nanostructures on a substrate. The process includes depositing a resist on a substrate; contacting a stamp having formed thereon nanostructures at...
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6943116 |
Method for fabricating a p-channel field-effect transistor on a semiconductor substrate
A p-channel field-effect transistor is formed on a semiconductor substrate. The transistor has an n-doped gate electrode, a buried channel, a p-doped source and a p-doped drain. The transistor is...
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6936541 |
Method for planarizing metal interconnects
A method for planarizing metal interconnects of a semiconductor wafer includes the steps of polishing the semiconductor wafer with a polishing solution and a polishing pad to planarize the metal...
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6933218 |
Low temperature nitridation of amorphous high-K metal-oxide in inter-gates insulator stack
An OXO-type inter-poly insulator (where X is a high-K metal oxide and O is an insulative oxide) is defined by forming an amorphous metal oxide layer on a silicon-based insulator (e.g., a silicon...
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6933235 |
Method for removing contaminants on a substrate
A method of processing a substrate is disclosed. The method includes depositing a dielectric layer having a metal oxide on a substrate. A portion of the dielectric layer is removed to form a...
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6930027 |
Method of manufacturing a semiconductor component
A method of manufacturing a semiconductor component includes forming a first electrically insulating layer ( 120 ) and a second electrically insulating layer ( 130 ) over a semiconductor substrate...
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6930054 |
Slurry composition for use in chemical mechanical polishing of metal wiring
Disclosed herein are slurry compositions for use in CMP(chemical mechanical polishing) process of metal wiring in manufacturing semiconductor devices, comprising a peroxide, an inorganic acid, a...
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6927169 |
Method and apparatus to improve thickness uniformity of surfaces for integrated device manufacturing
A method and apparatus for the formation of oxide in a manner having a planarizing effect on underlying material, e.g., silicon. In particular, an oxide having a nonuniform thickness profile is...
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6927171 |
Piezoresistive device and manufacturing processes of this device
This device, which is used to measure pressures or accelerations for example, comprises an isolation layer ( 32 ) that holds at least one piezoresistive gauge ( 29 ). The side tangents (T) of this...
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6924191 |
Method for fabricating a gate structure of a field effect transistor
A method for fabricating features on a substrate having reduced dimensions. The features are formed by defining a first mask on regions of the substrate. The first mask is defined using...
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6921708 |
Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean
Contact areas comprising doped semiconductor material at the bottom of contact holes are cleaned in a hot hydrogen plasma and exposed in situ during and/or separately from the hot hydrogen clean to...
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6916743 |
Semiconductor device and method for manufacturing thereof
A semiconductor device manufacturing method that enables accurate recognition of an alignment mark and optimal formation of a buried wiring. The method includes depositing an insulation film above...
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6916744 |
Method and apparatus for planarization of a material by growing a sacrificial film with customized thickness profile
A method and apparatus for the formation of oxide in a manner having a planarizing effect on underlying material, e.g., silicon. In particular, an oxide having a nonuniform thickness profile is...
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6914000 |
Polishing method, polishing system and process-managing system
A polishing method of the present invention is a polishing method for planarizing a film to be polished that is deposited on a wafer, and includes a step (a) of establishing a polishing rate...
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6914003 |
Method for manufacturing magnetic random access memory
A method for manufacturing a magnetic random access memory is disclosed. An interlayer insulating film is formed on a lower read layer, a cell region of the interlayer insulating film is etched...
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6911346 |
Method of etching a magnetic material
A method of etching a magnetic material (e.g., nickel-iron alloy (NiFe), cobalt-iron alloy (CoFe), and the like) using a gas mixture comprising a hydrogen halide gas and a fluorocarbon-containing...
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6908861 |
Method for imprint lithography using an electric field
A lithography process for creating patterns in an activating light curable liquid using electric fields followed by curing of the activating light curable liquid is described. The process involves...
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6905949 |
Semiconductor apparatus fabrication method forming a resist pattern, a film over the resist, and reflowing the resist
A semiconductor apparatus fabrication method is capable of effectively suppressing edge roughness when an extremely fine resist pattern is formed. In the semiconductor apparatus fabrication method,...
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6905975 |
Methods of forming patterned compositions
The invention includes methods by which the size and shape of photoresist-containing masking compositions can be selectively controlled after development of the photoresist. For instance,...
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6902656 |
Fabrication of microstructures with vacuum-sealed cavity
A cavity forming formed in an encapsulation structure under a vacuum in a vacuum chamber is sealed with a capping layer. A stiff protective layer under tensile stress is deposited on the capping...
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6900125 |
Method of manufacturing a semiconductor device including a multi-layer interconnect structure
When forming the interconnect trench by “via first” method of the dual damascene process, after providing a via hole in the interlayer dielectric film 11 , the anti-reflection coating 5 and...
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6900134 |
Method for forming openings in a substrate using bottom antireflective coatings
A method and system is disclosed for selectively forming a pattern for making openings in a substrate. A first set of openings are formed in a first photoresist layer coated on the substrate using...
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6900132 |
Single workpiece processing system
A system for processing semiconductor wafers has process units on a deck of a frame. The process units and the deck have precision locating features, such as tapered pins, for precisely positioning...
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6897138 |
Method and apparatus for producing group III nitride compound semiconductor
The method of the invention for producing a Group III nitride compound semiconductor, employing an etchable substrate which is produced from a material other than the Group III nitride compound...
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6892432 |
Nanotube cartridge and a method for manufacturing the same
A method for manufacturing a nanotube cartridge including the steps of: adhering numerous nanotubes to a surface of a holder, disposing a knife edge at an inclination to the surface of the holder...
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6893968 |
Defect-minimizing, topology-independent planarization of process surfaces in semiconductor devices
A process for planarizing a process layer having structures and has been applied to a working surface of a semiconductor device, includes abrading the process layer down to the working surface...
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6893967 |
L-shaped spacer incorporating or patterned using amorphous carbon or CVD organic materials
A multilayer L-shaped spacer is formed of a lower portion comprising a CVD organic material or amorphous carbon, and an upper portion comprised of a protective material. The upper portion is...
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6890858 |
Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines
In one aspect, the invention encompasses a semiconductor processing method of forming a material over an uneven surface topology. A substrate having an uneven surface topology is provided. The...
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6884727 |
Semiconductor fabrication process for modifying the profiles of patterned features
A method for forming a sacrificial layer ( 30 ) over patterned structures ( 28 ) to allow structures ( 28 ) to be trimmed laterally without incurring much loss vertically. Structures ( 28 ) are...
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6884729 |
Global planarization method
Methods for manufacturing substrates with difficult to polish features using reverse mask etching and chemical mechanical planarization techniques.
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6884726 |
Method for handling a thin silicon wafer
A method for handling a thin silicon wafer including the steps of successively forming on a surface of the wafer a first protection layer, a first etch stop layer, and an external layer; forming on...
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6881677 |
Method for making a micro-fluid ejection device
A method for forming a fluid feed via in a semiconductor substrate chip for a micro-fluid ejection head. The method includes applying a photoresist planarization and protection layer to a first...
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6878632 |
Semiconductor device having a conductive layer with a cobalt tungsten phosphorus coating and a manufacturing method thereof
A semiconductor device capable of suppressing diffusion of copper at an interface between a copper wire and a cap film to enhance an electromigration resistance to ensure reliability of the copper...
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6878417 |
Method of molecular-scale pattern imprinting at surfaces
A method for mask-free molecular or atomic patterning of surfaces of reactive solids is disclosed. Molecules adsorb at surfaces in patterns, governed by the structure of the surface, the chemical...
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6878633 |
Flip-chip structure and method for high quality inductors and transformers
A structure and method for achieving a flip-chip semiconductor device having plated copper inductors ( 4 ), transformers ( 16 ), interconnect, and power busing that is electrically superior, lower...
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6875703 |
Method for forming quadruple density sidewall image transfer (SIT) structures
A method is provided for forming a quadruple density sidewall image transfer (SIT) structure. Oxide spacers are formed on opposite sidewalls of a first mandrel. The oxide spacers form a second...
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