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6262455 |
Method of forming dual gate oxide layers of varying thickness on a single substrate
A method for manufacturing a semiconductor device that includes dual gate oxide layers made of two dielectric layers of varying thickness on a single wafer. In an example embodiment, a...
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6259143 |
Semiconductor memory device of NOR type mask ROM and manufacturing method of the same
A NOR type mask ROM has embedded digit lines arranged in stripes sandwiching an active region on a semiconductor substrate, a gate insulating film formed on the surface of the semiconductor...
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6258637 |
Method for thin film deposition on single-crystal semiconductor substrates
A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may...
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6259128 |
Metal-insulator-metal capacitor for copper damascene process and method of forming the same
A capacitor structure formed on a semiconductor substrate may include a first interconnect wiring (such as copper damascene) and a first conductive barrier layer in contact with the first...
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6255225 |
Method of forming a resist pattern, a method of manufacturing semiconductor device by the same method, and a device and a hot plate for forming a resist pattern
A method of forming a resist pattern and a method of manufacturing a semiconductor device using the method of forming the resist pattern, characterized in that a surface of an organic base coating...
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6255689 |
Flash memory structure and method of manufacture
A flash memory cell structure and its method of manufacture. The flash memory cell has a vertical configuration. An opening and then a trench are formed in a substrate by etching. The trench...
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6251000 |
Substrate holder, method for polishing substrate, and method for fabricating semiconductor device
A substrate holder for holding a substrate to be polished thereon and pressing the substrate against a polishing pad includes a substrate-holding head for holding the substrate thereon and pressing...
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6251790 |
Method for fabricating contacts in a semiconductor device
A contact structure between two conductors in a semiconductor device and a method for fabricating the same which can increase alignment margins between the contact plug and overlying conductor are...
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6251788 |
Method of integrated circuit polishing without dishing effects
A method for planarizing the surface of a semiconductor wafer is disclosed. It involves the steps of: (a) applying a coating solution containing a polymeric material on the dielectric film; (b)...
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6252247 |
Thin film transistor, a method for producing the thin film transistor, and a liquid crystal display using a TFT array substrate
A thin film transistor (TFT) device including a first electrode including at least one of a gate, a source and a drain formed on a transparent insulating substrate, an insulating film layer...
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6251783 |
Method of manufacturing shallow trench isolation
A method of manufacturing shallow trench isolation structures. The method includes the steps of depositing insulating material into the trench of a substrate to form an insulation layer. The...
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6245681 |
Dual temperature nitride strip process
The invention provides an improved nitride mask etching process. The invention uses two acid baths at different temperatures to remove the nitride mask. A first bath at a higher temperature more...
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6245648 |
Method of forming semiconducting materials and barriers
In a gaseous glow-discharge process for coating a substrate with semiconductor material, a variable electric field in the region of the substrate and the pressure of the gaseous material are...
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6242356 |
Etchback method for forming microelectronic layer with enhanced surface smoothness
A method for forming a microelectronic layer within a microelectronic fabrication first employs a substrate. There is then formed over the substrate a target microelectronic layer. There is then...
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6239040 |
Method of coating amorphous silicon film
A method of coating an amorphous silicon layer. An amorphous silicon layer is directly deposited on the polysilicon nodes by a self-aligned method. A chemical mechanical polishing process is...
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6239031 |
Stepper alignment mark structure for maintaining alignment integrity
Accurate photolighographic processing is achieved employing a stepper global alignment structure enabling formation thereon of a substantially transparent layer having a substantially planar upper...
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6235637 |
Method for marking a wafer without inducing flat edge particle problem
A method for marking a semiconductor wafer without inducing flat edge particles, using a laser scribing technique. The process begins by providing a semiconductor wafer having a marking area with a...
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6235642 |
Method for reducing plasma charging damages
A method for reducing plasma charging damages is disclosed. The method includes the following steps: define cell regions and scribe line regions on a substrate. Then, form a trench region on one of...
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6228768 |
Storage-annealing plated CU interconnects
Cu metalized wafers are stored at elevated temperatures to substantially complete recrystalization, thereby enabling subsequent CMP with a high degree of wafer to wafer uniformity. Embodiments...
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6225227 |
Method for manufacturing semiconductor device
In a method for manufacturing a semiconductor device in a wafer having a device formation area and an inspection pattern formation area, an interconnection layer is formed in the device formation...
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6218308 |
Method of manufacturing a contact for a capacitor of high density DRAMs
A method for manufacturing an integrated circuit capacitor is provided in the present invention. First, a semiconductor substrate is etched to form a contact hole. A polysilicon contact is then...
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6214720 |
Plasma process enhancement through reduction of gaseous contaminants
A method for improving the efficiency of a plasma process such as a sputter process. A low partial pressure of a gas such as oxygen liberated from a substrate in a reaction chamber is maintained....
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6204180 |
Apparatus and process for manufacturing semiconductor devices, products and precursor structures utilizing sorbent-based fluid storage and dispensing system for reagent delivery
A process for fabricating an electronic device structure on or in a substrate. A storage and dispensing vessel is provided, containing a solid-phase physical sorbent medium having physically...
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6204539 |
Semiconductor apparatus and manufacturing method therefor
In a MISFET incorporating a silicide compound made of metal having a high melting point and formed on an impurity diffusion layer for the drain and source, a MISFET disclosed herein comprises an...
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6197695 |
Process for the manufacture of passive and active components on the same insulating substrate
This invention relates to a process for the manufacture of one electronic structure comprising at least one active component and at least one passive component or element on a support substrate...
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6197694 |
In situ method for cleaning silicon surface and forming layer thereon in same chamber
A method is described for cleaning a silicon surface of a semiconductor wafer in a vacuum chamber while radiantly heating said silicon surface to maintain it within a first temperature range in the...
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6197668 |
Ferroelectric-enhanced tantalum pentoxide for dielectric material applications in CMOS devices
In insulated-gate, field effect transistor (IGFET) devices fabricated in integrated circuits, the scaling down of the dimensions of the devices has resulted in structures with dimensions are so...
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6197691 |
Shallow trench isolation process
A new method of forming shallow trench isolations has been achieved. A semiconductor substrate is provided. A first etch stop layer is deposited. The first etch stop layer and the semiconductor...
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6191026 |
Method for submicron gap filling on a semiconductor substrate
A semiconductor manufacturing process with improved gap fill capabilities is provided by a three step process of FSG deposition/etchback/FSG deposition. A first layer of FSG is partially deposited...
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6191035 |
Recipe design to prevent tungsten (W) coating on wafer backside for those wafers with poly Si on wafer backside
In a CVD vacuum chamber processing system for depositing a blanket of refractory material, such as tungsten, upon a frontside of a semiconductor wafer, an inert gas, such as argon is directed to...
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6191041 |
Method of fabricating semiconductor device
A method of fabricating semiconductor device. First, a masking layer having an opening pattern is formed on a material layer, and then a mask spacer is formed on the sidewall of the opening. The...
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6187685 |
Method and apparatus for etching a substrate
There is disclosed a method and apparatus for etching a substrate. The method comprises the steps of etching a substrate or alternately etching and depositing a passivation layer. A bias frequency,...
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6187682 |
Inert plasma gas surface cleaning process performed insitu with physical vapor deposition (PVD) of a layer of material
A method for insitu performing a cleaning operation along with a physical sputtering operation begins by placing a wafer (26) into a chamber (12). A plasma (30) is generated within the chamber (12)...
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6177351 |
Method and structure for etching a thin film perovskite layer
A method and structure for etching a thin film perovskite layer (e.g., barium strontium titanate 836) overlying a second material without substantially etching the second material. The method...
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6174815 |
Method for planarizing DRAM cells
A method for planarizing DRAM cells comprising the steps of providing a silicon substrate having a field oxide layer, an oxide layer and a capacitor formed thereon, then forming a first dielectric...
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6174805 |
Titanium film forming method
In a titanium film forming method of this invention, before a titanium film is formed, the temperature in a reaction chamber for forming the titanium film is set to a temperature or more at which...
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6171964 |
Method of forming a conductive spacer in a via
A method of constructing a conductive via spacer within a dielectric layer located between a first metal layer and a second metal layer includes the steps of depositing a conductive spacer layer...
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6171902 |
Method of forming a DRAM cylinder shaped capacitor
A semiconductor device and a manufacturing method for a hyperfine structure wherein contact of a gate electrode with a side-wall composed of a silicon nitride layer within a contact hole due to an...
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6169035 |
Method of local oxidation using etchant and oxidizer
A LOCOS method uses a reagent mixed of etchant and oxidizer to simultaneously perform the step of forming the FOX layer and the step of removing a mask layer of the conventional LOCOS method. The...
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6159804 |
Disposable sidewall oxidation fabrication method for making a transistor having an ultra short channel length
The present invention is directed to a method of making a transistor having a very short channel length. The method generally comprises forming a plurality of process layers above a surface of a...
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6159820 |
Method for fabricating a DRAM cell capacitor
Disclosed is an improved method for fabricating a DRAM cell capacitor which can provide a self aligned contact hole to a storage node of a capacitor and can increase capacitor surface areas by way...
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6156662 |
Fabrication process of a liquid crystal display device with improved yield
A method of fabricating a liquid crystal display device includes the step of removing a porous anodic oxide film selectively with respect to a barrier-type anodic oxide film covering a gate...
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6150273 |
Method of fabricating a kink-effect-free shallow trench isolations
A method of fabricating kink-effect-free shallow trench isolations is presented in this invention. First, a layer of silicon oxide and a layer of polysilican are sequentially deposited on a...
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6140240 |
Method for eliminating CMP induced microscratches
A method of removing microscratches in planarized dielectric surfaces covering conductor layers in submicron integrated circuit structures includes a semiconductor substrate having at least one...
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6140247 |
Semiconductor device manufacturing method
A semiconductor device manufacturing method includes the step of forming a silicon oxide film on the surface of a silicon region, and the step of supplying anhydrous hydrofluoric acid gas to the...
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6136716 |
Method for manufacturing a self-aligned stacked storage node DRAM cell
A method for manufacturing a self-aligned stacked storage node DRAM cell on a substrate for a capacitor over bit line (COB) process is disclosed. The method comprises the steps of: forming a first...
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6133151 |
HDP-CVD method for spacer formation
A method for forming a self-aligned contact structure is disclosed based on an HDP-CVD (High-Density Plasma-Chemical Vapor Deposition) process. Initially, after a polysilicon layer and a metal...
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6130164 |
Semiconductor device having gate oxide formed by selective oxide removal and method of manufacture thereof
A semiconductor device having a gate oxide layer formed by selective removal of the gate oxide layer and a process for manufacturing such a device is disclosed. A gate oxide layer is formed on a...
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6127278 |
Etch process for forming high aspect ratio trenched in silicon
A multistep etch process for forming high aspect ratio trenches in silicon having a silicon oxide and/or silicon nitride hardmask. In a first step, an etch composition of HBr and oxygen is used,...
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6127272 |
Method of electron beam lithography on very high resistivity substrates
A method of performing electron beam lithography on high resistivity substrates including forming semiconductor material on a high resistivity substrate and etching the semiconductor material to...
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