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9013039 Wafer support system for 3D packaging  
A method for handling and supporting a device wafer during a wafer thinning process and the resulting device are provided. Embodiments include forming a plurality of solder bumps on a first surface...
9012246 Manufacturing method of semiconductor device and polishing apparatus  
According to an embodiment, a method of manufacturing a semiconductor device includes forming a wiring groove on an insulating film; forming a barrier metal layer and a metal layer; polishing the...
9012329 Nanogap in-between noble metals  
A nanogap of controlled width in-between noble metals is produced using sidewall techniques and chemical-mechanical-polishing. Electrical connections are provided to enable current measurements...
RE45468 Barrier-slurry-free copper CMP process  
A method of polishing a metal layer comprising the following steps. A structure having an upper patterned dielectric layer with an opening therein is provided. A barrier layer is formed over the...
9005999 Temperature control of chemical mechanical polishing  
Methods for chemical mechanical polishing (CMP) of semiconductor substrates, and more particularly to temperature control during such chemical mechanical polishing are provided. In one aspect, the...
9005472 Aqueous polishing agent and graft copolymers and their use in a process for polishing patterned and unstructured metal surfaces  
An aqueous polishing agent, comprising, as the abrasive, at least one kind of polymer particles (A) finely dispersed in the aqueous phase and having at their surface a plurality of at least one...
9003651 Methods for integrated circuit fabrication with protective coating for planarization  
Various pattern transfer and etching steps can be used to create features. Conventional photolithography steps can be used in combination with pitch-reduction techniques to form superimposed,...
8999061 Method for producing silicon epitaxial wafer  
The method for producing a silicon epitaxial wafer according to the present invention has: a growth step G at which an epitaxial layer is grown on a silicon single crystal substrate; a first...
8993444 Method to reduce dielectric constant of a porous low-k film  
Embodiments of the present invention generally relate to methods for lowering the dielectric constant of low-k dielectric films used in semiconductor fabrication. In one embodiment, a method for...
8980122 Contact release capsule useful for chemical mechanical planarization slurry  
The invention relates to a contact release capsule comprising a particle, a chemical payload, and a polymer coating, wherein the particle is impregnated with the chemical payload, and the chemical...
8980750 Chemical mechanical polishing (CMP) composition comprising a non-ionic surfactant and a carbonate salt  
A chemical mechanical polishing (CMP) composition (Q) comprising (A) Inorganic particles, organic particles, or a mixture or composite thereof, wherein the particles are cocoon-shaped(B) a...
8980749 Method for chemical mechanical polishing silicon wafers  
A method for polishing a silicon wafer is provided, comprising: providing a silicon wafer; providing a polishing pad having a polishing layer which is the reaction product of raw material...
8980113 Chemical mechanical planarization using nanodiamond  
A method for chemical mechanical polishing of a substrate includes polishing the substrate at a stock removal rate of greater than about 2.5 Å/min to achieve a Ra of not greater than about 5.0 Å...
8974561 Manufacturing method of glass substrate for magnetic disk, magnetic disk, and magnetic recording / reproducing device  
A manufacturing method of a glass substrate for a magnetic disk is provided whereby nano pits and/or nano scratches cannot be easily produced in polishing a principal face of a glass substrate...
8974691 Composition for polishing and composition for rinsing  
A polishing composition for a silicon wafer and a rinsing composition for a silicon wafer according to the present invention contain a nonionic surfactant of a polyoxyethylene adduct. The HLB value...
8974692 Chemical mechanical polishing slurry compositions and method using the same for copper and through-silicon via applications  
Provided are novel chemical mechanical polishing (CMP) slurry compositions for polishing copper substrates and method of using the CMP compositions. The CMP slurry compositions deliver superior...
8974680 Pattern forming method  
A pattern forming method includes forming a coating film containing a hydrophilic first homopolymer having a first bonding group and a hydrophobic second homopolymer having a second bonding group...
8975138 Method of creating a maskless air gap in back end interconnects with double self-aligned vias  
A method including patterning a thickness dimension of an interconnect material into a thickness dimension for a wiring line with one or more vias extending from the wiring line and introducing a...
8969202 Method of manufacturing metal silicide and semiconductor structure using the same  
A method of manufacturing a metal silicide is disclosed below. A substrate having a first region and a second region is provided. A silicon layer is formed on the substrate. A planarization process...
8969204 CMP slurry and a polishing method using the same  
The present invention relates to a CMP slurry that is able to reduce dishing generation, when it is applied to polishing or planarization of silicon oxide layer, for example, and a polishing...
8969216 Method for single side texturing  
A method for single side texturing of a crystalline semiconductor substrate (10) comprises: providing a substrate (10), for example a semiconductor substrate, comprising a first surface (12) and a...
8961807 CMP compositions with low solids content and methods related thereto  
Disclosed are a polishing composition and method of polishing a substrate. The composition has low-load (e.g., up to about 0.1 wt. %) of abrasive particles. The polishing composition also contains...
8961800 Functional nanoparticles  
Functional nanoparticles may be formed using at least one nano-lithography step. In one embodiment, sacrificial material may be patterned on a multi-layer substrate using an imprint lithography...
8956546 Substrate processing method and substrate processing apparatus  
A substrate processing method for removing an Si-based film on a surface of a substrate accommodated in a processing chamber includes a first step in which the Si-based film on the surface of the...
8956929 Method for manufacturing semiconductor device  
In a semiconductor device including a transistor in which an oxide semiconductor layer, a gate insulating layer, and a gate electrode layer on side surfaces of which sidewall insulating layers are...
8951913 Method for removing native oxide and associated residue from a substrate  
Native oxides and associated residue are removed from surfaces of a substrate by sequentially performing two plasma cleaning processes on the substrate in a single processing chamber. The first...
8951878 Method for manufacturing SOI substrate and semiconductor device  
It is an object of the present invention to provide a method for manufacturing an SOI substrate having an SOI layer that can be used in practical applications with high yield even when a flexible...
8951908 Method for manufacturing semiconductor device  
A method for manufacturing semiconductor device includes preparing a structure including a substrate, an insulating layer on the substrate and having a recess, a barrier film on the insulating...
8951095 High selectivity slurry delivery system  
Various embodiments of a semiconductor processing fluid delivery system and a method delivering a semiconductor processing fluid are provided. In aspect, a system for delivering a liquid for...
8954186 Selecting reference libraries for monitoring of multiple zones on a substrate  
A method of configuring a polishing monitoring system includes receiving user input selecting a plurality of libraries, each library of the plurality of libraries comprising a plurality of...
RE45361 Semiconductor device manufacturing method having high aspect ratio insulating film  
The object of the present invention is to embed an insulating film in a hole having a high aspect ratio and a small width without the occurrence of a void. The thickness of a polishing stopper...
8945403 Material test structure  
Material test structures having cantilever portions and methods of forming the same are described herein. As an example, a method of forming a material test structure includes forming a number of...
8940554 Method of creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness  
A method for creating an extremely thin semiconductor-on-insulator (ETSOI) layer having a uniform thickness includes: measuring a thickness of a semiconductor-on-insulator (SOI) layer at a...
8940586 Mechanism for MEMS bump side wall angle improvement  
The present disclosure relates to a bump processing method and/or resulting MEMS-CMOS structure, in which one or more anti-stiction bumps are formed within a substrate prior to the formation of a...
8936729 Planarizing method  
According to one embodiment, a planarizing method is proposed. In the planarizing method, a surface to be processed of an object to be processed including a silicon oxide film is planarized in a...
8932952 Method for polishing silicon wafer and polishing liquid therefor  
Disclosed is a method for polishing a silicon wafer, wherein a surface to be polished of a silicon wafer is rough polished, while supplying a polishing liquid, which is obtained by adding a...
8932883 Method of measuring surface properties of polishing pad  
The present invention relates to a method of measuring surface properties of a polishing pad which measures surface properties such as surface topography or surface condition of a polishing pad...
8927869 Semiconductor structures and methods of manufacture  
Wire-bonded semiconductor structures using organic insulating material and methods of manufacture are disclosed. The method includes forming a metal wiring layer in an organic insulator layer. The...
8926859 Polishing composition for silicon wafers  
A polishing composition for a silicon wafer includes a macromolecular compound, an abrasive, and an aqueous medium. The macromolecular compound includes a constitutional unit (a1) represented by...
8927429 Chemical mechanical polishing (CMP) composition comprising a specific heteropolyacid  
A chemical mechanical polishing (CMP) composition comprising a specific heteropolyacid Abstract A chemical-mechanical polishing (CMP) composition comprising: (A) inorganic particles, organic...
8921185 Method for fabricating integrated circuit with different gate heights and different materials  
A method for fabricating an integrated circuit includes the following steps of: providing a substrate with at least one isolation structure formed therein so as to separate the substrate into a...
8920571 Method and materials for making a monolithic porous pad cast onto a rotatable base  
The present invention includes methods and materials for cleaning materials, particles, or chemicals from a substrate with a brush or pad. The method comprising: engaging a surface of a rotating...
8921229 Method of polishing copper wiring surfaces in ultra large scale integrated circuits  
A method of polishing copper wiring surfaces of in ultra large scale integrated circuit, the method including: a) preparing a polishing solution including between 35 and 80 w. % of a nano SiO2...
8921230 Etchant composition, and method of manufacturing a display substrate using the same  
An etchant composition includes about 25 percent by weight to about 35 percent by weight of phosphoric acid, about 3 percent by weight to about 9 percent by weight of nitric acid, about 10 percent...
8921166 Structure and method for placement, sizing and shaping of dummy structures  
A chip includes a number a plurality of functional areas of a layer and a number of dummy structures within the layer. The dummy structures are spaced from the functional areas. Each dummy...
8916433 Superior integrity of high-k metal gate stacks by capping STI regions  
When forming high-k metal gate electrode structures in an early manufacturing stage, integrity of an encapsulation and, thus, integrity of sensitive gate materials may be improved by reducing the...
8912095 Polishing method, polishing apparatus and polishing tool  
A polishing method and a polishing apparatus finish a surface of a substrate of a compound semiconductor containing an element such as Ga or the like to a desired level of flatness, so that the...
8906123 CMP slurry/method for polishing ruthenium and other films  
A method and associated composition for CMP processing of noble metal-containing substrates (such as ruthenium-containing substrates) afford both high removal rates of the noble metal and are...
8901003 Polishing method of semiconductor structure  
A polishing method of a semiconductor device is disclosed. A substrate having a first side and a second side opposite to the first side is provided. The substrate has a device layer formed on the...
8900473 Polishing solution for CMP, and method for polishing substrate using the polishing solution for CMP  
The CMP polishing liquid of the present invention contains 1,2,4-triazole, a phosphoric acid, an oxidant, and abrasive particles. The polishing method of the present invention is a substrate...