Matches 1 - 50 out of 1381 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7413985 Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device  
By forming a copper/silicon/nitrogen alloy in a surface portion of a copper-containing region on the basis of a precursor layer, highly controllable and reliable process conditions may be...
7413984 Multi-step process for forming a barrier film for use in copper layer formation  
Embodiments of the invention include a method for forming a copper interconnect having a bi-layer copper barrier layer. The method comprises the steps of providing a substrate with a low-K...
7413983 Plating method including pretreatment of a surface of a base metal  
The present invention provides a plating method and a plating apparatus which can securely form a metal film (protective film) by electroless plating on the exposed surfaces of a base metal, such...
7413974 Copper-metallized integrated circuits having electroless thick copper bond pads  
A metal structure ( 100 ) for a contact pad of a semiconductor, which has interconnecting traces of a first copper layer ( 102 ). The substrate is protected by an insulating overcoat ( 104 ). The...
7410900 Metallisation  
This invention relates to photosensitive organometallic compounds which are used in the production of metal deposits. In particular, this invention relates to photosensitive organometallic...
7410666 Metal nitride carbide deposition by ALD  
The present methods provide tools for growing conformal metal thin films, including metal nitride, metal carbide and metal nitride carbide thin films. In particular, methods are provided for...
7402519 Interconnects having sealing structures to enable selective metal capping layers  
Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom....
7402514 Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer  
An embodiment of the instant invention is a method of providing a connection between a first conductor and a second conductor wherein the first conductor is situated under the second conductor and...
7399706 Manufacturing method of semiconductor device  
There is here disclosed a manufacturing method of a semiconductor device, comprising providing a first film by a PVD process in a recess formed in at least one insulating film, the first film...
7396759 Protection of Cu damascene interconnects by formation of a self-aligned buffer layer  
Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit...
7396756 Top layers of metal for high performance IC's  
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a...
7393786 Method for manufacturing copper wires on substrate of flat panel display device  
A method for manufacturing copper wires on a substrate for a flat panel display device is disclosed. The method comprises following steps: providing a substrate; forming a seed layer on the...
7387962 Physical vapor deposition methods for forming hydrogen-stuffed trench liners for copper-based metallization  
Copper-based metallization is formed in a trench on an integrated circuit substrate by forming a liner of refractory metal in the trench using physical vapor deposition, forming a copper plating...
7387912 Packaging of electronic chips with air-bridge structures  
A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A...
7381660 Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness  
A silicon nitride layer having a silicon-rich sub-layer and a standard sub-layer is formed on a copper surface to obtain excellent electromigration characteristics due to the standard sub-layer...
7381646 Method for using a Cu BEOL process to fabricate an integrated circuit (IC) originally having an al design  
A semiconductor fabrication method or process is provided for fabricating an integrated circuit (IC) originally having an Al backend design using a Cu BEOL fabrication process. The method converts...
7381638 Fabrication technique using sputter etch and vacuum transfer  
First material ( 106 ) is situated on the surface of a substructure ( 100 and 102 ) and in an opening ( 104 ), such as a Wench, that extends partway through the substructure. Second material (...
7378737 Structures and methods to enhance copper metallization  
Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary...
7375031 Technique for forming interconnect structures with reduced electro and stress migration and/or resistivity  
By improving the purity of metal lines and the crystalline structure, the overall performance of metal lines, especially of highly scaled copper-based semiconductor devices, may be enhanced. The...
7375026 Local multilayered metallization  
An interconnect comprises a trench and a number of metal layers above the trench. The trench has a depth and a width. The depth is greater than a critical depth, and the number of metal layers is a...
7371682 Production method for electronic component and electronic component  
A method of manufacturing an electronic part in which on the upper surface of an insulating member covering lower layer wiring, a conductor portion connected from the lower layer wiring is exposed....
7368383 Hillock reduction in copper films  
A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing)...
7368066 Gold CMP composition and method  
The invention provides a cyanide-free chemical-mechanical polishing (CMP) composition useful for polishing a gold-containing surface of a substrate. The CMP composition comprises an abrasive, a...
7365011 Catalytic nucleation monolayer for metal seed layers  
A method of forming a copper interconnect on a substrate comprises providing a substrate that includes a dielectric layer and a trench etched into the dielectric layer, depositing a barrier layer...
7361589 Copper interconnect systems which use conductive, metal-based cap layers  
An integrated circuit (IC) may include a substrate, a first dielectric layer adjacent the substrate, and at least one trench in the first dielectric layer. The IC may also include a metal liner...
7358189 Copper clad laminate  
To reduce warping of a copper clad laminate coated with copper foils of different thicknesses on both sides, and thereby to improve production efficiency of the printed-wiring boards, there is...
7358180 Method of forming wiring structure and semiconductor device  
A micronized wiring structure is obtained by optimizing film forming modes of barrier metal films as being adapted respectively to a via-hole and a wiring groove, wherein sputtering processes are...
7354859 Method of manufacturing semiconductor device  
In a dual damascene process to form a fine interconnection structure, a semiconductor manufacturing method includes: forming a first film to be etched on an insulating layer on a semiconductor...
7354853 Selective dry etching of tantalum and tantalum nitride  
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers ( 30 ) are often used in semiconductor manufacturing. The...
7354849 Catalytically enhanced atomic layer deposition process  
A method for carrying out a damascene process to form an interconnect comprises providing a semiconductor substrate having a trench etched into a dielectric layer, wherein the trench includes a...
7351655 Copper interconnect systems which use conductive, metal-based cap layers  
An integrated circuit (IC) may include a substrate, a first dielectric layer adjacent the substrate, and at least one trench in the first dielectric layer. The IC may also include a metal liner...
7351651 Structure and method for contact pads having a recessed bondable metal plug over of copper-metallized integrated circuits  
A metal structure for an integrated circuit, which has copper interconnecting metallization ( 311 ) protected by an overcoat layer ( 320 ). A portion of the metallization is exposed in a window (...
7344913 Spin on memory cell active layer doped with metal ions  
A method of making organic memory cells made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an active...
7341948 Method of making a semiconductor structure with a plating enhancement layer  
Disclosed is a method of making a semiconductor structure, wherein the method includes forming an interlayer dielectric (ILD) layer on a semiconductor layer, forming a conductive plating...
7341947 Methods of forming metal-containing films over surfaces of semiconductor substrates  
The invention includes a method of forming a metal-containing film over a surface of a semiconductor substrate. The surface is exposed to a supercritical fluid. The supercritical fluid has H 2 , at...
7341946 Methods for the electrochemical deposition of copper onto a barrier layer of a work piece  
Methods are provided for electrochemically depositing copper on a work piece. One method includes the step of depositing overlying the work piece a barrier layer having a surface and subjecting the...
7341945 Method of fabricating semiconductor device  
A method of fabricating a semiconductor device prevents agglomeration of a seed metal layer in a recess. A recess is formed in a dielectric layer formed on or over a wafer. A seed metal layer...
7338910 Method of fabricating semiconductor devices and method of removing a spacer  
A method of fabricating a semiconductor device is disclosed. The method includes defining an electrode on a semiconductor substrate; forming a spacer on at least one sidewall of the electrode;...
7338903 Sequential reducing plasma and inert plasma pre-treatment method for oxidizable conductor layer  
A method for forming a barrier layer upon a copper containing conductor layer employs a hydrogen containing plasma treatment of the copper containing conductor layer followed by an argon plasma...
7338893 Integration of pore sealing liner into dual-damascene methods and devices  
A device employs damascene layers with a pore sealing liner and includes a semiconductor body. A metal interconnect layer comprising a metal interconnect is formed over the semiconductor body. A...
7335596 Method for fabricating copper-based interconnections for semiconductor device  
Cu-based interconnections are fabricated in a semiconductor device by depositing a thin film of Cu or Cu alloy on a dielectric film by sputtering, the dielectric film having trenches and/or via...
7335591 Method for forming three-dimensional structures on a substrate  
A method of forming a resist layer on a non-planar surface of a substrate includes placing the non-planar surface into an electrophoretic resist. While the non-planar surface is in the...
7329607 Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby  
A conductive connection forming method includes forming a first layer comprising a first metal on a substrate and forming a second layer comprising a second metal different from the first metal on...
7326641 Semiconductor device and method for manufacturing the same  
A semiconductor device which can enhance adhesiveness between a barrier conductive film and an organic insulating film, and prevent film-fall-off, and the manufacturing technique thereof are...
7326632 Method for fabricating metal wirings of semiconductor device  
A method for fabricating metal wirings of a semiconductor including forming an etch stop layer on a semiconductor substrate, and forming an inter metal dielectric on the etch stop layer. The method...
7323408 Metal barrier cap fabrication by polymer lift-off  
A new method is provided for the creation of copper interconnects. A pattern of copper interconnects is created, a protective layer of semiconductor material is deposited over the surface of the...
7319073 Method of reducing silicon damage around laser marking region of wafers in STI CMP process  
A wafer has thereon a plurality of integrated circuit die areas, scribe line that surrounds each of the integrated circuit die areas, and a laser marking region having therein a laser marking...
7319071 Methods for forming a metallic damascene structure  
In damascene process integration, a reducing plasma is applied after the etch stop or barrier layer is opened over a copper layer. Currently known methods for opening barrier layers suffer from the...
7319065 Semiconductor component and method of manufacture  
A semiconductor component having a composite via structure with an enhanced aspect ratio and a method for manufacturing the semiconductor component. Vias having a first aspect ratio are formed in a...
7315084 Copper interconnection and the method for fabricating the same  
A copper interconnection where holes in the vicinity of an interface are reduced to lower contribution of interface diffusion to Cu the EM, increase a lifetime, and simultaneously increase...
Matches 1 - 50 out of 1381 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >