|
Match
|
Document |
Document Title |
|
|
8183154 |
Selective metal deposition over dielectric layers
Selective deposition of metal over dielectric layers in a manner that minimizes or eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a...
|
|
|
8179225 |
Ceramic electronic component, manufacturing method of ceramic electronic component, and packaging method of ceramic electronic components
A ceramic electronic component has a chip element body having a conductor arranged inside, external electrodes, and a discrimination layer. The chip element body has first and second end faces...
|
|
|
8158518 |
Methods of making metal silicide contacts, interconnects, and/or seed layers
Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and...
|
|
|
8158507 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device comprises: immersing a semiconductor substrates in a Pd activating solution containing Pd ions and adhering a Pd catalyst to a surface of the...
|
|
|
8143164 |
Formation of a zinc passivation layer on titanium or titanium alloys used in semiconductor processing
Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation...
|
|
|
8143161 |
Method for passivating hardware of a microelectronic topography processing chamber
An apparatus for processing microelectronic topographies, a method of use of such an apparatus, and a method for passivating hardware of microelectronic processing chambers are provided. The...
|
|
|
8138084 |
Electroless Cu plating for enhanced self-forming barrier layers
Methods and an apparatus are described for an integrated circuit within which an electroless Cu plated layer having an oxygen content is formed on the top of a seed layer comprising Cu and Mn. The...
|
|
|
8124174 |
Electroless gold plating method and electronic parts
Part or whole of an electroless gold plating film of a plated film laminate including an electroless nickel plating film, an electroless palladium plating film and an electroless gold plating film...
|
|
|
8114773 |
Cleaning solution, cleaning method and damascene process using the same
A cleaning solution is provided. The cleaning solution includes (a) 0.01-0.1 wt % of hydrofluoric acid (HF); (b) 1-5 wt % of a strong acid, wherein the strong acid is an inorganic acid; (c)...
|
|
|
8110497 |
Method for manufacturing semiconductor device
An embodiment of the present invention provides a method for manufacturing a semiconductor device. This method comprises: forming a seed film at least on an inner face of a recessed portion of a...
|
|
|
8097490 |
Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die
A semiconductor die has a first semiconductor die mounted to a carrier. A plurality of conductive pillars is formed over the carrier around the first die. An encapsulant is deposited over the first...
|
|
|
8084348 |
Contact pads for silicon chip packages
A method for manufacturing a silicon chip package for a circuit board assembly provides a package with a silicon chip and an array of first contact pads that are provided by a first conductive...
|
|
|
8076240 |
Techniques to improve characteristics of processed semiconductor substrates
Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and...
|
|
|
8076241 |
Methods for multi-step copper plating on a continuous ruthenium film in recessed features
Methods are provided for multi-step Cu metal plating on a continuous Ru metal film in recessed features found in advanced integrated circuits. The use of a continuous Ru metal film prevents...
|
|
|
8069813 |
Wafer electroless plating system and associated methods
A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone...
|
|
|
8064219 |
Ceramic substrate part and electronic part comprising it
A ceramic substrate part comprising on its upper surface pluralities of external electrodes comprising wire-bonding electrodes, each of which comprises a primer layer based on Ag or Cu, a Ni-based...
|
|
|
8058164 |
Methods of fabricating electronic devices using direct copper plating
The present invention relates to methods and structures for the metallization of semiconductor devices. One aspect of the present invention is a method of forming a semiconductor device having...
|
|
|
8058171 |
Stirring apparatus for combinatorial processing
An apparatus and system for stirring liquid inside a flow cell. In one implementation, the apparatus includes a rotatable disc configured to receive liquid at a top side of the disc and distribute...
|
|
|
8043966 |
Method for monitoring patterning integrity of etched openings and forming conductive structures with the openings
Disclosed are embodiments of a method that both monitors patterning integrity of etched openings (i.e., ensures that lithographically patterned and etched openings are complete) and forms on-chip...
|
|
|
8043944 |
Process for enhancing solubility and reaction rates in supercritical fluids
Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of...
|
|
|
8043967 |
Process for through silicon via filling
A semiconductor electroplating process deposits copper into the through silicon via hole to completely fill the through silicon via in a substantially void free is disclosed. The through silicon...
|
|
|
8021980 |
Methods of manufacturing semiconductor devices including a copper-based conductive layer
Provided are methods of manufacturing semiconductor devices. The methods may include forming a first insulation layer on a semiconductor substrate, forming a groove by selectively etching the first...
|
|
|
8021982 |
Method of silicide formation by adding graded amount of impurity during metal deposition
A method is provided for forming a metal semiconductor alloy that includes providing a deposition apparatus that includes a platinum source and a nickel source, wherein the platinum source is...
|
|
|
8017523 |
Deposition of doped copper seed layers having improved reliability
Improved methods of depositing copper seed layers in copper interconnect structure fabrication processes are provided. Also provided are the resulting structures, which have improved...
|
|
|
8008188 |
Method of forming solid blind vias through the dielectric coating on high density interconnect substrate materials
A method is provided comprising: coating an electrically conductive core with a first removable material, creating openings in the first removable material to expose portions of the electrically...
|
|
|
8003517 |
Method for forming interconnects for 3-D applications
A method for forming an interconnect, comprising (a) providing a substrate (203) with a via (205) defined therein; (b) forming a seed layer (211) such that a first portion of the seed layer extends...
|
|
|
8003534 |
Method of forming semiconductor devices in wafer assembly
An apparatus and method for holding a semiconductor device in a wafer. A bar is connected to the wafer. A first sidewall comprises a first end and a second, and is connected to the bar at its first...
|
|
|
7989347 |
Process for filling recessed features in a dielectric substrate
A process for filling recessed features of a dielectric substrate for a semiconductor device, comprises the steps (a) providing a dielectric substrate having a recessed feature in a surface...
|
|
|
7981791 |
Thin films
Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting...
|
|
|
7977153 |
Methods for forming resistive-switching metal oxides for nonvolatile memory elements
Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers...
|
|
|
7972897 |
Methods for forming resistive switching memory elements
Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit...
|
|
|
7968462 |
Noble metal activation layer
Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning,...
|
|
|
7955977 |
Method of light induced plating on semiconductors
Methods of light induced plating of nickel onto semiconductors are disclosed. The methods involve applying light at an initial intensity for a limited amount of time followed by reducing the...
|
|
|
7951714 |
High aspect ratio electroplated metal feature and method
Disclosed are embodiments of an improved high aspect ratio electroplated metal structure (e.g., a copper or copper alloy interconnect, such as a back end of the line (BEOL) or middle of the line...
|
|
|
7947586 |
Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device is disclosed, wherein a plating layer is formed on a first surface side of a semiconductor substrate stably and at a low cost, while preventing the...
|
|
|
7943504 |
Self-releasing spring structures and methods
According to various exemplary embodiments, a spring device that includes a substrate, a self-releasing layer provided over the substrate and a stressed-metal layer provided over the self-releasing...
|
|
|
7939438 |
Method of inhibiting background plating
Methods of inhibiting background plating on semiconductor substrates using oxidizing agents are disclosed.
|
|
|
7935631 |
Method of forming a continuous layer of a first metal selectively on a second metal and an integrated circuit formed from the method
A cap layer for a metal feature such as a copper interconnect on a semiconductor wafer is formed by immersion plating a more noble metal (e.g. Pd) onto the copper interconnect and breaking up,...
|
|
|
7927997 |
Flip-chip mounting method and bump formation method
To provide a flip-chip mounting method and a bump formation method applicable to flip-chip mounting of a next generation LSI and having high productivity and high reliability. A semiconductor chip...
|
|
|
7927498 |
Solar cell and method of texturing solar cell
A solar cell and a method of texturing a solar cell are disclosed. The method includes coating an ink containing metal particles on a surface of a substrate, drying the ink to attach the metal...
|
|
|
7919412 |
Over-passivation process of forming polymer layer over IC chip
A method for forming a semiconductor chip or wafer includes following steps. A semiconductor substrate is provided, and then a polymer layer is deposited over the semiconductor substrate, wherein...
|
|
|
7905109 |
Rapid cooling system for RTP chamber
A rapid cooling system for a rapid thermal processing chamber includes a rapid thermal processing chamber having a wafer support for supporting a wafer. A tank having a supply of cooling liquid is...
|
|
|
7902062 |
Electrodepositing a metal in integrated circuit applications
A method is described in which a contact hole (18) to an interconnect (14) in an insulating layer (16) is fabricated. A barrier layer (20) is subsequently applied. Afterward, a photoresist layer...
|
|
|
7897198 |
Electroless layer plating process and apparatus
Electroless plating is performed to deposit conductive materials on work pieces such as partially fabricated integrated circuits. Components of an electroless plating bath are separately applied to...
|
|
|
7892973 |
Method for manufacturing a semiconductor device
A falling off of a through electrode is inhibited without decreasing a reliability of a semiconductor device including a through electrode. A semiconductor device 100 includes: a silicon substrate...
|
|
|
7884017 |
Thermal methods for cleaning post-CMP wafers
Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a...
|
|
|
7883919 |
Negative thermal expansion system (NTEs) device for TCE compensation in elastomer compsites and conductive elastomer interconnects in microelectronic packaging
A method for fabricating a negative thermal expanding system device includes coating a wafer with a thermally decomposable polymer, patterning the decomposable polymer into repeating disk patterns,...
|
|
|
7879720 |
Methods of forming electrical interconnects using electroless plating techniques that inhibit void formation
Methods of forming electrical interconnects include forming a copper pattern on a semiconductor substrate and then forming an electrically insulating capping layer on the copper pattern and an...
|
|
|
7875885 |
Display element and method of manufacturing the same
A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a...
|
|
|
7875554 |
Method for electroless depositing a material on a surface of a wafer
Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer (“wafer”). More specifically, the method and apparatus provide for selective heating of ...
|