Patents in Class 438/672

Matches 1 - 50 out of 1011

Match	Document	Document Title
1	7629255	Method for reducing microloading in etching high aspect ratio structures A method for etching features of different aspect ratios in a conductive layer is provided. The method comprises: depositing over the conductive layer with an aspect ratio dependent deposition;...
2	7629251	Semiconductor device and a method of manufacturing the same For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an...
3	7625818	Method for forming vias in a substrate The present invention relates to a method for forming vias in a substrate, comprising the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a photo...
4	7625815	Reduced leakage interconnect structure An improved semiconductor device interconnect structure comprising a dielectric layer recessed with respect to the conductive interconnect features. This structure and method reduces embedded...
5	7622390	Method for treating a dielectric film to reduce damage A method of treating a dielectric layer on a substrate is described. The method comprises forming the dielectric layer on the substrate, wherein the dielectric layer comprises a dielectric constant...
6	7618892	Via hole forming method A method of forming a via hole reaching a bonding pad in a wafer having an insulating film constituting a plurality of devices on the front surface of a substrate and bonding pads on each of the...
7	7615486	Apparatus and method for integrated surface treatment and deposition for copper interconnect A method and system for depositing films on a substrate for copper interconnect in an integrated system are provided to enable controlled-ambient transitions within an integrated system to limit...
8	7615484	Integrated circuit manufacturing method using hard mask An integrated circuit hard mask processing system is provided including providing a substrate having an integrated circuit; forming an interconnect layer over the integrated circuit; applying a...
9	7611986	Dual damascene patterning method A method for patterning a dual damascene structure in a semiconductor substrate is disclosed. The patterning is a metal hardmask based pattering eliminating at least resist poisoning and further...
10	7608905	Independently addressable interdigitated nanowires An apparatus has multiple sets of independently addressable interdigitated nanowires. Nanowires of a set are in electrical communication with other nanowires of the same set and are electrically...
11	7608537	Method for fabricating semiconductor device A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second...
12	7605081	Sub-lithographic feature patterning using self-aligned self-assembly polymers A method for conducting sub-lithography feature patterning of a device structure is provided. First, a lithographically patterned mask layer that contains one or more mask openings of a diameter d...
13	7605035	Method of fabricating semiconductor device by exposing upper sidewalls of contact plug to form charge storage electrode According to some embodiments, a method includes forming at least two contact plugs that penetrate an insulating layer to connect with a semiconductor substrate. The contact plugs have an upper...
14	7601624	Device comprising an ohmic via contact, and method of fabricating thereof Device comprising an ohmic via contact, and method of fabricating thereof. A preferred embodiment comprises forming a metal layer over a substrate, forming a conductive barrier layer over the metal...
15	7598171	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a...
16	7598165	Methods for forming a multiplexer of a memory device A method of forming a portion of a multiplexer of a memory device includes forming a plurality of conductive plugs on a semiconductor substrate and forming first and second bit lines overlying the...
17	7595556	Semiconductor device and method for manufacturing the same Embodiments relate to a semiconductor device and a method for manufacturing the same. According to embodiments, the semiconductor device may include a semiconductor substrate formed with a metal...
18	7595267	Method of forming contact hole of semiconductor device A method of forming a contact hole of a semiconductor device is disclosed. At the time of a hard mask formation process for forming a contact hole of a semiconductor device, first patterns are...
19	7592703	RF and MMIC stackable micro-modules A new method to form shielded vias with microstrip ground plane in the manufacture of an integrated circuit device is achieved. The method comprises, first, providing a substrate. The substrate is...
20	7592258	Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same A semiconductor device comprises metal lines in a specific metallization layer which have a different thickness and thus a different resistivity in different device regions. In this way, in high...
21	7592253	Method for forming a damascene pattern of a copper metallization layer There is provided a method of forming a damascene pattern including a via and a trench in a damascene process of forming a copper metal interconnection. The method includes forming an interlayer...
22	7592247	Sub-lithographic local interconnects, and methods for forming same The present invention relates to a semiconductor device having first and second active device regions that are located in a semiconductor substrate and are isolated from each other by an isolation...
23	7589021	Copper metal interconnection with a local barrier metal layer Embodiments relate to a method of forming a copper metal interconnection in a semiconductor device using a damascene process. In embodiments, the method may include forming a damascene pattern in...
24	7585757	Semiconductor device and method of manufacturing the same In a semiconductor device and method of manufacturing the semiconductor device, a punch-through prevention film pattern and a channel film pattern are formed on an insulation layer. The...
25	7585710	Methods of forming electronic devices having partially elevated source/drain structures Methods of forming an electronic device may include forming a gate electrode on a semiconductor substrate, and forming first and second impurity doped regions of the semiconductor substrate on...
26	7582561	Method of selectively depositing materials on a substrate using a supercritical fluid A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a polymer film to at least a portion of...
27	7579622	Fabrication of MEMS devices with spin-on glass A method of making an etched structure in the fabrication of a MEMS device involves depositing a bulk layer, typically of polysilicon, prone to surface roughness. At least one layer of...
28	7572717	Method of manufacturing semiconductor device According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method including forming on a semiconductor substrate an insulating film...
29	7569453	Contact structure This invention relates to contact structures for use in integrated circuits and methods of fabricating contact structures. In one embodiment, a contact structure includes a conductive layer, one or...
30	7569404	Ink-jet printhead fabrication A silicon wafer substrate is used in ink-jet printhead fabrication. The fabrication process is improved by simultaneously forming MOSFET source/drain contact vias simultaneously with substrate...
31	7566658	Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device A semiconductor device includes an interlayer insulating layer including a plurality of trenches connecting to a number of via holes formed on a semiconductor substrate including lower...
32	7563704	Method of forming an interconnect including a dielectric cap having a tensile stress An interconnect structure and method of making the same are provided. The interconnect structure includes a dielectric layer having a patterned opening, a metal feature disposed in the patterned...
33	7560016	Selectively accelerated plating of metal features To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the...
34	7557039	Method for fabricating contact hole of semiconductor device A method for forming a contact hole of a semiconductor device includes: forming a lower pattern over a substrate; forming a spin-on-glass (SOG) layer over the lower pattern; performing a first...
35	7557038	Method for fabricating self-aligned contact hole Disclosed are: (i) a method for fabricating self-aligned contact hole in a semiconductor device, and (ii) a semiconductor device having a self-aligned contact. The method comprises the steps of:...
36	7557029	Semiconductor device and fabrication process thereof A semiconductor device includes a conductive layer with a plurality of wires, and a bonding pad formed in a region overlapping with the plurality of wires of the conductive layer. One of the wires...
37	7553764	Silicon wafer having through-wafer vias A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. A trench is formed in the semiconductor...
38	7553763	Salicide process utilizing a cluster ion implantation process A salicide process contains providing a silicon substrate that comprises at least a predetermined salicide region, performing a cluster ion implantation process to form an amorphized layer in the...
39	7547628	Method for manufacturing capacitor A method for manufacturing a capacitor includes depositing an interlayer insulating film on or above a plug connected to a switching element, forming a hole in the interlayer insulating film such...
40	7545045	Dummy via for reducing proximity effect and method of using the same A dummy via design for a dual damascene structure has a dielectric layer on a substrate, a dual damascene structure filled with a conductive material and inlaid in the dielectric layer, and a dummy...
41	7544569	Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type and a second...
42	7541276	Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer Exemplary embodiments of the invention generally include methods for forming multilayer metal interconnect structures using dual damascene methods that incorporate a via capping process to protect...
43	7537959	Chip stack package and manufacturing method thereof A chip stack package is manufactured at a wafer level by forming connection vias in the scribe lanes adjacent the chips and connecting the device chip pads to the connection vias using rerouting...
44	7534725	Advanced process control for semiconductor processing An advanced process control (APC) method for semiconductor fabrication is provided. A first substrate and a second substrate are provided. The first substrate and the second substrate include a...
45	7527993	Method and structure for fabricating smooth mirrors for liquid crystal on silicon devices A method for fabricating a liquid crystal on silicon display device. The method includes providing a substrate, e.g., silicon wafer. The method includes forming a transistor layer overlying the...
46	7524758	Interconnect structure and method for semiconductor device An interconnect method in a semiconductor device may include a step of examining various regions of an inter layer dielectric to identify regions having high densities or concentrations of trench...
47	7521359	Interconnect structure encased with high and low k interlevel dielectrics A structure for improving the electrostatic discharge robustness of an integrated circuit having an electrostatic discharge (ESD) device and a receiver network connected to a pad by interconnects....
48	7521357	Methods of forming metal wiring in semiconductor devices using etch stop layers A method of forming a metal wiring in a semiconductor device can include forming an etch stop layer outside a contact hole formed in an insulation layer and avoiding forming the etch stop layer...
49	7521348	Method of fabricating semiconductor device having fine contact holes A method for fabricating a semiconductor device having fine contact holes is exemplarily disclosed. The method includes forming an isolation layer defining active regions on a semiconductor...
50	7517796	Method for patterning submicron pillars The present invention provides for a method to pattern and etch very small dimension pillars, for example in a memory array. When dimensions of pillars become very small, the photoresist pillars...

Matches 1 - 50 out of 1011

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