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8129272 Hidden plating traces  
A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger...
8129848 Light emitting device having a plurality of light emitting cells connected in series and method of fabricating the same  
Disclosed are a light emitting device having a plurality of light emitting cells connected in series and a method of fabricating the same. The light emitting device includes a buffer layer formed...
8129216 Method of manufacturing solar cell with doping patterns and contacts  
A method of manufacturing a solar cell. The method includes the steps of providing a substrate, applying a first dopant to a first surface, applying a second dopant to a second surface, covering...
8124521 Electrical through contact  
A method of fabricating an electrical contact through a through hole in a substrate, wherein the through hole is at least in part filled with a liquid conductive material and the solidified liquid...
8110900 Manufacturing process of semiconductor device and semiconductor device  
After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the...
8110923 Semiconductor device and method of manufacturing the same  
An improved manufacturing method of a semiconductor device is provided. The method includes preparing a semiconductor substrate having an integrated circuit together with connection pads. The...
8106517 Connecting and bonding adjacent layers with nanostructures  
An apparatus, comprising two conductive surfaces or layers and a nanostructure assembly bonded to the two conductive surfaces or layers to create electrical or thermal connections between the two...
8105929 Gate control and endcap improvement  
A method of forming semiconductor structures comprises following steps. A gate dielectric layer is formed over a substrate in an active region. A gate electrode layer is formed over the gate...
8097497 Inkjet printed wirebonds, encapsulant and shielding  
A method of connecting a chip to a package in a semiconductor device includes printing an encapsulant to a predetermined thickness on at least a portion of the chip and package and printing a...
8093102 Process of forming an electronic device including a plurality of singulated die  
An electronic device can include a first die having a first terminal at a first front side, and a second die having a second terminal at a second front side and a through via. In one aspect, a...
8080881 Contact pad supporting structure and integrated circuit for crack suppresion  
The invention provides a contact pad supporting structure. The contact pad supporting structure includes an underlying first conductive plate and an overlying second conductive plate, wherein the...
8080456 Robust top-down silicon nanowire structure using a conformal nitride  
In one exemplary embodiment, a method for fabricating a nanowire product comprising: providing a wafer having a buried oxide (BOX) upper layer in which a well is formed, the wafer further having a...
8071396 Embedded phase-change memory and method of fabricating the same  
An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and...
8067272 Integrated circuit package system for package stacking and manufacturing method thereof  
A stackable multi-chip package system is provided including forming an external interconnect having a base and a tip, connecting a first integrated circuit die and the base, stacking a second...
8062974 Semiconductor device with grounding structure  
Conductions and vias between different, stacked metallic layers of a semiconductor device may be mechanically damaged by mechanical strain. According to an exemplary embodiment of the present...
8063497 Liquid crystal display  
A chip having a bump layout suitable for the chip on glass technology and a driving IC includes a plurality of first bumps and a plurality of second bumps for electrically connecting to a glass...
8063395 Memristor amorphous metal alloy electrodes  
A nanoscale switching device comprises at least two electrodes, each of a nanoscale width; and an active region disposed between and in electrical contact with the electrodes, the active region...
8053360 Semiconductor device and method of manufacturing the same  
To prevent two contacts that have different heights, share at least one interlayer insulating film and are disposed close to each other from being short-circuited to each other due to misalignment...
8044517 Electronic component comprising predominantly organic functional materials and a method for the production thereof  
An electronic component comprises a plurality of layers at least two of which comprise predominantly organic functional materials with improved through-plating through certain of the layers. The...
8043964 Method for providing electrical connections to spaced conductive lines  
An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact...
8039392 Resistor random access memory cell with reduced active area and reduced contact areas  
A memory device has a sidewall insulating member with a sidewall insulating member length according to a first spacer layer thickness. A first electrode formed from a second spacer layer having a...
8034703 Semiconductor device and method for manufacturing the same  
In a pad forming region electrically connecting an element forming region to the outside, in which a low dielectric constant insulating film is formed in association with in the element forming...
8034711 Bonding structure and fabrication thereof  
A bonding structure and the method of fabricating the same are disclosed. The bonding structure of the invention includes a copper-based pad formed in an insulator layer and a protection layer...
8026556 Adjustible resistor for use in a resistive divider circuit and method for manufacturing  
A method of manufacturing a resistive divider circuit, includes providing a silicon body having a plurality of opposing pairs of intermediate taps extending therefrom. Each tap comprises a thin...
8022553 Mounting substrate and manufacturing method thereof  
A mounting substrate and a method of manufacturing the mounting substrate. The mounting substrate can include an insulation layer, a bonding pad buried in one side of the insulation layer in...
8021931 Direct via wire bonding and method of assembling the same  
A method for electrically connecting an integrated circuit to a via in a substrate is disclosed. The method can include deforming a ball over the via to form a bump and attaching a bond wire to...
8021965 Inter-chip communication  
The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and...
8021981 Redistribution layers for microfeature workpieces, and associated systems and methods  
Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system includes positioning a preformed...
8017520 Method of fabricating a pad over active circuit I.C. with frame support structure  
An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is...
8012874 Semiconductor chip substrate with multi-capacitor footprint  
Various methods and apparatus for coupling capacitors to a chip substrate are disclosed. In one aspect, a method of manufacturing is provided that includes forming a mask on a semiconductor chip...
8013447 Semiconductor device and method for fabricating the same  
The semiconductor device includes an upper electrode line structure and a lower electrode line structure provided over a semiconductor substrate. The semiconductor device also includes a guard...
8008200 Poison-free and low ULK damage integration scheme for damascene interconnects  
A method of forming a dual damascene structure is disclosed. A lower dielectric hardmask layer and an upper dielectric hardmask layer are deposited on an ultra low-k film. A first via is formed in...
8008193 Manufacturing method of semiconductor device and semiconductor manufacturing apparatus therefor  
Provided is a manufacturing method for improving the reliability of a semiconductor device having a back electrode. After formation of semiconductor elements on the surface of a silicon substrate,...
8008179 Methods using silver compositions for micro-deposition direct writing silver conductor lines on photovoltaic wafers  
Embodiments of the invention relate to a silicon semiconductor device, and a conductive thick film composition for use in a solar cell device.
8003505 Image sensor and method of fabricating the same  
A method of fabricating an image sensor. A method of fabricating an image sensor may include preparing a substrate including a pixel region and/or a logic region having transistors and/or gates. A...
8003529 Method of fabrication an integrated circuit  
A method of forming an integrated circuit is disclosed. The method includes providing a substrate and forming on the substrate a shield structure comprising a shield member and a ground strap. The...
7998861 Method of manufacturing through-via  
Disclosed is a method of manufacturing a through-via. The through-via manufacturing method includes forming a core-via hole in a wafer, forming a suction-via hole adjacent to the core-via hole in...
7994017 Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications  
A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown...
7977805 Flexible wiring substrate, semiconductor device and electronic device using flexible wiring substrate, and fabricating method of flexible wiring substrate  
A flexible wiring substrate is provided which realizes a fine pitch of a wiring pattern and improves mechanical strength of the wiring pattern so as to prevent breaks or exfoliation of the wiring...
7977183 Semiconductor device and method of manufacturing same  
To provide a technique capable of improving the reliability of a semiconductor device even if the downsizing thereof is advanced. The technical idea of the present invention lies in the...
7964501 Semiconductor device and method of fabricating the same  
A method of fabricating a semiconductor device includes providing a semiconductor substrate including a first landing plug and a second landing plug. A bit line is formed over the semiconductor...
7960258 Method for fabricating nanoscale thermoelectric device  
The present invention discloses a method for fabricating a nanoscale thermoelectric device, which comprises steps: providing at least one template having a group of nanoscale pores; forming a...
7955973 Method and apparatus for improvements in chip manufacture and design  
A method of securing a bond pad in to a semiconductor chip having an upper top metal surface which includes one or more holes, the method comprising the steps of forming a passivation layer over...
7951670 Flash memory cell with split gate structure and method for forming the same  
A split gate memory cell. A floating gate is disposed on and insulated from a substrate comprising an active area separated by a pair of isolation structures formed therein. The floating gate is...
7951709 Method and apparatus providing integrated circuit having redistribution layer with recessed connectors  
A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to expose a portion of the stud and then...
7952200 Semiconductor device including a copolymer layer  
A semiconductor device including a chip including an integrated circuit, a conductive layer, a copolymer layer and metal elements. The conductive layer is disposed over the chip and electrically...
7951658 Method for manufacturing diode-connected transistor and image display device using the same  
A method for manufacturing a diode-connected transistor includes forming a silicon layer on a substrate, a first insulation film on the silicon layer, and a gate electrode on the first insulation...
7948094 Semiconductor device  
The semiconductor device according to the present invention includes a semiconductor layer, an interlayer dielectric film formed on the semiconductor layer, a wire formed on the interlayer...
7947600 Manufacturing method for micro-transformers  
A micro-transformer manufacturing method is provided, which can improve throughput, prevent a crack from entering an insulating film between coils, and manufacture the micro-transformer without...
7943508 Fabricating method of a semiconductor device  
Disclosed is a method of fabricating a semiconductor device, in which the process steps of a photoresist process for forming a metal line are simply reduced, and a process exerting an influence on...