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8652924 Methods of fabricating a storage node in a semiconductor device and methods of fabricating a capacitor using the same  
A storage node is formed in a semiconductor device by forming an interlayer insulation layer on a substrate, forming an etch stop layer and a first sacrificial layer on the interlayer insulation...
8647976 Semiconductor package having test pads on top and bottom substrate surfaces and method of testing same  
A semiconductor package and testing method is disclosed. The package includes a substrate having top and bottom surfaces, a semiconductor chip mounted in a centrally located semiconductor chip...
8647961 Method for filling cavities in wafers, correspondingly filled blind hole and wafer having correspondingly filled insulation trenches  
A method is described for filling cavities in wafers, the cavities being open to a predetermined surface of the wafer, including the following steps: applying a lacquer-like filling material to...
8648467 Semiconductor memory device and method of manufacturing the same  
A method of manufacturing a semiconductor memory device according to the embodiment includes: forming a first stacked-structure; forming a first stripe part and a first hook part at the first...
8642469 Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer  
A semiconductor wafer has a contact pad. A first insulating layer is formed over the wafer. A second insulating layer is formed over the first insulating layer and contact pad. A portion of the...
8642465 Method for manufacturing and making planar contact with an electronic apparatus, and correspondingly manufactured apparatus  
Reliable electrical contact is made with electronic components and effective electrical isolation is produced between the top and bottom of the electronic components. An electronic component is...
8642464 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device includes forming a first interconnection and a second interconnection above a semiconductor substrate, forming a first sidewall insulating film on...
8637401 Methods and devices for high accuracy deposition on a continuously moving substrate  
A method is explained that allows for a via to be filled with a dispensed material while the substrate is in continuous movement. A device is described that allows for a via to be filled while the...
8637374 Method of fabricating self-aligned nanotube field effect transistor  
A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the...
8637982 Split loop cut pattern for spacer process  
A semiconductor fabrication technique cuts loops formed in a spacer pattern. The spacer pattern is a split loop pattern which generally includes a symmetric arrangement of one or more loops in...
8629052 Methods of forming semiconductor devices having narrow conductive line patterns  
Semiconductor devices and methods of forming semiconductor devices are provided in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of...
8629060 Methods of forming through substrate interconnects  
A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is...
8617986 Integrated circuits and methods for forming the integrated circuits  
A method for forming an integrated circuit includes forming a first dielectric layer over a gate electrode of a transistor. An etch-stop layer is formed over the first dielectric layer. An opening...
8614145 Through substrate via formation processing using sacrificial material  
A method is provided for establishing through substrate vias (TSVs) within a substrate. The method includes: forming at least one recess in a front-side of a wafer; filling, at least partially,...
8614514 Micro-spring chip attachment using ribbon bonds  
Standard ribbon bonds are utilized as clamp-like mechanical fasteners to attach an IC die in a “flip-chip” orientation to a support structure (e.g., a package base substrate or printed circuit...
8609491 Method for fabricating semiconductor device with buried bit lines  
A method for fabricating a semiconductor device includes etching a substrate to form trenches that separate active regions, forming an insulation layer having an opening to open a portion of a...
8609536 Stair step formation using at least two masks  
Apparatuses and methods for stair step formation using at least two masks, such as in a memory device, are provided. One example method can include forming a first mask over a conductive material...
8598710 Semiconductor device with dummy contacts  
A semiconductor device includes a semiconductor substrate including a cell region and a core region adjacent to the cell region, active regions in the cell region and the core region, an...
8592255 Method for electrically connecting dual silicon-on-insulator device layers  
A method includes providing a handle wafer having first and second sides. A first oxide layer covers the first side, a second oxide layer covers the second side, a first silicon layer covers the...
8586472 Conductive lines and pads and method of manufacturing thereof  
A semiconductor device and method are disclosed. The semiconductor device includes a substrate having a first region and a second region and an insulating layer arranged on the substrate. A first...
8587134 Semiconductor packages  
A semiconductor package may include a substrate including a substrate pad on a top surface thereof; at least one semiconductor chip including a connection terminal electrically connected to the...
8586476 Fabrication method for circuit substrate having post-fed die side power supply connections  
A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the...
8580675 Two-track cross-connect in double-patterned structure using rectangular via  
An integrated circuit may be formed by forming a first interconnect pattern in a first plurality of parallel route tracks, and forming a second interconnect pattern in a second plurality of...
8580682 Cost-effective TSV formation  
A device includes a substrate having a first surface, and a second surface opposite the first surface. A through-substrate via (TSV) extends from the first surface to the second surface of the...
8580681 Manufacturing method of device  
A device manufacturing method includes: sequentially forming a first sacrificial film, a first support film, a second sacrificial film, and a second support film on a semiconductor substrate;...
8575025 Templated circuitry fabrication  
A method of making templated circuitry employs a template system that includes a template of an insulator material on a carrier having a conductive surface. The template includes multiple levels...
8575022 Top corner rounding of damascene wire for insulator crack suppression  
A structure and method for fabricating the structure that provides a metal wire having a first height at an upper surface. An insulating material surrounding said metal wire is etched to a second...
8564030 Self-aligned trench contact and local interconnect with replacement gate process  
A semiconductor device fabrication process includes forming insulating mandrels over one or more replacement metal gates on a semiconductor substrate. The mandrels include a first insulating...
8563346 Method for manufacturing electrode of dye-sensitized solar cell and dye-sensitized solar cell having electrode thereof  
The present invention provides a method for manufacturing an electrode of a dye-sensitized solar cell using an inkjet printing process, an electrode formed thereby, and a dye-sensitized solar cell...
8558348 Variable resistance memory device and methods of forming the same  
A method of forming a memory device includes forming a first interlayer insulating layer on a semiconductor substrate, forming a first electrode in the first interlayer insulating layer, the first...
8552557 Electronic component package fabrication method and structure  
An electronic component package includes a RDL pattern comprising a redistribution pattern terminal. A buildup dielectric layer is formed on the RDL pattern, the buildup dielectric layer having a...
8552562 Profiled contact for semiconductor device  
A profiled contact for a device, such as a high power semiconductor device is provided. The contact is profiled in both a direction substantially parallel to a surface of a semiconductor structure...
8552565 Chip package and method for forming the same  
A chip package includes a substrate having an upper surface and a lower surface, a plurality of conducting pads located under the lower surface of the substrate, and a dielectric layer located...
8546218 Method for fabricating semiconductor device with buried word line  
A method for fabricating a semiconductor device includes etching a substrate to form a plurality of bodies isolated by a first trench, forming a buried bit line gap-filling a portion of the first...
8547167 Die power structure  
A die including a first set of power tiles arranged in a first array and having a first voltage; a second set of power tiles arranged in a second array offset from the first array and having a...
8546253 Self-aligned polymer passivation/aluminum pad  
The invention provides a semiconductor chip structure having at least one aluminum pad structure and a polyimide buffering layer under the aluminum pad structure, wherein the polyimide buffering...
8546227 Contact for high-K metal gate device  
A method of making an integrated circuit includes providing a substrate with a high-k dielectric and providing a polysilicon gate structure over the high-k dielectric. A doping process is...
8541893 Semiconductor memory device and power line arrangement method thereof  
A semiconductor memory device and a power line arrangement method are disclosed. The semiconductor memory device includes a plurality of pads, each pad including an upper pad and a lower pad...
8530350 Apparatuses including stair-step structures and methods of forming the same  
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets,...
8518820 Methods for forming contacts in semiconductor devices  
Mask sets, layout design, and methods for forming contacts in devices are described. In one embodiment, a semiconductor device includes a plurality of contacts disposed over a substrate, the...
8519519 Semiconductor device having die pads isolated from interconnect portion and method of assembling same  
A semiconductor device includes a lead frame that has a die interconnect portion and at least first and second die pads. The die interconnect portion is isolated from the die pads. The device also...
8513809 Semiconductor device  
A semiconductor device includes an interlayer insulation film, a wiring embedded in the interlayer insulation film and an air gap part formed between a side surface of the wiring and the...
8508033 Semiconductor device  
The semiconductor device according to the present invention includes a semiconductor layer, an interlayer dielectric film formed on the semiconductor layer, a wire formed on the interlayer...
8507375 Alignment tolerant semiconductor contact and method  
An alignment tolerant electrical contact is formed by providing a substrate on which is a first electrically conductive region (e.g., a MOSFET gate) having an upper surface, the first electrically...
8501623 Method of forming a semiconductor device having a metal silicide and alloy layers as electrode  
A semiconductor device includes an electrode having a metal silicide layer and a metal alloy layer, and a data storage element formed on the electrode. The metal silicide layer has a concave...
8502388 Semiconductor device and method for fabricating the same  
A semiconductor device has an insulating film, serving as low-porosity regions low in porosity, formed on a substrate and high-porosity regions higher in porosity than the low-porosity regions,...
8501622 Semiconductor device with two or more bond pad connections for each input/output cell and method of manufacture thereof  
A semiconductor device including a plurality of input/output cells and having a first bond pad and at least one second bond pad coupled to each input/output cell. The first bond pads comprise a...
8497146 Vertical solid-state transducers having backside terminals and associated systems and methods  
Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first...
8492268 IC having viabar interconnection and related method  
An IC including first metal layer having wiring running in a first direction; a second metal layer having wiring running in a second direction perpendicular to the first direction; and a first via...
8492904 Semiconductor device and manufacturing method of the same  
One aspect of the present invention is a semiconductor device including: a semiconductor substrate; a first wiring that is formed on the semiconductor substrate; a second wiring that is formed to...