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8137995 Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structures  
A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive...
8039395 Technique for forming embedded metal lines having increased resistance against stress-induced material transport  
An alloy forming dopant material is deposited prior to the formation of a copper line, for instance by incorporating the dopant material into the barrier layer, which is then driven into the...
8008186 Semiconductor device and method of fabricating the same  
A semiconductor device according to an embodiment of the present invention includes a semiconductor substrate; a wiring formed in predetermined pattern above the semiconductor substrate, a first...
8003511 Memory cell formation using ion implant isolated conductive metal oxide  
Memory cell formation using ion implant isolated conductive metal oxide is disclosed, including forming a bottom electrode below unetched conductive metal oxide layer(s), forming the unetched...
7939397 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device includes forming a first semiconductor pattern which is covered with a first insulating film over a first active region, forming a second...
7928021 System for and method of microwave annealing semiconductor material  
A system for and method of processing, i.e., annealing semiconductor materials. By controlling the time, frequency, variance of frequency, microwave power density, wafer boundary conditions,...
7833855 Methods of producing integrated circuit devices utilizing tantalum amine derivatives  
In a method for forming a field effect transistor, a metal nitride layer is formed on a gate electrode insulating layer. Tantalum amine derivatives represented by the chemical formula...
7807522 Lanthanide series metal implant to control work function of metal gate electrodes  
Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal nitride is formed above a gate dielectric. A lanthaide series...
7799683 Copper interconnect wiring and method and apparatus for forming thereof  
Capping layer or layers on a surface of a copper interconnect wiring layer for use in interconnect structures for integrated circuits and methods and apparatus for forming improved integration...
7767583 Method to improve uniformity of chemical mechanical polishing planarization  
Embodiments of this method improve the results of a chemical mechanical polishing (CMP) process. A surface is implanted with a species, such as, for example, Si, Ge, As, B, P, H, He, Ne, Ar, Kr,...
7709398 Process and apparatus for depositing semiconductor layers using two process gases, one of which is preconditioned  
The invention relates to a method and device for depositing at least one layer, particularly a semiconductor layer, onto at least one substrate, which is situated inside a process chamber of a...
7696517 NMOS transistors that mitigate fermi-level pinning by employing a hafnium-silicon gate electrode and high-k gate dieletric  
Transistors having a Hafnium-Silicon gate electrode and high-k dielectric are disclosed. A workpiece is provided having a gate dielectric formed over the workpiece, and a gate formed over the gate...
7659198 In-situ deposition for Cu hillock suppression  
A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a...
7648884 Semiconductor device with integrated resistive element and method of making  
A resistive device (44) and a transistor (42) are formed. Each uses a portion of a metal layer (18) that is formed at the same time and thus additional process steps are avoided to remove the metal...
7645699 Method of forming a diffusion barrier layer using a TaSiN layer and method of forming a metal interconnection line using the same  
The present invention provides a method of forming a diffusion barrier layer comprising a TaSiN layer. The method includes depositing a TaN layer into a via hole which penetrates an insulation...
7638432 Semiconductor device comprising metal silicide films formed to cover gate electrode and source-drain diffusion layers and method of manufacturing the same  
The present invention provides a semiconductor device, comprising a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate...
7628896 Coated article with transparent conductive oxide film doped to adjust Fermi level, and method of making same  
A transparent conductive oxide (TCO) based film is formed on a substrate. The film may be formed by sputter-depositing, so as to include both a primary dopant (e.g., Al) and a co-dopant (e.g., Ag)....
7592257 Semiconductor contact structure containing an oxidation-resistant diffusion barrier and method of forming  
The method includes providing a patterned structure in a process chamber, where the patterned structure contains a micro-feature formed in a dielectric material and a contact layer at the bottom of...
7572660 Electrical through-plating of semiconductor chips  
A method for manufacturing a micromechanical component and a micromechanical component manufactured using this method are described, the micromechanical component having a first substrate, which in...
7553763 Salicide process utilizing a cluster ion implantation process  
A salicide process contains providing a silicon substrate that comprises at least a predetermined salicide region, performing a cluster ion implantation process to form an amorphized layer in the...
7538030 Semiconductor device and method of manufacturing same  
An electrode on a semiconductor substrate includes a polysilicon layer, a silicon implanted layer on the polysilicon layer, a tungsten nitride layer on the silicon implanted layer, a tungsten...
7528024 Dual work function metal gate integration in semiconductor devices  
The present invention provides, in one embodiment, a process for forming a dual work function metal gate semiconductor device (100). The process includes providing a semiconductor substrate (105)...
7465977 Method for producing a packaged integrated circuit  
There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity,...
7452744 Method of manufacturing solid image pickup apparatus  
A first gate electrode and a second gate electrode are formed on a semiconductor substrate, and then a resist pattern is formed so as to selectively leave open a portion including an overlap...
7442640 Semiconductor device manufacturing methods  
Methods of manufacturing a semiconductor device including a high-voltage device region and a low-voltage device region are provided. An illustrated method includes forming, on a substrate, a gate...
7413992 Tungsten silicide etch process with reduced etch rate micro-loading  
The embodiments provides an improved tungsten silicide etching process with reduced etch rate micro-loading effect. In one embodiment, a method for etching a layer formed on a substrate is...
7407884 Method for forming an aluminum contact  
A method of forming an aluminum contact including forming a barrier metal layer on an interlayer insulation layer pattern defining a contact hole, and forming an aluminum layer on the barrier metal...
7396745 Formation of ultra-shallow junctions by gas-cluster ion irradiation  
Method of forming one or more doped regions in a semiconductor substrate and semiconductor junctions formed thereby, using gas cluster ion beams.
7393781 Capping of metal interconnects in integrated circuit electronic devices  
A multilayer metal cap over a metal-filled interconnect feature in a dielectric layer for incorporation into a multilayer integrated circuit device, and a method for forming the cap.
7300871 Method of doping a conductive layer near a via  
A method of making a semiconductor device is described. That method comprises forming a conductive layer that contacts a via, such that the conductive layer includes a higher concentration of an...
7297588 Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities and a process for forming the same  
One or more impurities may be incorporated within a metal-containing layer of a metal-containing gate electrode to modify the work function of the metal-containing gate electrode of a transistor...
7285482 Method for producing solid-state imaging device  
A method is provided for producing a solid-state imaging device in which a plurality of pixels are arranged two-dimensionally so as to form a photosensitive region, each of the pixels including a...
7268029 Method of fabricating CMOS transistor that prevents gate thinning  
Provided is a method of fabricating a CMOS transistor in which, after a polysilicon layer used as a gate is formed on a semiconductor substrate, a photoresist pattern that exposes an n-MOS...
7253050 Transistor device and method of manufacture thereof  
Methods of forming CMOS devices and structures thereof. A workpiece is provided having a first region and a second region. A high k gate dielectric material is formed over the workpiece. A first...
7223691 Method of forming low resistance and reliable via in inter-level dielectric interconnect  
A novel interlevel contact via structure having low contact resistance and improved reliability, and method of forming the contact via. The method comprises steps of: etching an opening through an...
7214614 System for controlling metal formation processes using ion implantation  
The present invention is generally directed to various methods of using ion implantation techniques to control various metal formation processes. In one illustrative embodiment, the method...
7199043 Method of forming copper wiring in semiconductor device  
Disclosed in a method of forming a copper wiring in a semiconductor device. A copper layer buries a damascene pattern in which an interlayer insulating film of a low dielectric constant. The copper...
7144808 Integration flow to prevent delamination from copper  
The present invention provides, in one embodiment, method of forming a barrier layer 300 over a semiconductor substrate 110. The method comprises forming an opening 120 in an insulating layer 130...
7122470 Semiconductor device with a CMOS transistor  
A semiconductor device having a gate electrode free from increasing of resistance of the gate electrode, from decreasing of capacitance of the insulation film due to depletion, and from penetrating...
7115498 Method of ultra-low energy ion implantation to form alloy layers in copper  
A method of fabricating an integrated circuit can include forming a barrier layer along lateral side walls and a bottom of a via aperture, forming a seed layer proximate and conformal to the...
7115502 Structure and manufacturing process of localized shunt to reduce electromigration failure of copper dual damascene process  
A method and structure to reduce electromigration failure of semiconductor interconnects. In various embodiments, the area around a via is selectively doped with metallic dopants. The method and...
7112484 Thin film diode integrated with chalcogenide memory cell  
An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed...
7101787 System and method for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition  
A system and method is disclosed for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition. A via in a semiconductor device is formed by placing a...
7087509 Method of forming a gate electrode on a semiconductor device and a device incorporating same  
The present invention is directed to a semiconductor device having a gate electrode includes of a plurality of sidewalls, each having a recess formed therein. The present invention is also directed...
7084053 Unidirectionally conductive materials for interconnection  
A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie...
7078342 Method of forming a gate stack  
A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature...
7067410 Method of forming a metal silicide  
The present invention provides a technique for forming a metal silicide, such as a cobalt disilicide, even at extremely scaled device dimensions without unduly degrading the film integrity of the...
7060612 Method of adjusting resistors post silicide process  
A method of fabricating a resistor in which the resistance value of the resistor is measured and adjusted after silicidation is provided. The method of the present invention begins with first...
7060558 Method for fabricating a field-effect transistor having a floating gate  
In the course of a method for fabricating a field-effect transistor having a floating gate, a structure is formed which has uncovered sidewalls of a layer made of the material for forming the...
7060610 Method for forming contact in semiconductor device  
The present invention relates to a method for forming a contact in a semiconductor device. The method includes the steps of: forming a P-type source/drain junction in a substrate; forming an...
Matches 1 - 50 out of 289 1 2 3 4 5 6 >