Match Document Document Title
7601637 Atomic layer deposited tantalum containing adhesion layer  
Apparatus and methods of fabricating an atomic layer deposited tantalum containing adhesion layer within at least one dielectric material in the formation of a metal, wherein the atomic layer...
7598170 Plasma-enhanced ALD of tantalum nitride films  
Methods of controllably producing conductive tantalum nitride films are provided. The methods comprise contacting a substrate in a reaction space with alternating and sequential pulses of a...
7589017 Methods for growing low-resistivity tungsten film  
Improved methods for depositing low resistivity tungsten films are provided. The methods involve depositing a tungsten nucleation layer on a substrate and then depositing a tungsten bulk layer over...
7585762 Vapor deposition processes for tantalum carbide nitride materials  
Embodiments of the invention generally provide methods for depositing and compositions of tantalum carbide nitride materials. The methods include deposition processes that form predetermined...
7581314 Method of forming noble metal contacts  
A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated...
7575998 Semiconductor device and metal line fabrication method of the same  
Embodiments relate to a method for forming a wiring in a semiconductor device, that may include laminating a conductive layer for wiring formation on a semiconductor substrate, forming a...
7566653 Interconnect structure with grain growth promotion layer and method for forming the same  
In general, the present invention provides an interconnect structure and method for forming the same. This present invention discloses an interconnect structure includes a Cu seeding layer embedded...
7550385 Amine-free deposition of metal-nitride films  
A method for forming a metal carbide layer begins with providing a substrate, an organometallic precursor material, at least one doping agent such as nitrogen, and a plasma such as a hydrogen...
7538045 Coating process to enable electrophoretic deposition  
The present invention relates to a process for the deposition of protective coatings on complex shaped Si-based substrates which are used in articles and structures subjected to high temperature,...
7531902 Multi-layered metal line of semiconductor device having excellent diffusion barrier and method for forming the same  
A multi-layered metal line of a semiconductor device has a lower metal line and an upper metal line. The upper metal line includes a diffusion barrier, which is made of a stack of a first WN x ...
7528066 Structure and method for metal integration  
An interconnect structure including a gouging feature at the bottom of one of the via openings and a method of forming the same are provided. In accordance with the present invention, the method of...
7524756 Process of forming a semiconductor assembly having a contact structure and contact liner  
A contact structure and a method of forming thereof for semiconductor devices or assemblies are described. The method provides process steps to create a contact structure encompassed by a...
7521346 Method of forming HfSiN metal for n-FET applications  
A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k...
7514360 Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof  
This invention relates to a semiconductor device making use of a highly thermal robust metal electrode as gate material. In particular, the development of Hafnium Nitride as a metal gate electrode...
7514354 Methods for forming damascene wiring structures having line and plug conductors formed from different materials  
Methods are provided for forming dual damascene interconnect structures using different conductor materials to fill via holes and line trenches. For example, a method for forming an interconnection...
7510967 Method for manufacturing semiconductor device  
The present invention relates to a method for manufacturing a semiconductor device, comprising: forming a metal interconnect on a substrate; forming a refractory metal layer containing titanium...
7510966 Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines  
The invention includes an electrically conductive line, methods of forming electrically conductive lines, and methods of reducing titanium silicide agglomeration in the fabrication of titanium...
7498179 Semiconductor device having ferroelectric material capacitor and method of making the same  
The present invention relates to the field of a semiconductor device having a ferroelectric material capacitor and method of making the same. The semiconductor device includes a capacitor having a...
7491641 Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line  
This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line...
7473636 Method to improve time dependent dielectric breakdown  
In the back end of an integrated circuit employing dual-damascene interconnects, the interconnect members have a first non-conformal liner that has a thicker portion at the top of the trench level...
7452811 Method for forming a wiring of a semiconductor device, method for forming a metal layer of a semiconductor device and apparatus for performing the same  
In a method for forming a wiring of a semiconductor device using an atomic layer deposition, an insulating interlayer is formed on a substrate. Tantalum amine derivatives represented by a chemical...
7446056 Method for increasing polysilicon grain size  
The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the...
7435679 Alloyed underlayer for microelectronic interconnects  
Apparatus and methods of fabricating a microelectronic interconnect having an underlayer which acts as both a barrier layer and a seed layer. The underlayer is formed by co-depositing a noble metal...
7435670 Bit line barrier metal layer for semiconductor device and process for preparing the same  
The present invention relates to a bit line barrier metal layer for a semiconductor device and a process for preparing the same, the process comprising: forming bit line contact on an insulation...
7425503 Apparatus and method for enhanced thermal conductivity packages for high powered semiconductor devices  
An apparatus and method for an enhanced thermally conductive package for high powered semiconductor devices. The package includes a semiconductor die having an active surface and a non-active...
7416980 Forming a barrier layer in interconnect joints and structures formed thereby  
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a barrier layer on a substrate, wherein the barrier layer comprises molybdenum; and...
7416974 Method of manufacturing semiconductor device, and semiconductor device  
A method of manufacturing a semiconductor device, comprising a first step of forming a layer insulation film on a lower layer wiring provided on a substrate and forming a connection hole in the...
7407876 Method of plasma enhanced atomic layer deposition of TaC and TaCN films having good adhesion to copper  
A method for processing a substrate for forming TaC and TaCN films having good adhesion to Cu. The method includes disposing the substrate in a process chamber of a plasma enhanced atomic layer...
7405143 Method for fabricating a seed layer  
The present invention produces a seed layer for the deposition of copper for metallizing integrated circuits. A diffusion barrier is deposited upon the wafer. In one embodiment of the invention, a...
7371679 Semiconductor device with a metal line and method of forming the same  
A method of forming a metal line in a semiconductor device including forming an inter-metal dielectric (IMD) layer on the semiconductor substrate including the predetermined pattern, planarizing...
7358170 Methods of forming conductive interconnects, and methods of depositing nickel  
The invention includes methods of electroless plating of nickel selectively on exposed conductive surfaces relative to exposed insulative surfaces. The electroless plating can utilize a bath which...
7354853 Selective dry etching of tantalum and tantalum nitride  
The invention describes a method for the selective dry etching of tantalum and tantalum nitride films. Tantalum nitride layers ( 30 ) are often used in semiconductor manufacturing. The...
7316783 Method of wiring formation and method for manufacturing electronic components  
A method of wiring formation includes forming a feeder film partially on a substrate, forming on the substrate a plating base film via a physical film making method so that the plate base film...
7312127 Incorporating dopants to enhance the dielectric properties of metal silicates  
The present invention provides a method of forming a high-k dielectric layer on a semiconductor wafer. A metal silicate dielectric layer is initially deposited on the wafer. A dopant having...
7307018 Method of fabricating conductive lines  
A method of forming a conductive line suitable for decreasing a sheet resistance of the conductive lines. The method comprises steps of providing a material layer having a conductive layer formed...
7303988 Methods of manufacturing multi-level metal lines in semiconductor devices  
Methods of forming a multi-level metal line of a semiconductor device are disclosed. One example method includes subsequently stacking first and second metal layers, wherein a conductive etching...
7300887 Methods of forming metal nitride layers, and methods of forming semiconductor structures having metal nitride layers  
Methods of forming metal nitride layers on a substrate include reacting a metal source gas with a nitrogen source gas in a process chamber to form a metal nitride layer on the substrate. The...
7300873 Systems and methods for forming metal-containing layers using vapor deposition processes  
A method of forming (and an apparatus for forming) a metal containing layer on a substrate, particularly a semiconductor substrate or substrate assembly for use in manufacturing a semiconductor or...
7300869 Integrated barrier and seed layer for copper interconnect technology  
An integrated barrier and seed layer that is useful for creating conductive pathways in semiconductor devices. The barrier portion of the integrated layer prevents diffusion of the conductive...
7297630 Methods of fabricating via hole and trench  
A method of fabricating a via and a trench is disclosed. A disclosed method comprises: forming a via hole and a trench in a interlayer dielectric layer on a semiconductor substrate where a...
7294565 Method of fabricating a wire bond pad with Ni/Au metallization  
A method for sealing an exposed surface of a wire bond pad with a material that is capable of preventing a possible chemical attack during electroless deposition of Ni/Au pad metallurgy is...
7294241 Method to form alpha phase Ta and its application to IC manufacturing  
A method of sputtering a Ta layer comprised of alpha phase Ta on a Cu layer. An embodiment includes a Ta sputter deposition on a Cu surface at a substrate temperature less than 200° C. Another...
7285491 Salicide process  
A salicide process is provided. A metal layer selected from a group consisting of nickel and an alloy thereof is formed on a silicon layer, the first step of the second thermal process is performed...
7279416 Methods of forming a conductive structure in an integrated circuit device  
A conductive structure is formed in an integrated circuit device by forming a lower conductive pattern on a substrate. A barrier metal layer is formed on the lower conductive pattern. The barrier...
7279414 Method of forming interconnect structure with interlayer dielectric  
The present invention relates to the formation of an ILD layer while preventing or reducing oxidation of the upper surface of a metallic interconnect. Avoidance of oxidation of the upper surface of...
7279231 Electroless plating structure  
The present invention relates to a cobalt electroless plating bath composition. In one embodiment, the present invention relates to cobalt electroless plating in the fabrication of interconnect...
7273814 Method for forming a ruthenium metal layer on a patterned substrate  
A method for forming a ruthenium metal layer includes providing a patterned substrate in a process chamber of a deposition system, where the patterned substrate contains one or more vias or...
7262125 Method of forming low-resistivity tungsten interconnects  
Methods and apparatus for preparing a low-resistivity tungsten film on a substrate are provided. Methods involve the formation of a tungsten nucleation layer on a substrate using pulsed nucleation...
7256089 Top electrode barrier for on-chip die de-coupling capacitor and method of making same  
An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of...
7253092 Tungsten plug corrosion prevention method using water  
Disclosed herein is a method of making integrated circuits. In one embodiment the method includes forming tungsten plugs in the integrated circuit and forming electrically conductive interconnect...