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7115498 Method of ultra-low energy ion implantation to form alloy layers in copper  
A method of fabricating an integrated circuit can include forming a barrier layer along lateral side walls and a bottom of a via aperture, forming a seed layer proximate and conformal to the...
7115499 Cyclical deposition of tungsten nitride for metal oxide gate electrode  
A method for depositing a tungsten nitride layer is provided. The method includes a cyclical process of alternately adsorbing a tungsten-containing compound and a nitrogen-containing compound on a...
7115991 Method for creating barriers for copper diffusion  
A barrier layer for a semiconductor device is provided. The semiconductor device comprises a dielectric layer, an electrically conductive copper containing layer, and a barrier layer separating the...
7112527 Manufacturing method for short distance wiring layers and long distance wiring layers in a semiconductor device  
A semiconductor device having regions for forming a plurality of functional blocks and a region for forming wiring layers for connecting the functional blocks, wherein each of the regions for...
7105434 Advanced seed layery for metallic interconnects  
One embodiment of the present invention is a method for making metallic interconnects, which method is utilized at a stage of processing a substrate having a patterned insulating layer which...
7104869 Barrier removal at low polish pressure  
The invention generally provides methods and compositions for planarizing a substrate surface having underlying dielectric materials. Aspects of the invention provide compositions and methods using...
7098131 Methods for forming atomic layers and thin films including tantalum nitride and devices including the same  
Atomic layers can be formed by introducing a tantalum amine derivative reactant onto a substrate, wherein the tantalum amine derivative has a formula: Ta(NR 1 )(NR 2 R 3 ) 3 , wherein R 1 , R 2 ...
7094685 Integration of titanium and titanium nitride layers  
Embodiments of the invention generally relate to an apparatus and method of integration of titanium and titanium nitride layers. One embodiment includes providing one or more cycles of a first set...
7084053 Unidirectionally conductive materials for interconnection  
A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie...
7084057 Bit line contact structure and fabrication method thereof  
A bit line contact structure and fabrication method thereof. The method includes providing a substrate having a transistor, with a gate electrode, drain region, and source region, on the substrate,...
7084056 Electrical interconnection, method of forming the electrical interconnection, image sensor having the electrical interconnection and method of manufacturing the image sensor  
An electrical interconnection for a highly integrated semiconductor device includes a first insulation layer having at least a first recessed portion on a substrate. The first recessed portion is...
7084065 Method for fabricating a semiconductor device  
A method for fabricating a semiconductor device that prevents the formation of a side etch caused by fluoride (CF x ) produced when a barrier insulating film is etched. As shown in FIG. 1 (G), an...
7071095 Barrier metal re-distribution process for resistivity reduction  
A novel process for re-distributing a barrier layer deposited on a single damascene, dual damascene or other contact opening structure. The process includes providing a substrate having a contact...
7071096 Method of forming a conductive barrier layer within critical openings by a final deposition step after a re-sputter deposition  
In forming a thin conductive layer in an interconnect structure by sputter deposition including a re-sputtering step, a flash deposition step is performed after the re-sputtering step to provide a...
7071103 Chemical treatment to retard diffusion in a semiconductor overlayer  
The present invention provides a method for retarding the diffusion of dopants from a first material layer (typically a semiconductor) into an overlayer or vice versa. In the method of the present...
7071510 Capacitor of an integrated circuit device and method of manufacturing the same  
The present invention relates to a capacitor of a semiconductor memory cell and a method of manufacturing the same wherein a capacitor includes a first insulation layer having a buried contact...
7067424 Method of manufacturing an electronic device  
The present invention provides for a method of providing copper metallization on a semiconductor body, including the step of depositing copper in a nitrogen-containing atmosphere so as to form a...
7067416 Method of forming a conductive contact  
Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The method comprises depositing a conductive material over a substrate to fill a...
7060619 Reduction of the shear stress in copper via's in organic interlayer dielectric material  
Interconnect layers on a semiconductor body containing logic circuits (microprocessors, Asics or others) or random access memory cells (DRAMS) are formed in a manner to significantly reduce the...
7056826 Method of forming copper interconnects  
A method of forming copper interconnects for an integrated circuit is provided. An antireflective coating layer is formed over an insulating layer formed over a semiconductor substrate. An...
7052932 Oxygen doped SiC for Cu barrier and etch stop layer in dual damascene fabrication  
A method of forming a dual damascene structure with improved performance is described. A first etch stop layer comprised of oxygen doped SiC is deposited on a SiC barrier layer to form a composite...
7052621 Bilayered metal hardmasks for use in Dual Damascene etch schemes  
A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment...
7053407 Liquid crystal display device and method for manufacturing the same  
Disclosed are a liquid crystal display device and a method for manufacturing the same, in which wirings connected between pads and an integrated circuit is protected from being corroded. A pixel...
7041595 Method of forming a barrier seed layer with graded nitrogen composition  
A barrier layer material and method of forming the same is disclosed. The method includes depositing a graded metal nitride layer in a single deposition chamber, with a high nitrogen content at a...
7037824 Copper to aluminum interlayer interconnect using stud and via liner  
Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via...
7034397 Oxygen bridge structures and methods to form oxygen bridge structures  
A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a...
7033940 Method of forming composite barrier layers with controlled copper interface surface roughness  
A composite α-Ta/graded tantalum nitride/TaN barrier layer is formed in Cu interconnects with a controlled surface roughness for improved adhesion, electromigration resistance and reliability....
7030031 Method for forming damascene structure utilizing planarizing material coupled with diffusion barrier material  
This invention relates to the manufacture of dual damascene interconnect structures in integrated circuit devices. Specifically, a method is disclosed for forming a single or dual damascene...
7030004 Method for forming bond pad openings  
The invention provides a method for forming bond pad openings through a three-layer passivation structure, which protects the semiconductor device prior to bonding and packaging. Two passivation...
7026716 Self-assembled sub-nanolayers as interfacial adhesion enhancers and diffusion barriers  
An electrical device is disclosed. The electrical device includes a substrate, and a self-assembled molecular layer on the substrate. The self-assembled molecular layer comprises a plurality of...
7023089 Low temperature packaging apparatus and method  
Some embodiments disclose a low temperature semiconductor packaging apparatus and method. An apparatus generally comprises a heat spreader, a silicon die, and a thermal interface material disposed...
7022600 Method of forming dual damascene interconnection using low-k dielectric material  
In order to avoid a faulty pattern resulting from a photoresist tail being formed due to a step difference of an upper hard mask layer when a dual hard mask layer is used, a planarization layer is...
7022606 Underlayer film for copper, and a semiconductor device including the underlayer film  
An underlayer film-forming material for copper, a method for forming the underlayer, an underlayer film for copper, and a semiconductor device including a substrate, the underlayer and copper...
7018920 Composite sacrificial material  
A composite sacrificial material is deposited in a void or opening in a dielectric layer on a semiconductor substrate. The composite sacrificial material includes a polymeric or oligomeric matrix...
7015138 Multi-layered barrier metal thin films for Cu interconnect by ALCVD  
A multi-layered barrier metal thin film is deposited on a substrate by atomic layer chemical vapor deposition (ALCVD). The multi-layer film may comprise several different layers of a single...
7015531 FeRAM having bottom electrode connected to storage node and method for forming the same  
A FeRAM device in which a bottom electrode of a ferroelectric capacitor is connected to a source/drain region of a transistor and a top electrode is connected to a plate line. The FeRAM device...
7012019 Circuit barrier structure of semiconductor packaging substrate and method for fabricating the same  
A circuit barrier structure of a semiconductor packaging substrate and a method for fabricating the same, forming a metal conductive layer on an insulating layer of the substrate and a patterned...
7008872 Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures  
Multiple level interconnect structures and methods for fabricating the interconnect structures are disclosed. The interconnect structures may contain an interconnect line, an electrolessly...
7005372 Deposition of tungsten nitride  
Methods for depositing a tungsten nitride layer are described. The methods form a tungsten nitride layer using a carefully controlled deposition technique such as pulsed nucleation layer (PNL)....
7005360 Method for fabricating a microelectronic circuit including applying metal over and thickening the integrated coil to increase conductivity  
A method for fabricating a microelectronic circuit having an improved electrically conductive element. The method includes providing a finished processed microelectronic circuit having a...
6998341 Process for forming a diffusion barrier material nitride film  
A process is disclosed for manufacturing a film that is smooth and has large nitride grains of a diffusion barrier material. Under the process, a nitride of the diffusion barrier material is...
6995073 Air gap integration  
Method and structure for integrating conductive and dielectric materials in a microelectronic structure having air gaps are disclosed. Certain embodiments of the invention comprise isolating...
6995087 Integrated circuit with simultaneous fabrication of dual damascene via and trench  
An integrated circuit manufacturing method includes providing a base, forming a first conductor, forming a first barrier layer, forming a first dielectric layer, and forming a masking layer. The...
6987055 Methods for deposition of semiconductor material  
The invention includes a method for selective deposition of semiconductor material. A substrate is placed within a reaction chamber. The substrate comprises a first surface and a second surface....
6987057 Method making bonding pad  
An bonding pad structure has a passivation layer over a copper layer having a pad window to expose a portion of the copper layer, a barrier layer conformal to a profile of the pad window, and an...
6977217 Aluminum-filled via structure with barrier layer  
In one embodiment, a via structure includes a liner, a barrier layer over the liner, and an aluminum layer over the barrier layer. The barrier layer helps minimize reaction between the aluminum...
6974769 Conductive structure fabrication process using novel layered structure and conductive structure fabricated thereby for use in multi-level metallization  
Conductive structures in features of an insulator layer on a substrate are fabricated by a particular process. In this process, a layer of conductive material is applied over the insulator layer so...
6972492 Method and structure to form capacitor in copper damascene process for integrated circuit devices  
A method and resulting structure of forming a metal on metal capacitor structure for an integrated circuit device, e.g., mixed signal. The method includes forming a dual damascene structure, where...
6972254 Manufacturing a conformal atomic liner layer in an integrated circuit interconnect  
A manufacturing method for an integrated circuit has a substrate with a semiconductor device thereon. A channel dielectric layer is deposited over the device and has an opening provided therein. A...
6972253 Method for forming dielectric barrier layer in damascene structure  
A method for fabricating dielectric barrier layers in integrated circuit structures such as damascene structures is provided. In one embodiment, a low-k dielectric layer formed on a substrate is...
Matches 151 - 200 out of 812 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >